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LS830-PDIP-8L

更新时间：2025-05-14 00:51:20

品牌：Linear

描述：Small Signal Field-Effect Transistor, N-Channel, Junction FET,

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LS830-PDIP-8L 概述

Small Signal Field-Effect Transistor, N-Channel, Junction FET,

LS830-PDIP-8L 数据手册

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LS830 LS831 LS832 LS833

ULTRA LOW LEAKAGE LOW DRIFT

MONOLITHIC DUAL N-CHANNEL JFET

FEATURES

ULTRA LOW DRIFT

ULTRA LOW NOISE

LOW NOISE

│ΔV_GS1-2/ΔT│= 5µV/ºC max.

I_G=80fA TYP.

e_n=70nV/√Hz TYP.

C_ISS=3pf max.

LOW CAPACITANCE

ABSOLUTE MAXIMUM RATINGS NOTE 1

@ 25°C (unless otherwise noted)

Maximum Temperatures

Storage Temperature

-55 to +150°C

Operating Junction Temperature

Maximum Voltage and Current for Each Transistor NOTE 1

Gate Voltage to Drain or

-V_GSS

-V_DSO

-I_G(f)

-I_G

40V

SOIC

Top View

TO-71

Top View

Source

Drain to Source Voltage

40V

Gate Forward Current

Gate Reverse Current

10mA

10µA

Maximum Power Dissipation @ TA = 25ºC

Continuous Power Dissipation (Total)

500mW

ELECTRICAL CHARACTERISTICS TA = 25ºC (unless otherwise noted)

SYMBOL CHARACTERISTIC LS830 LS831 LS832 LS833 UNITS CONDITIONS

│ΔV_GS1-2/ΔT│max. Drift vs. Temperature

µV/ºC

V_DG= 10V

I_D= 30µA

T_A= -55ºC to +125ºC

│V_GS1-2│max.

-I_Gtypical

Offset Voltage

0.1

0.2

0.5

0.1

0.2

0.5

0.1

0.2

0.5

1.0

V_DG= 10V

I_D= 30µA

Operating

-I_Gtypical

High Temperature

At Full Conduction

High Temperature

TA= +125ºC

I_GSStypical

V_GS= 20V, V_GS= 0V

V_GS= 0

V_GS= 20V

TA= +125ºC

SYMBOL

BV_GSS

CHARACTERISTIC

Breakdown Voltage

Gate-to-Gate Breakdown

TRANSCONDUCTANCE

Full Conduction

MIN.

-40

TYP. MAX. UNITS CONDITIONS

-60

V_DS= 0

I_G= -1nA

I_D= 0

BV_GGO

±40

I_G= ±1µA

I_S= 0

g_fss

300

100

500

200

µS

V_DG= 10V

V_GS= 0

f = 1kHz

g_fs

Typical Operation

Differential

I_D= 30µA f = 1kHz

│g_fs1-2/g_fs│

DRAIN CURRENT

Full Conduction

I_DSS

400

1000

µA

V_DG= 10V

V_DS= 10V

V_GS= 0

│I_DSS1-2/I_DSS

│

Differential at Full Conduction

GATE-SOURCE

V_GS(off)

Cutoff Voltage

-0.6

-2

-4.5

I_D= 1nA

Linear Integrated Systems

• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261

Doc 201127 06/05/2013 Rev#A5 ECN# LS830 LS831 LS832 LS833

SYMBOL

CHARACTERISTIC

Operating Range

MIN.

TYP. MAX. UNITS CONDITIONS

V_GS

-4

V_DG= 10V

I_D= 30µA

GATE CURRENT

Gate-to-Gate Leakage

OUTPUT CONDUCTANCE

Full Conduction

I_GGO

V_GG= ±20V

I_D= I_S= 0A

g_OSS

µS

V_DG= 10V

V_GS= 0

g_OS

Operating

0.5

0.1

I_D= 30µA

│g_{OS 1-2}

│

Differential

COMMON MODE REJECTION

CMRR

-20 log │ΔV_GS1-2/ ΔV_DS

NOISE

│

ΔV_DS= 10 to 20V

ΔV_DS= 5 to 10V

I_D=30µA

│

e_n

Figure

V_DS= 10V

f= 100Hz

V_GS= 0

R_G=10MΩ

NBW= 6Hz

I_D= 30µA

Voltage

nV/√Hz V_DG= 10V

f= 10Hz

NBW= 1Hz

CAPACITANCE

Input

C_ISS

C_RSS

C_DD

V_DS= 10V

V_DG= 10V

V_GS= 0

f= 1MHz

Reverse Transfer

Drain-to-Drain

1.5

0.1

V_GS= 0

I_D= 30µA

0.210

0.170

NOTES:

1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired

Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing

high-quality discrete components. Expertise brought to LIS is based on processes and products developed

at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,

a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,

co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.

Linear Integrated Systems

• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261

Doc 201127 06/05/2013 Rev#A5 ECN# LS830 LS831 LS832 LS833

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