TC655EUN
更新时间:2025-01-22 02:08:20
品牌:MICROCHIP
描述:Dual SMBus⑩ PWM Fan Speed Controllers With Fan Fault Detection
TC655EUN 概述
Dual SMBus⑩ PWM Fan Speed Controllers With Fan Fault Detection 双SMBus⑩ PWM风扇速度控制器,带有风扇故障检测 电机驱动器 运动控制电子器件
TC655EUN 规格参数
是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Active | 零件包装代码: | MSOP |
包装说明: | PLASTIC, MSOP-10 | 针数: | 10 |
Reach Compliance Code: | compliant | ECCN代码: | EAR99 |
HTS代码: | 8542.39.00.01 | Factory Lead Time: | 12 weeks |
风险等级: | 1.37 | Is Samacsys: | N |
模拟集成电路 - 其他类型: | BRUSHLESS DC MOTOR CONTROLLER | JESD-30 代码: | S-PDSO-G10 |
JESD-609代码: | e3 | 长度: | 3 mm |
湿度敏感等级: | 1 | 功能数量: | 1 |
端子数量: | 10 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | TSSOP | 封装等效代码: | TSSOP10,.19,20 |
封装形状: | SQUARE | 封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
峰值回流温度(摄氏度): | 260 | 电源: | 3.3/5 V |
认证状态: | Not Qualified | 座面最大高度: | 1.1 mm |
子类别: | Motion Control Electronics | 最大供电电流 (Isup): | 0.3 mA |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 3 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | YES |
温度等级: | INDUSTRIAL | 端子面层: | Matte Tin (Sn) |
端子形式: | GULL WING | 端子节距: | 0.5 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | 40 |
宽度: | 3 mm | Base Number Matches: | 1 |
TC655EUN 数据手册
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PDF下载TC654/TC655
M
Dual SMBus™ PWM Fan Speed Controllers With
Fan Fault Detection
Features
Description
• Temperature Proportional Fan Speed for
The TC654 and TC655 are PWM mode fan speed con-
trollers with FanSense technology for use with brush-
less DC fans. These devices implement temperature
proportional fan speed control which lowers acoustic
Reduced Acoustic Noise and Longer Fan Life
• FanSense™ Protects against Fan Failure and
Eliminates the Need for 3-wire Fans
• Over Temperature Detection (TC655)
• Efficient PWM Fan Drive
• Provides RPM Data
• 2-Wire SMBus™-Compatible Interface
• Supports Any Fan Voltage
• Software Controlled Shutdown Mode for "Green"
Systems
• Supports Low Cost NTC/PTC Thermistors
• Space Saving 10-Pin MSOP Package
• Temperature Range: -40°C to +85ºC
fan noise and increases fan life. The voltage at V
IN
(Pin 1) represents temperature and is typically pro-
vided by an external thermistor or voltage output tem-
perature sensor. The PWM output (V
) is adjusted
OUT
between 30% and 100%, based on the voltage at V .
IN
The PWM duty cycle can also be programmed via
SMBus to allow fan speed control without the need for
an external thermistor. If V is not connected, the
IN
TC654/TC655 will start driving the fan at a default duty
cycle of 39.33%. See Section 4.3, "Fan Startup", for
more details.
In normal fan operation, pulse trains are present at
SENSE1 (Pin 8) and SENSE2 (Pin 7). The TC654/
TC655 use these pulses to calculate the fan revolu-
tions per minute (RPM). The fan RPM data is used to
detect a worn out, stalled, open or unconnected fan.
An RPM level below the user-programmable threshold
causes the TC654/TC655 to assert a logic low alert
signal (FAULT). The default threshold value is
500 RPM. Also, if this condition occurs, F1F (bit 0<0>)
or F2F (bit 1<0>) in the Status Register will also be set
to a ‘1’.
Applications
• Personal Computers & Servers
• LCD Projectors
• Datacom & Telecom Equipment
• Fan Trays
• File Servers
• Workstations
• General Purpose Fan Speed Control
An over-temperature condition is indicated when the
Package Type
voltage at V exceeds 2.6 V (typical). The TC654/
IN
TC655 devices indicate this by setting OTF(bit 5<X>) in
the Status Register to a '1'. The TC655 device also
pulls the FAULT line low during an over-temperature
condition.
The TC654/TC655 devices are available in a 10-Pin
MSOP package and consume 150 µA during opera-
tion. The devices can also enter a low-power shutdown
mode (5 µA, typ.) by setting the appropriate bit in the
Configuration Register. The operating temperature
range for these devices is -40°C to +85ºC.
10-Pin MSOP
VIN
CF
VDD
1
10
9
VOUT
2
3
4
5
TC654
TC655
SENSE1
SENSE2
FAULT
8
SCLK
SDA
7
6
GND
SMBus is a trademark of Intel Corporation.
2002 Microchip Technology Inc.
DS21734A-page 1
TC654/TC655
Functional Block Diagram
TC654/TC655
–
+
Note
V
OTF
V
V
–
+
IN
DD
OTF
Control
Logic
+
–
V
OUT
Start-up
Timer
FAULT
C
F
Missing
Pulse
V
MIN
Detect
Clock
Generator
50 kΩ
+
SENSE1
SENSE2
SCLK
SDA
–
Serial Port
Interface
100 mV (typ.)
50 kΩ
+
–
GND
100 mV (typ.)
Note: OTF condition applies for the TC655 device only.
DS21734A-page 2
2002 Microchip Technology Inc.
TC654/TC655
1.0
ELECTRICAL
PIN FUNCTION TABLE
CHARACTERISTICS
Name
Function
Absolute Maximum Ratings *
V
C
SCLK
SDA
Analog Input
Analog Output
IN
VDD..................................................................................6.5 V
Input Voltages .................................... -0.3 V to (VDD + 0.3 V)
Output Voltages ................................. -0.3 V to (VDD + 0.3 V)
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-40°C to +125°C
Maximum Junction Temperature, TJ .............................150°C
ESD protection on all pins..................................................≥ 4 kV
*Notice: Stresses above those listed under “Maximum rat-
ings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Expo-
sure to maximum rating conditions for extended periods may
affect device reliability.
F
Serial Clock Input
Serial Data In/Out (Open Drain)
Ground
Digital (Open Drain) Output
Analog Input
Analog Input
Digital Output
Power Supply Input
GND
FAULT
SENSE2
SENSE1
V
V
OUT
DD
ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, all limits are specified for V = 3.0 V to 5.5 V,
DD
-40°C <T < +85°C.
A
Parameters
Sym
Min
Typ
Max
Units
Conditions
Supply Voltage
Operating Supply Current
Shutdown Mode Supply Current
V
I
3.0
—
—
—
150
5
5.5
300
10
V
DD
DD
µA Pins 7, 8, 9 Open
µA Pins 7, 8, 9 Open
I
DDSHDN
V
V
V
PWM Output
Rise Time
Fall Time
OUT
OUT
OUT
t
t
—
—
1.0
5.0
26
—
—
—
—
30
50
50
—
—
34
µsec
µsec
mA
I
I
V
V
= 5 mA, Note 1
= 1 mA, Note 1
R
OH
OL
F
Sink Current at V
Source Current at V
PWM Frequency
Output
I
= 10% of V
OUT
OL
OL
DD
Output
I
mA
= 80% of V
OUT
OH
F
OH DD
Hz C = 1 µF
F
V
Input
IN
V
Input Voltage for 100% PWM
V
2.45
2.6
2.75
V
V
IN
C(MAX)
duty-cycle
V
V
V
- V
V
1.25
—
-1.0
1.4
10M
—
1.55
—
+1.0
C(MAX)
C(MIN)
CRANGE
Input Resistance
Input Leakage Current
Ω
V
= 5.0 V
DD
IN
I
µA
IN
IN
SENSE Input
SENSE Input Threshold Voltage with
V
80
100
120
mV
THSENSE
Respect to GND
FAULT Output
FAULT Output LOW Voltage
FAULT Output Response Time
Fan RPM-to-Digital Output
Fan RPM ERROR
V
—
—
—
2.4
0.3
—
V
sec
I
= 2.5 mA
OL
OL
t
FAULT
-15
—
+15
%
RPM > 1600
Note 1: Not production tested, ensured by design, tested during characterization.
2: For 5.0 V > V ≤ 5.5 V, the limit for V = 2.2 V.
DD
IH
2002 Microchip Technology Inc.
DS21734A-page 3
TC654/TC655
ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise noted, all limits are specified for V = 3.0 V to 5.5 V,
DD
-40°C <T < +85°C.
A
Parameters
2-Wire Serial Bus Interface
Logic Input High
Logic Input Low
Logic Output Low
Input Capacitance SDA, SCLK
I/O Leakage Current
SDA Output Low Current
Sym
Min
Typ
Max
Units
Conditions
Note 2
I = 3 mA
OL
V
2.1
—
—
—
-1.0
6
—
—
—
10
—
—
—
0.8
0.4
15
+1.0
—
V
V
V
IH
V
IL
V
OL
C
pF Note 1
µA
mA
IN
I
LEAK
I
V
= 0.6 V
OL
OLSDA
Note 1: Not production tested, ensured by design, tested during characterization.
2: For 5.0 V > V ≤ 5.5 V, the limit for V = 2.2 V.
DD
IH
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, all parameters apply at V = 3.0 V to 5.5 V
DD
Parameters
Temperature Ranges
Symbol
Min
Typ
Max
Units
Conditions
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 10 Pin MSOP
T
-40
-40
-65
—
—
—
+85
+125
+150
°C
°C
°C
A
T
A
T
A
θ
—
113
—
°C/W
JA
TIMING SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, all limits are specified for V = 3.0 V to 5.5 V,
DD
-40°C <T < +85°C
A
Parameters
Sym
Min
Typ
Max
Units
Conditions
SMBus Interface (See Figure 1-1)
Serial Port Frequency
Low Clock Period
High Clock Period
SCLK and SDA Rise Time
SCLK and SDA Fall Time
f
0
—
—
—
—
—
—
—
—
—
100
—
—
1000
300
—
—
—
—
kHz Note 1
µsec Note 1
µsec Note 1
nsec Note 1
nsec Note 1
µsec Note 1
µsec Note 1
µsec Note 1
nsec Note 1
SC
t
t
4.7
4.7
—
—
4.7
10
LOW
HIGH
t
R
t
F
Start Condition Setup Time
SCLK Clock Period Time
Start Condition Hold Time
t
SU(START)
t
SC
t
4.0
250
H(START)
Data in SetupTime to SCLK
High
t
SU-DATA
Data in Hold Time after SCLK
Low
Stop Condition Setup Time
Bus Free Time Prior to New
Transition
t
300
—
—
—
nsec Note 1
H-DATA
t
4.0
4.7
—
—
µsec Note 1
µsec Note 1 and Note 2
SU(STOP)
t
IDLE
Note 1: Not production tested, ensured by design, tested during characterization.
2: Time the bus must be free before a new transmission can start.
DS21734A-page 4
2002 Microchip Technology Inc.
TC654/TC655
SMBus Write Timing Diagram
B
A
C
D
E
F
G
H
J
M
I
K
L
tLOW tHIGH
SCLK
SDA
tSU(START) tH(START)
tSU-DATA
tH-DATA
tSU(STOP)tIDLE
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Slave
H = LSB of Data Clocked into Slave
I = Slave Pulls SDA Line Low
J = Acknowledge Clocked into Master
K = Acknowledge Clock Pulse
A = Start Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
E = Slave Pulls SDA Line Low
L = Stop Condition, Data Executed by Slave
M = New Start Condition
SMBus Read Timing Diagram
B
A
C
D
E
F
G
H
K
I
J
tLOW tHIGH
SCLK
SDA
tSU(START) tH(START)
tSU-DATA
tSU(STOP)
tIDLE
E = Slave Pulls SDA Line Low
I = Acknowledge Clock Pulse
J = Stop Condition
K = New Start Condition
A = Start Condition
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Master
H = LSB of Data Clocked into Master
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
FIGURE 1-1:
Bus Timing Data.
2002 Microchip Technology Inc.
DS21734A-page 5
TC654/TC655
2.0
TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
180
175
170
165
160
155
150
145
140
135
130
14
Pins 7,8, and 9 Open
VDD = 5.5 V
VOL = 0.1 VDD
VDD = 5.5 V
12
10
8
VDD = 3.0 V
VDD = 5.0 V
6
VDD = 4.0 V
VDD = 3.0 V
4
2
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
FIGURE 2-1:
I
vs. Temperature.
FIGURE 2-4:
PWM, Sink Current vs.
DD
Temperature.
9.000
8.000
7.000
6.000
5.000
4.000
3.000
2.000
1.000
50
IOL = 2.5 mA
45
40
35
30
25
20
15
VDD = 3.0 V
VDD = 5.5 V
VDD = 5.0 V
VDD = 5.5 V
VDD = 3.0 V
VDD = 4.0 V
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (ºC)
Temperature (ºC)
FIGURE 2-2:
I
Shutdown vs.
DD
FIGURE 2-5:
Fault V vs. Temperature.
OL
Temperature.
32
CF = 1.0 µF
35
30
25
20
15
10
5
VOH = 0.8VDD
VDD = 5.5 V
31
30
29
28
27
VDD = 5.5 V
VDD = 3.0 V
VDD = 5.0 V
VDD = 4.0 V
VDD = 3.0 V
-40 -25 -10
5
20 35
50
65
80
95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (ºC)
Temperature (°C)
FIGURE 2-3:
PWM, Source Current vs.
FIGURE 2-6:
PWM Frequency vs.
Temperature.
Temperature.
DS21734A-page 6
2002 Microchip Technology Inc.
TC654/TC655
10
9
8
7
6
5
4
3
2
1
0
50
45
40
35
30
25
20
CF = 1.0 µF
VOL = 0.4 V
VDD = 5.0 V
VDD = 5.5 V
VDD = 3.0 V
VDD = 5.0 V
VDD = 5.5 V
VDD = 4.0 V
VDD = 3.0 V
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (ºC)
-40 -25 -10
5
20 35
50 65 80 95 110 125
Temperature (ºC)
FIGURE 2-7:
SDA I vs. Temperature.
FIGURE 2-10:
RPM %error vs.
OL
Temperature.
2.620
2.615
2.610
2.605
2.600
2.595
2.590
2.585
2.580
2.575
45
40
35
VDD = 5.5 V
VDD = 3.0V
VDD = 5.5V
VDD = 5.0 V
30
25
20
VDD = 4.0 V
VDD = 3.0 V
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (ºC)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (ºC)
FIGURE 2-8:
V
vs. Temperature.
FIGURE 2-11:
THSENSE
Sense Threshold
CMAX
(V
) Hysteresis vs. Temperature.
1.205
1.200
1.195
1.190
1.185
1.180
150
140
130
120
110
100
90
VDD = 3.0 V
VDD = 3.0 V
VDD = 5.0 V
VDD = 5.5 V
VDD = 5.0 V
VDD = 4.0 V
80
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (ºC)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (ºC)
FIGURE 2-9:
V
vs. Temperature.
CMIN
FIGURE 2-12:
SDA, SCLK Hysteresis vs.
Temperature.
2002 Microchip Technology Inc.
DS21734A-page 7
TC654/TC655
3.0
PIN FUNCTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
Name
PIN FUNCTION TABLE
Function
V
Analog Input
IN
C
Analog Output
F
SCLK
SDA
GND
Serial Clock Input
Serial Data In/Out (Open Drain)
Ground
FAULT
SENSE2
SENSE1
Digital (Open Drain) Output
Analog Input
Analog Input
V
V
Digital Output
Power Supply Input
OUT
DD
3.1
Analog Input (V )
3.6
Analog Input (SENSE2)
IN
A voltage range of 1.62 V to 2.6 V (typical) on this pin
Fan current pulses are detected at this pin. These
pulses are counted and used in the calculation of the
fan2 RPM.
drives an active duty-cycle of 30% to 100% on the
V
pin.
OUT
3.2
Analog Output (C )
3.7
Analog Input (SENSE1)
F
Positive terminal for the PWM ramp generator timing
Fan current pulses are detected at this pin. These
pulses are counted and used in the calculation of the
fan1 RPM.
capacitor. The recommended C is 1 µF for 30 Hz
F
PWM operation.
3.3
SMBus Serial Clock Input (SCLK)
3.8
Digital Output (V
)
OUT
Clocks data into and out of the TC654/TC655. See
This active high complimentary output drives the base
Section 5.0 for more information on the serial interface.
of an external transistor or the gate of a MOSFET.
3.4
Serial Data (Bi-directional) (SDA)
3.9
Power Supply Input (V
)
DD
Serial data is transferred on the SMBus in both direc-
tions using this pin. See Section 5.0 for more informa-
tion on the serial interface.
The V pin with respect to GND provides power to the
DD
device. This bias supply voltage may be independent of
the fan power supply.
3.5
Digital (Open Drain) Output
(FAULT)
When the fan’s RPM falls below the user-set RPM
threshold (or OTF occurs with TC655), a logic low sig-
nal is asserted.
DS21734A-page 8
2002 Microchip Technology Inc.
TC654/TC655
can be set to provide a predictive fan failure feature.
This feature can be used to give a system warning and,
in many cases, help to avoid a system thermal shut-
down condition. The fan RPM data and threshold reg-
isters are available over the SMBus interface which
allows for complete system control.
4.0
DEVICE OPERATION
The TC654 and TC655 devices allow you to control,
monitor and communicate (via SMBus) fan speed for 2-
wire and 3-wire DC brushless fans. By pulse width
modulating (PWM) the voltage across the fan, the
TC654/TC655 controls fan speed according to the sys-
tem temperature.The goal of temperature proportional
fan speed control is to reduce fan power consumption,
increase fan life and reduce system acoustic noise.
With the TC654 and TC655 devices, fan speed can be
The TC654/TC655 devices are identical in every
aspect except for how they indicate an over-tempera-
ture condition. When V voltage exceeds 2.6 V (typi-
IN
cal), both devices will set OTF (bit 5<X>) in the Status
Register to a '1'. The TC655 will additionally pull the
FAULT output low during an over-temperature condi-
tion.
controlled by the analog input V or the SMBus inter-
face, allowing for high system flexibility.
IN
The TC654 and TC655 also measure and monitor fan
revolutions per minute (RPM). A fan’s speed (RPM) is
a measure of its health. As a fan’s bearings wear out,
the fan slows down and eventually stops (locked rotor).
By monitoring the fan’s RPM level, the TC654/TC655
devices can detect open, shorted, unconnected and
locked rotor fan conditions. The fan speed threshold
+5 V
+12 V
+5 V
FAN
FAN
1
2
C
2
R
ISO1
1 µF
R
NTC Thermistor
1
715 Ω
100 kΩ @ 25°C
34.8 kΩ
10
R
ISO2
9
8
1
V
V
OUT
IN
V
DD
C
1
715 Ω
R
0.01 µF
2
C
SENSE1
14.7 kΩ
SENSE1
2
C
0.1 µF
F
R
SENSE1
C
1.0 µF
F
TC654/TC655
SENSE2
C
SENSE2
7
R
20 kΩ
SCLK
+5 V
+5 V
0.1 µF
R
3
4
SCLK
SDA
R
SENSE2
+5 V
6
®
FAULT
20 kΩ
PICmicro
Microcontroller
FAULT
GND
5
R
SDA
20 kΩ
Note: Refer to Table 7-1 for R
and R
values.
SENSE1
SENSE2
FIGURE 4-1:
Typical Application Circuit.
2002 Microchip Technology Inc.
DS21734A-page 9
TC654/TC655
4.1
Fan Speed Control Methods
T
The speed of a DC brushless fan is proportional to the
voltage across it. For example, if a fan’s rating is
5000 RPM at 12 V, it’s speed would be 2500 RPM at
6 V. This, of course, will not be exact, but should be
close.
There are two main methods for fan speed control. The
first is pulse width modulation (PWM) and the second
is linear. Using either method the total system power
requirement to run the fan is equal. The difference
between the two methods is where the power is
consumed.
Ton
Toff
T = Period
T = 1/F
F = Frequency
D = Duty Cycle
D = Ton / T
The following example compares the two methods for
a 12 V, 120 mA fan running at 50% speed. With 6 V
applied across the fan, the fan draws an average cur-
rent of 68 mA. Using a linear control method, there is
6V across the fan and 6V across the drive element.
With 6 V and 68 mA, the drive element is dissipating
410 mW of power. Using the PWM approach, the fan is
modulated at a 50% duty cycle, with most of the 12 V
being dropped across the fan. With 50% duty cycle, the
fan draws an RMS current of 110 mA and an average
FIGURE 4-2:
Waveform.
The TC654 and TC655 generate a pulse train with a
typical frequency of 30 Hz (C = 1 µF). The duty cycle
can be varied from 30% to 100%. The pulse train gen-
erated by the TC654/TC655 devices drives the gate of
an external N-channel MOSFET or the base of an NPN
transistor (Figure 4-3). See Section 7.5 for more
information on output drive device selection.
Duty Cycle Of A PWM
F
current of 72 mA. Using a MOSFET with a 1 Ω RDS
(on)
(a fairly typical value for this low current) the power dis-
12 V
2
sipation in the drive element would be: 12 mW (Irms *
RDS ). Using a standard 2N2222A NPN transistor
(on)
(assuming a Vce-sat of 0.8 V), the power dissipation
would be 58 mW (Iavg* Vce-sat).
FAN
V
DD
The PWM approach to fan speed control causes much
less power dissipation in the drive element. This allows
smaller devices to be used and will not require any spe-
cial heatsinking to get rid of the power being dissipated
in the package.
The other advantage to the PWM approach is that the
voltage being applied to the fan is always near 12 V.
This eliminates any concern about not supplying a high
enough voltage to run the internal fan components
which is very relevant in linear fan speed control.
D
S
Qdrive
V
G
OUT
TC654/
TC655
GND
FIGURE 4-3:
PWM Fan Drive.
By modulating the voltage applied to the gate of the
MOSFET Qdrive, the voltage applied to the fan is also
modulated. When the V
pulse is high, the gate of
4.2
PWM Fan Speed Control
OUT
the MOSFET is turned on, pulling the voltage at the
drain of Qdrive to 0 V. This places the full 12 V across
the fan for the Ton period of the pulse. When the duty
cycle of the drive pulse is 100% (full on, Ton = T), the
fan will run at full speed. As the duty cycle is decreased
(pulse on time “Ton” is lowered), the fan will slow down
proportionally. With the TC654 and TC655 devices, the
duty cycle can be controlled through the analog input
The TC654 and TC655 devices implement PWM fan
speed control by varying the duty cycle of a fixed fre-
quency pulse train. The duty cycle of a waveform is the
on time divided by the total period of the pulse. For
example, given a 100 Hz waveform (10 msec.) with an
on time of 5.0 msec, the duty cycle of this waveform is
50% (5.0 msec/10.0 msec). An example of this is
illustrated in Figure 4-2.
pin (V ) or through the SMBus interface by using the
Duty-Cycle Register. See Section 4.5 for more details
on duty cycle control.
IN
DS21734A-page 10
2002 Microchip Technology Inc.
TC654/TC655
quency is linear. If a frequency of 15 Hz is desired, a
capacitor value of 2.0 µF should be used. The fre-
quency should be kept in the range of 15 Hz to 35 Hz.
See Section 7.2 for more details.
4.3
Fan Startup
Often overlooked in fan speed control is the actual
startup control period. When starting a fan from a non-
operating condition (fan speed is zero RPM), the
desired PWM duty cycle or average fan voltage can not
be applied immediately. Since the fan is at a rest posi-
tion, the fan’s inertia must be overcome to get it started.
The best way to accomplish this is to apply the full rated
voltage to the fan for one second. This will ensure that
in all operating environments, the fan will start and
operate properly.
4.5
Duty Cycle Control (V and Duty-
IN
Cycle Register)
The duty cycle of the V
PWM drive signal can be
OUT
IN
controlled by either the V analog input pin or by the
Duty-Cycle Register, which is accessible via the
SMBus interface. The control method is selectable via
DUTYC (bit 5<0>) of the Configuration Register. The
The TC654 and TC655 devices implement this fan con-
trol feature without any user programming. During a
power up or release from shutdown condition, the
default state is for V control. If V control is selected
IN
IN
and the V pin is open, the PWM duty cycle will default
IN
to 39.33%. The duty cycle control method can be
changed at any time via the SMBus interface.
TC654 and TC655 devices force the V
output to a
OUT
100% duty cycle, turning the fan full on for one second
(C = 1 µF). Once the one second period is over, the
V
is an analog input pin. A voltage in the range of
F
IN
TC654/TC655 devices will look to see if SMBus or V
1.62 V to 2.6 V (typical) at this pin commands a 30% to
IN
control has been selected in the Configuration Register
(DUTYC bit 5<0>). Based on this register, the device
100% duty cycle on the V
output, respectively. If the
OUT
voltage at V falls below the 1.62 V level, the duty
IN
will choose which input will control the V
duty cycle.
cycle will not go below 30%. The relationship between
OUT
Duty cycle control based on V is the default state. If
the voltage at V and the PWM duty cycle is shown in
IN
IN
IN
V
control is selected and the V pin is open (nothing
Figure 4-5.
IN
is connected to the V pin), then the TC654/TC655 will
IN
default to a duty cycle of 39.33%. This sequence is
shown in Figure 4-4. This integrated one second star-
tup feature will ensure the fan starts up every time.
100
90
80
70
60
50
40
30
20
10
0
Power Up or Release
from SHDN
One Second Pulse
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
YES
Select SMBus
Input Voltage (VIN
)
NO
FIGURE 4-5:
Voltage (Typical).
For the TC655 device, if the voltage at V exceeds the
2.6 V (typical) level, an over temperature fault indica-
tion will be given by asserting a low at the FAULT output
and setting OTF (bit 5<X>) in the Status Register to a
‘1’.
PWM Duty Cycle vs. V
IN
SMBus PWM Duty
Cycle Control
Default PWM: 39.33%
YES
V
IN Open?
NO
IN
VIN PWM Duty
Cycle Control
A thermistor network or any other voltage output ther-
mal sensor can be used to provide the voltage to the
IN
FIGURE 4-4:
Power-up Flow Chart.
V
input. The voltage supplied to the V pin can actu-
IN
ally be thought of as a temperature. For example, the
circuit shown in Figure 4-6 represents a typical solution
for a thermistor based temperature sensing network.
See Section 7.3 for more details.
4.4
PWM Drive Frequency (C )
F
As previously discussed, the TC654 and TC655
devices operate with a fixed PWM frequency. The fre-
quency of the PWM drive output (V
) is set by a
OUT
capacitor at the C pin. With a 1 µF capacitor at the C
F
F
pin, the typical drive frequency is 30 Hz. This frequency
can be raised, by decreasing the capacitor value, or
lowered, by increasing the capacitor value. The rela-
tionship between the capacitor value and the PWM fre-
2002 Microchip Technology Inc.
DS21734A-page 11
TC654/TC655
This method of control allows for more sophisticated
algorithms to be implemented by utilizing microcontrol-
lers or microprocessors in the system. In this way, mul-
tiple system temperatures can be taken into account for
determining the necessary fan speed.
+5 V
As shown in Table 4-1, the duty cycle has more of a
NTC Thermistor
100 kΩ @ 25°C
R
1
step function look than did the V control approach.
IN
34.8 kΩ
Because the step changes in duty cycle are small, they
are rarely audibly noticeable, especially when the fans
are integrated into the system.
V
IN
C
1
TC654/
TC655
R
4.6
The V
PWM Output (V
OUT
)
0.01 µF
2
OUT
pin is designed to drive two low cost NPN
14.7 kΩ
GND
transistors or N-channel MOSFETs as the low side
power switching elements in the system as is shown in
Figure 4-7. These switching elements are used to turn
the fans on and off at the PWM duty cycle commanded
FIGURE 4-6:
NTC Thermistor Sensor
Network.
by the V
output.
OUT
The second method for controlling the duty cycle of the
PWM output (V ) is via the SMBus interface. In order
This output has complementary drive (pull up and pull
down) and is optimized for driving NPN transistors or
N-channel MOSFETs (see Section 2.0 for sink and
OUT
to control the PWM duty cycle via the SMBus, DUTYC
(bit 5<0>) of the Configuration Register (Register 6.3)
must be set to a ‘1’. This tells the TC654/TC655 device
that the duty cycle should be controlled by the Duty
Cycle Register. Next, the Duty Cycle Register must be
programmed to the desired value. The Duty Cycle Reg-
ister is a 4 Bit read/write register that allows duty cycles
from 30% to 100% to be programmed. Table 4-1 shows
the binary codes for each possible duty cycle.
source current capability of the V
drive stage).
OUT
The external device needs to be chosen to fit the volt-
age and current rating of the fan in a particular applica-
tion (Refer to Section 7.5 Output Drive Device
Selection). NPN transistors are often a good choice for
low current fans. If a NPN transistor is chosen, a base
current limiting resistor should be used. When using a
MOSFET as the switching element, it is sometimes a
good idea to have a gate resistor to help slow down the
turn on and turn off of the MOSFET. As with any switch-
ing waveform, fast rising and falling edges can
sometimes lead to noise problems.
TABLE 4-1:
DUTY-CYCLE REGISTER
(DUTY-CYCLE) 4-BITS,
READ/WRITE
Duty-Cycle Register (Duty Cycle)
As previously stated, the V
output will go to 100%
OUT
duty cycle during power up and release from shutdown
D(3)
D(2)
D(1)
D(0)
Duty-Cycle
conditions. The V
output only shuts down when
OUT
0
0
0
0
0
0
0
0
1
0
1
0
30%
34.67%
39.33% (default for VIN
open and when SMBus
is not selected)
commanded to do so via the Configuration Register
(SDM (bit 0<0>)). Even when a locked rotor condition
is detected, the V
output will continue to pulse at
OUT
the programmed duty cycle.
4.7 Sensing Fan Operation (SENSE1 &
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
44%
SENSE2)
48.67%
53.33%
58%
62.67%
67.33%
72%
76.67%
81.33%
86%
90.67%
95.33%
100%
The TC654 and TC655 also feature Microchip's propri-
etary FanSense technology. During normal fan opera-
tion, commutation occurs as each pole of the fan is
energized. The fan current pulses created by the fan
commutation are sensed using low value current sense
resistors in the ground return leg of the fan circuit. The
voltage pulses across the sense resistor are then AC
coupled through capacitors to the SENSE pins of the
TC654/TC655 device. These pulses are utilized for cal-
culating the RPM of the individual fans. The threshold
voltage for the SENSE pins is 100 mV (typical). The
peak of the voltage pulse at the SENSE pins must
exceed the 100 mV (typical) threshold in order for the
pulse to be counted in the fan RPM measurement.
DS21734A-page 12
2002 Microchip Technology Inc.
TC654/TC655
See Section 7.4 for more details on selecting the
appropriate current sense resistor and coupling capac-
itor values.
4.8
Fan Fault Threshold and
Indication (FAULT)
For the TC654 and TC655 devices, a fault condition
exists whenever a fan’s sensed RPM level falls below
the user programmable threshold. The RPM threshold
values for fan fault detection are set in the
FAN_FAULT1 and FAN_FAULT2 Registers (8-bit, read/
write).
FAN
1
FAN
2
The RPM threshold represents the fan speed at which
the TC654/TC655 devices will indicate a fan fault. This
threshold can be set at lower levels to indicate fan
locked rotor conditions or set to higher levels to give
indications for predictive fan failure. It is recommended
that the RPM threshold be at least 10% lower than the
minimum fan speed which occurs at the lowest duty
cycle set point. The default value for the fan RPM
thresholds is 500 RPM. If the fan's sensed RPM is less
than the fan fault threshold for 2.4 seconds (typical), a
fan fault condition is indicated.
RISO1
RISO2
VOUT
SENSE1
TC654/
TC655
CSENSE1
RSENSE1
When a fault condition, due to low fan RPM, occurs, a
logic low is asserted at the FAULT output. F1F (bit
0<0>) and F2F (bit 1<0>) in the Status Register are set
to ‘1’ for respective low RPM levels on the SENSE1
and SENSE2 inputs. The FAULT output and the fault
bits in the Status Register can be reset by setting
FFCLR (bit 7<0>) in the Configuration Register to a ‘1’.
SENSE2
CSENSE2
RSENSE2
GND
For the TC655 device, a fault condition is also indicated
when an Over Temperature Fault condition occurs.
FIGURE 4-7:
Fan Current Sensing.
By selecting F1PPR (bits 2-1<01>) and F2PPR (bits 4-
3<01>) in the Configuration Register, the TC654 and
TC655 can be programmed to calculate RPM data for
fans with 1, 2, 4 or 8 current pulses per rotation. The
default state assumes a fan with 2 pulses per rotation.
The measured RPM data is then stored in the RPM-
OUTPUT1 (RPM1, for SENSE1 input) and RPM-
OUTPUT2 (RPM2, for SENSE2 input) Registers.
These registers are 9-Bit read only registers which
store RPM data with 25 RPM resolution. By setting
RES (bit 6<0>) of the Configuration Register to a ‘1’,
the RPM data can be read with 25 RPM resolution. If
this Bit is left in the default state of '0', the RPM data will
only be readable with resolution of 50 RPMs, which
represents 8-Bit data.
The maximum fan RPM reading is 12775 RPM. If this
value is exceeded, counter overflow bits in the Status
Register are set. R1CO (bit 3<0>) and R2CO (bit 4<0>)
in the Status Register represent the RPM1 and RPM2
counter overflow bits for the RPM1 and RPM2 regis-
ters, respectively. These bits will automatically be reset
to zero if the fan RPM reading has been below the max-
imum value of 12775 RPM for 2.4 seconds.
This condition occurs when the V
duty cycle
OUT
exceeds the 100% value indicating that no additional
cooling capability is available. For this condition, a logic
low is asserted at the FAULT output and OTF (bit 5<X>)
of the Status Register, the over temperature fault indi-
cator, is set to a ‘1’ (The TC654 also indicates an over
temperature condition via the OTF bit in the status reg-
ister). If the duty cycle then decreases below 100%, the
FAULT output will be released and OTF (bit 5<X>) of
the Status Register will be reset to ‘0’.
4.9
Low Power Shutdown Mode
Some applications may have operating conditions
where fan cooling is not required as a result of low
ambient temperature or light system load. During these
times it may be desirable to shut the fans down to save
power and reduce system noise.
The TC654/TC655 devices can be put into a low power
shutdown mode by setting SDM (bit 0<0>) in the Con-
figuration Register to a ‘1’ (this bit is the shutdown bit).
When the TC654/TC655 devices are in shutdown
mode, all functions except for the SMBus interface are
suspended. During this mode of operation, the TC654
and TC655 devices will draw a typical supply current of
only 5 µA. Normal operation will resume as soon as Bit
0 in the Configuration Register is reset to ‘0’.
See Table 6-1 for RPM1, RPM2 and Status Register
command byte assignments.
2002 Microchip Technology Inc.
DS21734A-page 13
TC654/TC655
When the TC654/TC655 devices are brought out of a
shutdown mode by resetting SDM (bit 0<0>) in the
Configuration Register, all of the registers (except for
the Configuration and FAN_FAULT1 & 2 registers)
assume their default power up states. The Configura-
tion Register and the FAN_FAULT1 & 2 Registers
maintain the states they were in prior to the device
being put into the shutdown mode. Since these are the
registers which control the parts operation, the part
does not have to be reprogrammed for operation when
it comes out of shutdown mode.
4.10
SMBus Interface (SCLK & SDA)
The TC654/TC655 feature an industry-standard, 2-wire
serial interface with factory-set addresses. By commu-
nicating with the TC654/TC655 device registers, func-
tions like PWM duty cycle, low power shutdown mode
and fan RPM threshold can be controlled. Critical infor-
mation, such as fan fault, over temperature and fan
RPM, can also be obtained via the device data regis-
ters. The available data and control registers make the
TC654/TC655 devices very flexible and easy to use. All
of the available registers are detailed in Section 6.0.
4.11 SMBus Slave Address
The slave address of the TC654/TC655 is 0011 011
and is fixed. This address is different from industry-
standard digital temperature sensors (like TCN75) and,
therefore, allow the TC654/TC655 to be utilized in sys-
tems in conjunction with these components. Please
contact Microchip Technology Inc. if alternate
addresses are required.
DS21734A-page 14
2002 Microchip Technology Inc.
TC654/TC655
5.1.1
DATA TRANSFER
5.0
5.1
SERIAL COMMUNICATION
SMBus 2-Wire Interface
The TC654/TC655 support a bi-directional 2-Wire bus
and data transmission protocol. The serial protocol
sequencing is illustrated in Figure 1-1. Data transfers
are initiated by a start condition (START), followed by a
device address byte and one or more data bytes. The
device address byte includes a Read/Write selection
bit. Each access must be terminated by a Stop Condi-
tion (STOP). A convention call Acknowledge (ACK)
confirms the receipt of each byte. Note that SDA can
only change during periods when SCLK is LOW (SDA
changes while SCLK is HIGH are reserved for Start
and Stop conditions). All bytes are transferred MSB
(most significant bit) first.
The Serial Clock Input (SCLK) and the bi-directional
data port (SDA) form a 2-wire bi-directional serial port
for communicating with the TC654/TC655. The follow-
ing bus protocols have been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.
Accordingly, the following Serial Bus conventions have
been defined.
5.1.2
MASTER/SLAVE
The device that sends data onto the bus is the transmit-
ter and the device receiving data is the receiver. The
bus is controlled by a master device which generates
the serial clock (SCLK), controls the bus access and
generates the START and STOP conditions. The
TC654/TC655 always work as a slave device. Both
master and slave devices can operate as either trans-
mitter or receiver, but the master device determines
which mode is activated.
TABLE 5-1:
TC654/TC655 SERIAL BUS
CONVENTIONS
Term
Description
Transmitter The device sending data to the bus.
Receiver
The device receiving data from the
bus.
The device which controls the bus: ini-
tiating transfers (START), generating
the clock and terminating transfers
(STOP).
Master
5.1.3
START CONDITION (START)
A HIGH to LOW transition of the SDA line while the
clock (SCLK) is HIGH determines a START condition.
All commands must be preceded by a START
condition.
Slave
Start
The device addressed by the master.
A unique condition signaling the
beginning of a transfer indicated by
SDA falling (High to Low) while SCLK
is high.
5.1.4
ADDRESS BYTE
Immediately following the Start Condition, the host
must transmit the address byte to the TC654/TC655.
The 7-bit SMBus address for the TC654/TC655 is
0011 011. The 7-bit address transmitted in the serial
bit stream must match for the TC654/TC655 to respond
with an Acknowledge (indicating the TC654/TC655 is
on the bus and ready to accept data). The eighth bit in
the Address Byte is a Read-Write Bit. This bit is a ‘1’ for
a read operation or ‘0’ for a write operation. During the
first phase of any transfer, this bit will be set = 0to indi-
cate that the command byte is being written.
Stop
ACK
A unique condition signaling the end
of a transfer indicated by SDA rising
(Low to High) while SCLK is high.
A Receiver acknowledges the receipt
of each byte with this unique condi-
tion. The Receiver pulls SDA low dur-
ing SCLK high of the ACK clock-pulse.
The Master provides the clock pulse
for the ACK cycle.
Busy
Communication is not possible
because the bus is in use.
5.1.5
STOP CONDITION (STOP)
NOT Busy
Data Valid
When the bus is idle, both SDA and
SCLK will remain high.
A LOW to HIGH transition of the SDA line while the
clock (SCLK) is HIGH determines a STOP condition.
All operations must be ended with a STOP condition.
The state of SDA must remain stable
during the high period of SCLK in
order for a data bit to be considered
valid. SDA only changes state while
SCLK is low during normal data trans-
fers. (See START and STOP condi-
tions)
5.1.6
DATA VALID
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
2002 Microchip Technology Inc.
DS21734A-page 15
TC654/TC655
The data on the line must be changed during the LOW
period of the clock signal. There is one clock pulse per
bit of data. Each data transfer is initiated with a START
condition and terminated with a STOP condition. The
number of the data bytes transferred between the
START and STOP conditions is determined by the
master device and is unlimited.
period of the acknowledge related clock pulse. Setup
and hold times must be taken into account. During
reads, a master device must signal an end of data to
the slave by not generating an acknowledge bit on the
last byte that has been clocked out of the slave. In this
case, the slave (TC654/TC655) will leave the data line
HIGH to enable the master device to generate the
STOP condition.
5.1.7
ACKNOWLEDGE (ACK)
5.2
SMBus Protocols
Each receiving device, when addressed, is obliged to
generate an acknowledge bit after the reception of
each byte. The master device must generate an extra
clock pulse, which is associated with this acknowledge
bit.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
The TC654/TC655 devices communicate with three
standard SMBus protocols. These are the write byte,
read byte and receive byte. The receive byte is a short-
ened method for reading from, or writing to, a register
which had been selected by the previous read or write
command. These transmission protocols are shown in
Figures 5-1, 5-2 and 5-3.
S
ADDRESS
7 Bits
WR
ACK
COMMAND
8 Bits
ACK
DATA
8 Bits
ACK
P
Slave Address
Command Byte: selects
which register you are
writing to.
Data Byte: data goes
into the register set
by the command byte.
FIGURE 5-1:
SMBus Protocol: Write Byte Format.
S
ADDRESS
7 Bits
WR
ACK
COMMAND
8 Bits
ACK
Slave Address
Command Byte: selects
which register you are
writing to.
S
ADDRESS
7 Bits
Slave Address:
repeated due to change
in data flow direction.
RD
ACK
DATA
8 Bits
Data Byte: reads from
the register set by the
command byte.
NACK
P
P
FIGURE 5-2:
SMBus Protocol: Read Byte Format.
S
ADDRESS
7 Bits
RD
ACK
DATA
8 Bits
NACK
Slave Address
Data Byte: reads data from
the register commanded by
the last Read Byte or Write
Byte transmission
FIGURE 5-3:
SMBus Protocol: Receive Byte Format.
S = Start Condition
P = Stop Condition
Shaded = Slave Transmission
ACK = Acknowledge = 0
NACK = Not Acknowledged = 1
WR = Write = 0
RD = Read = 1
DS21734A-page 16
2002 Microchip Technology Inc.
TC654/TC655
6.0
REGISTER SET
The TC654/TC655 devices contain 9 registers that pro-
vide a variety of data and functionality control to the
outside system. These registers are listed below in
Table 6-1. Of key importance is the command byte
information, which is needed in the read and write pro-
tocols in order to select the individual registers.
TABLE 6-1:
Register
COMMAND BYTE ASSIGNMENTS
Command
Read
Write
POR Default State
Function
RPM Output 1
RPM Output 2
Fan Fault 1 Threshold
Fan Fault 2 Threshold
Configuration
0000 0000
0000 0001
0000 0010
0000 0011
0000 0100
0000 0101
0 0000 0000
0 0000 0000
0000 1010
0000 1010
0000 1010
00X0 0X00
RPM1
RPM2
FAN_FAULT1
FAN_FAULT2
CONFIG
STATUS
X
X
X
X
X
X
—
—
X
X
X
—
Status. See Section 6.4, Status
Register explanation of X
0000 0110
0000 0111
0000 1000
0000 0010
0101 0100
0000 000X
DUTY_CYCLE
MFR_ID
VER_ID
X
X
X
X
—
—
Fan Speed Duty Cycle
Manufacturer Identification
Version Identification:
(X = ‘0’ TC654, X = ‘1’ TC655)
25 RPM (9-bit) increments. This is selected via RES (bit
6<0>) in the Configuration Register, with ‘0’ = 50 RPM
and ‘1’ = 25 RPM. The default state is zero (50 RPM).
The maximum fan RPM value that can be read is
12775 RPM. If this value is exceeded, R2CO (bit 4<0>)
and R1CO (bit 3<0>) in the Status Register will be set
to a '1' to indicate that a counter overflow of the respec-
tive RPM register has occurred. Register 6-1 shows the
RPM output register 9-bit format.
6.1
RPM-OUTPUT1 & RPM-OUTPUT2
Registers (RPM1 & RPM2)
As discussed in Section 4.7, fan current pulses are
detected at the SENSE1 and SENSE2 inputs of the
TC654/TC655 device. The current pulse information is
used to calculate the fan RPM. The fan RPM data for
fans 1 & 2 is then written to registers RPM1 and RPM2,
respectively. RPM1 and RPM2 are 9-bit registers that
provide the RPM information in 50 RPM (8-bit) or
REGISTER 6-1:
RPM OUTPUT REGISTERS (RPM1 & RPM2)
D(8)
D(7)
D(6)
D(5)
D(4)
D(3)
D(2)
D(1)
D(0)
RPM
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
1
0
.
0
25
50
.
.
.
.
.
.
.
.
.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
12750
12775
2002 Microchip Technology Inc.
DS21734A-page 17
TC654/TC655
in RPM1 and RPM2 Registers) drops below the value
that is set in the Fan Fault Registers for more than
2.4sec, a fan fault indication will be given. F1F (bit
0<0>) and F2F (bit 1<0>) in the Status Register indi-
cate fan fault conditions for fan 1 and fan 2, respec-
tively. The FAULT output will also be pulled low in a fan
fault condition. Changing FFCLR (bit 7<0>) in the Con-
figuration Register will reset the fan fault bits in the Sta-
tus Register as well as the FAULT output. See
Register 6-2 for the Fan Fault Threshold Register 8-bit
format.
6.2
FAN_FAULT1 & FAN_FAULT2
Threshold Registers
(FAN_FAULT1 & FAN_ FAULT2)
The Fan Fault Threshold Registers (FAN_FAULT1 and
FAN_ FAULT2) are used to set the fan fault threshold
levels for fan 1 and fan 2, respectively. The Fan Fault
Registers are 8-bit, read/writable registers that allow
the fan fault RPM threshold to be set in 50 RPM incre-
ments. The default setting for both Fan Fault registers
is 500 RPM (0000 1010). The maximum set point
value is 12750 RPM. If the measured fan RPM (stored
REGISTER 6-2:
FAN FAULT THRESHOLD REGISTERS (FAN_FAULT1 & FAN_FAULT2)
D(7)
D(6)
D(5)
D(4)
D(3)
D(2)
D(1)
D(0)
RPM
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
0
.
0
0
1
.
0
0
0
.
0
50
100
.
.
.
.
.
.
.
.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
12700
12750
DS21734A-page 18
2002 Microchip Technology Inc.
TC654/TC655
V
duty cycle (fan speed) control method, select the
6.3
CONFIGURATION REGISTER
(CONFIG)
OUT
fan current pulses per rotation for fans 1 & 2 (for fan
RPM calculation) and put the TC654/TC655 device into
a shutdown mode to save power consumption. See
Register 6-3 below for the Configuration Register bit
descriptions.
The Configuration Register is an 8-bit read/writable
multi-function control register. This register allows the
user to clear fan faults, select RPM resolution, select
REGISTER 6-3: CONFIGURATION REGISTER (CONFIG)
R/W-0
R/W-0
RES
R/W-0
R/W-0
R/W-1
F2PPR
R/W-0
F1PPR
R/W-1
F1PPR
R/W-0
SDM
FFCLR
DUTYC
F2PPR
bit 7
bit 0
bit 7
FFCLR: Fan Fault Clear
1= Clear Fan Fault. This will reset the Fan Fault bits in the Status Register and the FAULT
output.
0= Normal Operation (default)
bit 6
bit 5
RES: Resolution Selection for RPM Output Registers
1= RPM Output Registers (RPM1 & RPM2) will be set for 25 RPM (9-bit) resolution.
0= RPM Output Registers (RPM1 & RPM2) will be set for 50 RPM (8-bit) resolution. (default)
DUTYC: Duty-Cycle Control Method
1= The V
duty-cycle will be controlled via the SMBus interface. The value for the V
OUT
OUT
duty-cycle will be taken from the duty-cycle register (DUTY_CYCLE).
0= The V duty-cycle will be controlled via the V analog input pin. The V duty-cycle
OUT
OUT
IN
value will be between 30% and 100% for V values between 1.62 V and 2.6 V typical. If
IN
the V pin is open when this mode is selected, the V
duty-cycle will default to 39.33%.
OUT
IN
(default)
bit 4-3
bit 2-1
bit 0
F2PPR: Fan 2 Pulses Per Rotation
The TC654/TC655 device uses this setting to understand how many current pulses per revolu-
tion Fan 2 should have. It then uses this as part of the calculation for the fan 2 RPM value in
the RPM2 Register. See Section 7.7 for application information on determining your fan’s
number of current pulses per revolution.
00= 1
01= 2 (default)
10= 4
11= 8
F1PPR: Fan 1 Pulses Per Rotation
The TC654/TC655 device uses this setting to understand how many current pulses per revolu-
tion Fan 1 should have. It then uses this as part of the calculation for the fan 1 RPM value for
the RPM1 Register. See Section 7.7 for application information on determining your fan’s
number of current pulses per revolution.
00= 1
01= 2 (default)
10= 4
11= 8
SDM: Shutdown Mode
1= Shutdown Mode. See Section 4.9 for more information on low power shutdown mode.
0= Normal Operation. (default)
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
2002 Microchip Technology Inc.
DS21734A-page 19
TC654/TC655
and over temperature indication are all available in the
Status Register. The Status Register is an 8-bit Read
only register with bits 6 and 7 unused. See Register 6-
4 below for the bit descriptions.
6.4
STATUS REGISTER (STATUS)
The Status Register provides all the information about
what is going on within the TC654/TC655 devices. Fan
fault information, V status, RPM counter overflow,
IN
REGISTER 6-4:
STATUS REGISTER (STATUS)
U-0
—
U-0
—
R-X
R-0
R2CO
R-0
R1CO
R-X
VSTAT
R-0
F2F
R-0
F1F
OTF
bit 7
bit 0
bit 7-6
bit 5
Unimplemented: Read as ‘0’
OTF: Over Temperature Fault Condition
For the TC654/TC655 device, this bit is set to the proper state immediately at startup and is
therefore treated as an unknown (X). If V is greater than the threshold required for 100% duty
IN
cycle on V
(2.6 V typical), then the bit will be set to a ‘1’. If it is less than the threshold, the
OUT
bit will be set to ‘0’. This is determined at power-up.
1= Over temperature condition has occurred.
0= Normal operation. V is less than 2.6 V.
IN
bit 4
bit 3
R2CO: RPM2 Counter Overflow
1= Fault condition. The maximum RPM reading of 12775 RPM in register RPM2 has been
exceeded. This bit will automatically reset to zero when the RPM reading comes back into
range.
0= Normal operation. RPM reading is within limits (default).
R1CO: RPM1 Counter Overflow
1= Fault condition. The maximum RPM reading of 12775 RPM in register RPM1 has been
exceeded. This bit will automatically reset to zero when the RPM reading comes back into
range.
0= Normal operation. RPM reading is within limits (default).
bit 2
VSTAT: V Input Status
IN
For the TC654/TC655 devices, the V pin status is checked immediately at power-up. If no
IN
external thermistor or voltage output network is connected (V is open), this bit is set to a ‘1’.
IN
If an external network is detected, this bit is set to ‘0’. If the V pin is open and SMBus operation
IN
OUT
has not been selected in the Configuration Register, the V
duty cycle will default to 39.33%.
1= V is open.
IN
0= Normal operation. voltage present at V .
IN
bit 1
bit 0
F2F: Fan2 Fault
1= Fault Condition. The value for fan RPM in the RPM2 Register has fallen below the value
set in the FAN_FAULT2 Threshold Register. The speed of Fan 2 is too low and a fault con-
dition is being indicated. The FAULT output will be pulled low at the same time. This fault
bit can be cleared using the Fan Fault Clear bit (FFCLR (bit 7<0>)) in the Configuration
Register.
0= Normal Operation (default).
F1F: Fan1 Fault
1= Fault Condition. The value for fan RPM in the RPM1 Register has fallen below the value
set in the FAN_FAULT1 Threshold Register. The speed of Fan 1 is too low and a fault con-
dition is being indicated. The FAULT output will be pulled low at the same time. This fault
bit can be cleared using the Fan Fault Clear bit (FFCLR (bit 7<0>)) in the Configuration
Register.
0= Normal Operation (default).
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
DS21734A-page 20
2002 Microchip Technology Inc.
TC654/TC655
6.5
DUTY-CYCLE Register
(DUTY_CYCLE)
6.6
Manufacturer’s Identification
Register (MFR_ID)
The DUTY_CYCLE register is a 4-bit read/writable reg-
This register allows the user to identify the manufac-
turer of the part. The MFR_ID register is an 8-bit Read
only register. See Register 6-6 for the Microchip manu-
facturer ID.
ister used to control the duty cycle of the V
output.
OUT
The controllable duty cycle range via this register is
30% to 100%, with programming steps of 4.67%.This
method of duty cycle control is mainly used with the
SMBus interface. However, if the V method of duty
REGISTER 6-6:
MANUFACTURER’S
IDENTIFICATION
IN
cycle control has been selected (or defaulted to), and
the V pin is open, the duty cycle will go to the default
IN
REGISTER (MFR_ID)
setting of this register, which is 0010 (39.33%). The
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
duty cycle settings are shown in Register 6-5.
0
1
0
1
0
1
0
0
REGISTER 6-5:
DUTY-CYCLE REGISTER
(DUTY_CYCLE)
6.7
Version ID Register (VER_ID)
D(2)
D(1)
D(0)
Duty-Cycle
D(3)
This register is used to indicate which version of the
device is being used, either the TC654 or the TC655.
This register is a simple 2-bit Read only register.
0
0
0
0
0
0
0
0
1
0
1
0
30%
34.67%
39.33% (default for VIN
open and when SMBus
is not selected)
REGISTER 6-7:
VERSION ID REGISTER
(VER_ID)
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
44%
D[1] D[0] Version
48.67%
53.33%
58%
62.67%
67.33%
72%
76.67%
81.33%
86%
90.67%
95.33%
100%
0
0
0
1
TC654
TC655
2002 Microchip Technology Inc.
DS21734A-page 21
TC654/TC655
7.0
APPLICATIONS INFORMATION
SDA
SCLK
7.1
Connecting to the SMBus
PIC16F876
Microcontroller
The SMBus is an open collector bus, requiring pull-up
resistors connected to the SDA and SCLK lines. This
configuration is shown in Figure 7-1.
24LC01
EEPROM
TC654/TC655
Fan Speed
Controller
V
DD
TCN75
Temperature
Sensor
TC654/TC655
R
R
SDA
SCLK
FIGURE 7-2:
Multiple Devices on SMBus.
7.2 Setting the PWM Frequency
Range for R: 13.2 kΩ to 46 kΩ for V = 5.0 V
DD
The PWM frequency of the V
output is set by the
F
OUT
capacitor value attached to the C pin. The PWM fre-
FIGURE 7-1:
SMBus.
Pull-up Resistors On
quency will be 30 Hz (typical) for a 1 µF capacitor. The
relationship between frequency and capacitor value is
linear, making alternate frequency selections easy.
The number of devices connected to the bus is limited
only by the maximum rise and fall times of the SDA
2
As stated in previous sections, the PWM frequency
should be kept in the range of 15 Hz to 35 Hz. This will
eliminate the possibility of having audible frequencies
when varying the duty cycle of the fan drive.
and SCLK lines. Unlike I C specifications, SMBus
does not specify a maximum bus capacitance value.
Rather, the SMBus specification calls out that the max-
imum current through the pull-up resistor be 350 µA
(minimum, 100 µA, is also specified). Therefore, the
value of the pull-up resistors will vary depending on the
A very important factor to consider when selecting the
PWM frequency for the TC654/TC655 devices is the
RPM rating of the selected fan and the minimum duty
cycle that you will be operating at. For fans that have a
full speed rating of 3000 RPM or less, it is desirable to
use a lower PWM frequency. A lower PWM frequency
allows for a longer time period to monitor the fan cur-
rent pulses. The goal is to be able to monitor at least
system’s bias voltage, V . Minimizing bus capaci-
DD
tance is still very important as it directly effects the rise
and fall times of the SDA and SCLK lines. The range
for pull-up resistor values for a 5 V system are shown
in Figure 7-1.
Although SMBus specifications only require the SDA
and SCLK lines to pull down 350 µA, with a maximum
voltage drop of 0.4 V, the TC654/TC655 has been
designed to meet a maximum voltage drop of 0.4 V,
with 3 mA of current. This allows lower values of pull-
up resistors to be used, which will allow higher bus
capacitance. If this is to be done, though, all devices on
the bus must be able to meet the same pull down
current requirements as well.
two fan current pulses during the on time of the V
output.
OUT
Example: Your system design requirement is to oper-
ate the fan at 50% duty cycle when ambient tempera-
tures are below 20°C. The fan full speed RPM rating is
3000 RPM and has four current pulses per rotation. At
50% duty cycle, the fan will be operating at approxi-
mately 1500 RPM.
A possible configuration using multiple devices on the
SMBus is shown in Figure 7-2.
EQUATION
60 × 1000
Time for one revolution (msec.) = ----------------------- = 40
1500
If one fan revolution occurs in 40 msec, then each fan
pulse occurs 10 msec apart. In order to detect two fan
current pulses, the on time of the V
pulse must be
OUT
at least 20 msec. With the duty cycle at 50%, the total
period of one cycle must be at least 40 msec, which
makes the PWM frequency 25 Hz. For this example, a
PWM frequency of 20 Hz is recommended. This would
define a C capacitor value of 1.5 µF.
F
DS21734A-page 22
2002 Microchip Technology Inc.
TC654/TC655
EQUATION
7.3
Temperature Sensor Design
V
DD × R2
As discussed in previous sections, the V analog input
IN
---------------------------------------
V(t1) =
V(t2) =
has a range of 1.62 V to 2.6 V (typical), which repre-
R
TEMP(t1) + R2
sents a duty cycle range on the V
output of 30% to
OUT
100%, respectively. The V voltages can be thought of
V
DD × R2
IN
---------------------------------------
TEMP(t2) + R2
as representing temperatures. The 1.62 V level is the
low temperature at which the system only requires 30%
fan speed for proper cooling. The 2.6 V level is the high
temperature, for which the system needs maximum
cooling capability. Therefore, the fan needs to be at
100% speed.
R
In order to solve for the values of R and R , the values
1
2
for V and the temperatures at which they are to occur
IN
need to be selected. The variables, t1 and t2, represent
the selected temperatures. The value of the thermistor
at these two temperatures can be found in the ther-
mistor data sheet. With the values for the thermistor
One of the simplest ways of sensing temperature over
a given range is to use a thermistor. By using an NTC
thermistor as shown in Figure 7-3, a temperature vari-
ant voltage can be created.
and the values for V , you now have two equations
IN
from which the values for R and R can be found.
1
2
Example: The following design goals are desired:
VDD
• Duty Cycle = 50% (V = 1.9 V) with Temperature
IN
(t1) = 30°C
IDIV
• Duty Cycle = 100% (V = 2.6 V) with Tempera-
IN
ture (t2) = 60°C
Using a 100 kΩ thermistor (25°C value), we look up the
Rt
R1
R2
thermistor values at the desired temperatures:
• R = 79428 Ω @ 30°C
VIN
t
• R = 22593 Ω @ 60°C
t
Substituting these numbers into the given equations,
we come up with the following numbers for R and R .
1
2
• R = 34.8 kΩ
1
• R = 14.7 kΩ
2
FIGURE 7-3:
Temperature Sensing
Circuit.
140000
120000
100000
80000
60000
40000
20000
4.000
3.500
3.000
2.500
2.000
1.500
1.000
0.500
0.000
Figure 7-3 represents a temperature dependent volt-
VIN Voltage
age divider circuit. R is a conventional NTC thermistor,
t
R and R are standard resistors. R and R form a par-
1
2
1
t
allel resistor combination that will be referred to as
R
(R
= R * R / R + R ). As the temperature
TEMP
TEMP 1 t 1 t
increases, the value of R decreases and the value of
t
NTC Thermistor
100K @ 25ºC
R
V
will decrease with it. Accordingly, the voltage at
increases as temperature increases, giving the
TEMP
IN
RTEMP
desired relationship for the V input. The purpose of
IN
0
R is to help linearize the response of the sensing net-
1
work. Figure 7-4 shows an example of this.
Temperature (ºC)
There are many values that can be chosen for the NTC
thermistor. There are also thermistors which have a lin-
ear resistance instead of logarithmic, which can help to
FIGURE 7-4: How Thermistor Resistance,
V , And R Vary With Temperature.
TEMP
eliminate R . If less current draw from V is desired,
IN
1
DD
then a larger value thermistor should be chosen. The
Figure 7-4 graphs three parameters versus tempera-
voltage at the V pin can also be generated by a volt-
IN
ture. They are R , R in parallel with R , and V . As
t
1
t
IN
age output temperature sensor device. The key is to
described earlier, you can see that the thermistor has a
get the desired V voltage to system (or component)
IN
logarithmic resistance variation. When put in parallel
temperature relationship.
with R , though, the combined resistance becomes
1
more linear, which is the desired effect. This gives us
The following equations apply to the circuit in
Figure 7-3.
the linear looking curve for V .
IN
2002 Microchip Technology Inc.
DS21734A-page 23
TC654/TC655
TABLE 7-1:
R
VS. FAN CURRENT
SENSE
7.4
FanSense Network (R
&
SENSE
C
)
Nominal Fan Current
SENSE
The network comprised of R
R
(ohm)
SENSE
(mA)
and C
allows
SENSE
SENSE
the TC654/TC655 devices to detect commutation of the
fan motor. R converts the fan current into a volt-
50
9.1
SENSE
100
150
200
250
300
350
400
450
500
4.7
3.0
2.4
2.0
1.8
1.5
1.3
1.2
1.0
age. C
AC couples this voltage signal to the
SENSE
SENSE pins (SENSE1 & SENSE2). The goal of the
SENSE network is to provide a voltage pulse to the
SENSE pin that has a minimum amplitude of 120 mV.
This will ensure that the current pulse caused by the
fan commutation is recognized by the TC654/TC655
device.
A 0.1 µF ceramic capacitor is recommended for
C
. Smaller values will require larger sense resis-
SENSE
tors be used. Using a 0.1 µF capacitor results in rea-
sonable values for R
. Figure 7-5 illustrates a
SENSE
Figure 7-6 shows some typical waveforms for the fan
current and the voltage at the Sense pins.
typical SENSE network.
FAN
1
FAN
2
RISO1
715 Ω
RISO2
VOUT
715 Ω
SENSE1
CSENSE1
RSENSE1
(0.1 µF typical)
SENSE2
CSENSE2
(0.1 µF typical)
RSENSE2
FIGURE 7-6:
Typical Fan Current and
Note: See Table 7-1 for RSENSE1 and RSENSE2 values.
Sense Pin Waveforms.
FIGURE 7-5:
The value of R
Typical Sense Network.
will change with the current rating
7.5
Output Drive Device Selection
SENSE
of the fan. A key point is that the current rating of the
fan specified by the manufacturer may be a worst case
rating. The actual current drawn by the fan may be
lower than this rating. For the purposes of setting the
The TC654/TC655 is designed to drive two external
NPN transistors or two external N-channel MOSFETs
as the fan speed modulating elements. These two
arrangements are shown in Figure 7-7. For lower cur-
rent fans, NPN transistors are a very economical
choice for the fan drive device. It is recommended that,
for higher current fans (500 mA and above), MOSFETs
be used as the fan drive device. Table 7-2 provides
some possible part numbers for use as the fan drive
element.
value for R
measured.
, the operating fan current should be
SENSE
Table 7-1 shows values of R
according to the
SENSE
nominal operating current of the fan. The fan currents
are average values. If the fan current falls between two
of the values listed, use the higher resistor value.
When using an NPN transistor as the fan drive ele-
ment, a base current limiting resistor must be used.
This is shown in Figure 7-7.
When using MOSFETs as the fan drive element, it is
very easy to turn the MOSFETs on and off at very high
rates. Because the gate capacitances of these small
DS21734A-page 24
2002 Microchip Technology Inc.
TC654/TC655
MOSFETs are very low, the TC654/TC655 can charge
and discharge them very quickly, leading to very fast
edges. Of key concern is the turn-off edge of the MOS-
FET. Since the fan motor winding is essentially an
inductor, once the MOSFET is turned off, the current
that was flowing through the motor wants to continue to
flow. If the fan does not have internal clamp diodes
around the windings of the motor, there is no path for
this current to flow through, and the voltage at the drain
of the MOSFET may rise until the drain to source rating
of the MOSFET is exceeded. This will most likely cause
the MOSFET to go into avalanche mode. Since there is
very little energy in this occurrence, it will probably not
fail the device, but it would be a long term reliability
issue. The following is recommended:
• Ask how the fan is designed. If the fan has clamp
diodes internally, you will not experience this
problem. If the fan does not have internal clamp
diodes, it is a good idea to put one externally
(Figure 7-8). You can also put a resistor between
V
and the gate of the MOSFET, which will help
OUT
slow down the turn-off and limit this condition.
VDD
VDD
FAN
FAN
RBASE
Q1
VOUT
Q1
VOUT
RSENSE
RSENSE
GND
GND
a) Single Bipolar Transistor
b) N-Channel MOSFET
FIGURE 7-7:
Output Drive Device Configurations.
TABLE 7-2:
Device
FAN DRIVE DEVICE SELECTION TABLE (NOTE 2)
Max Vbe sat /
Fan Current
(mA)
Suggested
Package
Min hfe
Vce/V
DS
Vgs(V)
Rbase (ohms)
MMBT2222A
MPS2222A
MPS6602
SI2302
MGSF1N02E
SI4410
SOT-23
TO-92
TO-92
SOT-23
SOT-23
SO-8
1.2
1.2
1.2
2.5
2.5
4.5
4.5
50
50
50
NA
NA
NA
NA
40
40
40
20
20
30
60
150
150
500
500
500
1000
500
800
800
301
Note 1
Note 1
Note 1
Note 1
SI2308
SOT-23
Note 1: A series gate resistor may be used in order to control the MOSFET turn-on and turn-off times.
2: These drive devices are suggestions only. Fan currents listed are for individual fans.
2002 Microchip Technology Inc.
DS21734A-page 25
TC654/TC655
The first piece of information required is the fan's full
speed RPM rating. The fan RPM rating can then be
converted to give the time for one revolution using the
following equation:
FAN
EQUATION
60 × 1000
Time for one revolution (msec.) = -----------------------
Fan RPM
The fan current can now be monitored over this time
period. The number of pulses occurring in this time
period is the fan's "Current Pulses per Rotation" rating
which is needed in order to accurately read fan RPM.
Q1
VOUT
RSENSE
Example: The full speed fan RPM rating is 8200 RPM.
From this, the time for one fan revolution is calculated
to be 7.3 msec, using the previously discussed equa-
tion. Using a current probe, the fan current can be mon-
itored as the fan is operating at full speed. Figure 7-9
shows the fan current pulses for this example. The
7.44 msec window, marked by the cursors, is very near
the 7.3 msec calculated above, and is within the toler-
ance of the fan ratings. Four current pulses occur within
this 7.44 msec time frame. Given this information,
F2PPR (bits 4-3<01>) and F1PPR (bits 2-1<01>) in the
Configuration Register, should be set to '10' to indicate
4 current pulses per revolution.
GND
Q1- N-Channel MOSFET
FIGURE 7-8:
Clamp Diode For Fan Turn-
off.
7.6
Bias Supply Bypassing and Noise
Filtering
The bias supply (V ) for the TC654/TC655 devices
DD
should be bypassed with a 1 µF ceramic capacitor. This
capacitor will help supply the peak currents that are
required to drive the base/gate of the external fan drive
devices.
As the V pin controls the duty cycle in a linear fashion,
IN
any noise on this pin can cause duty cycle jittering. For
this reason, the V pin should be bypassed with a
IN
0.01 µF capacitor.
In order to keep fan noise off of the TC654/TC655
device ground, individual ground returns for the TC654/
TC655 and the low side of the fan current sense resis-
tor should be used.
7.7
Determining Current Pulses Per
Revolution of Fans
There are many different fan designs available in the
marketplace today. The motor designs can vary and,
along with it, the number of current pulses in one fan
revolution. In order to correctly measure and commu-
nicate the fan speed, the TC654/TC655 must be pro-
grammed for the proper number of fan current pulses
per revolution. This is done by setting the F2PPR and
F1PPR bits in the Configuration Register to the proper
values (see Section 6.3 for settings). A fan's current
pulses per revolution can be determined in the
following manner.
FIGURE 7-9:
Four Current Pulses Per
Revolution Fan.
7.8
How to Eliminate False Current
Pulse Sensing
During the PWM mode of operation, some fans will
generate an extra current pulse. This pulse occurs
when the external drive device is turned on and is, in
most cases, caused by the fan's electronics that control
the fan motor. This pulse does not represent true fan
current and needs to be blanked out. This is particularly
important for detecting a fan in a locked rotor condition.
DS21734A-page 26
2002 Microchip Technology Inc.
TC654/TC655
Figure 7-10 shows the voltage pulse at the Sense pin,
which is caused by the fan's "extra" current pulse
during PWM output turn-on.
FAN
FAN
2
1
RISO1
CSLOW1
(0.1uF
typical)
RISO2
VOUT
Sense Pin Voltage
"Extra Pulse"
CSLOW2
SENSE1
(0.1 µF typical)
CSENSE
RSENSE1
(0.1 µF typical)
TC654/
TC655
SENSE2
GND
V
PWM
CSENSE2
OUT
RSENSE2
(0.1 µF typical)
FIGURE 7-11:
Transistor Drive with C
SLOW
Capacitor.
FIGURE 7-10:
Extra Pulse at Sense Pin.
This problem occurs mainly with fans that have a cur-
rent waveshape like the one shown in Figure 7-9. For
configurations where an NPN transistor is being used
as the external drive device, the typical Rsense and
FAN
1
FAN
2
C
scheme can continue to be used to sense the
SENSE
fan current pulses. In order to eliminate the extra cur-
rent pulse, a slow down capacitor can be placed from
the base of the transistor to ground. A 0.1 µF capacitor
is appropriate in most cases. This arrangement is
shown in Figure 7-11. This capacitor will help to slow
down the turn-on edge of the transistor and reduce the
amplitude of the extra current pulse.
VOUT
RSLOW1
(1 kΩtypical)
SENSE1
CSLOW1
(1000pF typical)
TC654/
TC655
For configurations using an N-channel MOSFET as the
drive device, the slow down capacitor does not fix all
conditions and the current sensing scheme must be
changed. Since the current for this type of fan always
RSENSE1
RSLOW2
(1 kΩ typical)
SENSE2
GND
RSENSE2
returns to zero, the coupling capacitor (C
) is not
CSLOW
SENSE
2
(1000pF typical)
needed. Instead, it will be replaced by an R-C configu-
ration to eliminate the voltage pulse generated by the
extra current pulse. This new sensing configuration is
shown in Figure 7-12. The values of the resistor/capac-
itor combination should be adjusted so that the voltage
pulse generated by the extra current pulse is smoothed
and is not registered by the TC654/TC655 as a true fan
FIGURE 7-12:
FET Drive with R
/
SLOW
C
Sense Scheme.
SLOW
current pulse. Typical values for R
are 1 KΩ and 1000 pF, respectively.
and C
SLOW
SLOW
2002 Microchip Technology Inc.
DS21734A-page 27
TC654/TC655
8.0
8.1
PACKAGING INFORMATION
Package Marking Information
10-Pin MSOP Device
1
2
3
10
9
TC654E
TC655E
YWWNNN
8
7
6
4
5
Legend:
1
2
3
4
Part Number and temperature range
Part Number and temperature range
Year and work week
Lot ID
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*
Standard device marking consists of Microchip part number, year code, week code, and traceability
code.
DS21734A-page 28
2002 Microchip Technology Inc.
TC654/TC655
8.2
Taping Form
Component Taping Orientation for 10-Pin MSOP Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size:
Package
10-Pin MSOP
Carrier Width (W)
Pitch (P)
8 mm
Part Per Full Reel
Reel Size
13 in.
12 mm
2500
8.3
Package Information
10-Pin MSOP
PIN 1
.122 (3.10) .201 (5.10)
.114 (2.90) .183 (4.65)
.012 (0.30)
.006 (0.15)
.122 (3.10)
.114 (2.90)
.043 (1.10)
MAX.
.009 (0.23)
.005 (0.13)
6° MAX.
.006 (0.15)
.002 (0.05)
.028 (0.70)
.016 (0.40)
.020 (0.50)
Dimensions: inches (mm)
2002 Microchip Technology Inc.
DS21734A-page 29
TC654/TC655
NOTES:
DS21734A-page 30
2002 Microchip Technology Inc.
TC654/TC655
Systems Information and Upgrade Hot Line
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web (WWW) site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape or Microsoft
Explorer. Files are also available for FTP download
from our FTP site.
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive any currently available upgrade kits.The
Hot Line Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
013001
ConnectingtotheMicrochipInternetWebSite
The Microchip web site is available by using your
favorite Internet browser to attach to:
www.microchip.com
The file transfer site is available by using an FTP ser-
vice to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A vari-
ety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
2002 Microchip Technology Inc.
DS21734A-page 31
TC654/TC655
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
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Application (optional):
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Y
N
Literature Number:
DS21734A
Device:
TC654/TC655
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this data sheet easy to follow? If not, why?
4. What additions to the data sheet do you think would enhance the structure and subject?
5. What deletions from the data sheet could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
8. How would you improve our software, systems, and silicon products?
DS21734A-page 32
2002 Microchip Technology Inc.
TC654/TC655
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Examples:
Temperature Package
Range
a)
b)
c)
d)
TC654EUN:: PWM Fan Speed Controller
w/Fault Detection
TC654EUNTR: PWM Fan Speed Controller
w/Fault Detection (Tape and Reel)
TC655EUN: PWM Fan Speed Controller
w/Fault Detection
TC655EUNTR: PWM Fan Speed Controller
w/Fault Detection (Tape and Reel)
Device:
TC654:
PWM Fan Speed Controller w/Fault Detection
TC654T: PWM Fan Speed Controller w/Fault Detection
(Tape and Reel)
TC655:
PWM Fan Speed Controller w/Fault Detection
TC655T: PWM Fan Speed Controller w/Fault Detection
(Tape and Reel)
Temperature Range:
Package:
E
=
=
-40°C to +85°C
UN
Plastic Micro Small Outline (MSOP), 10-lead
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2002 Microchip Technology Inc.
DS21734A-page33
TC654/TC655
NOTES:
DS21734A-page 34
2002 Microchip Technology Inc.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Tech-
nology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, MXLAB, PICC, PICDEM, PICDEM.net, rfPIC, Select
Mode and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
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and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
®
PICmicro 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
2002 Microchip Technology Inc.
DS21734A - page 35
M
WORLDWIDE SALES AND SERVICE
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Microchip Technology Japan K.K.
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Corporate Office
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05/16/02
DS21734A-page 36
2002 Microchip Technology Inc.
TC655EUN 替代型号
型号 | 制造商 | 描述 | 替代类型 | 文档 |
TC655EUNTR | MICROCHIP | BRUSHLESS DC MOTOR CONTROLLER, PDSO10, PLASTIC, MSOP-10 | 类似代替 |
TC655EUN 相关器件
型号 | 制造商 | 描述 | 价格 | 文档 |
TC655EUNT | MICROCHIP | BRUSHLESS DC MOTOR CONTROLLER | 获取价格 | |
TC655EUNTR | MICROCHIP | BRUSHLESS DC MOTOR CONTROLLER, PDSO10, PLASTIC, MSOP-10 | 获取价格 | |
TC65A | CDE | Axial Leaded Aluminum Electrolytic Capacitors | 获取价格 | |
TC660 | TELCOM | 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER | 获取价格 | |
TC660COA | TELCOM | 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER | 获取价格 | |
TC660CPA | TELCOM | 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER | 获取价格 | |
TC660EOA | TELCOM | 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER | 获取价格 | |
TC660EPA | TELCOM | 100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER | 获取价格 | |
TC664 | MICROCHIP | SMBus⑩ PWM Fan Speed Controllers With Fan Fault Detection | 获取价格 | |
TC664EUN | MICROCHIP | SMBus⑩ PWM Fan Speed Controllers With Fan Fault Detection | 获取价格 |
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