E-L9935 概述
二相步进电机驱动器 电机驱动器
E-L9935 数据手册
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PDF下载L9935
TWO-PHASE STEPPER MOTOR DRIVER
2 X 1.1A FULL BRIDGE OUTPUTS
INTEGRATED CHOPPING CURRENT REGU-
LATION
MINIMIZED POWER DISSIPATION DURING
FLYBACK
OUTPUT STAGES WITH CONTROLLED
OUTPUT VOLTAGE SLOPES TO REDUCE
ELECTROMAGNETIC RADIATION
SHORT-CIRCUIT PROTECTION OF ALL
OUTPUTS
ERROR-FLAG FOR OVERLOAD, OPEN LOAD
AND OVERTEMPERATURE PREALARM
DELAYED CHANNEL SWITCH-ON TO RE-
DUCE PEAK CURRENTS
PowerSO20
ORDERING NUMBER: L9935
DESCRIPTION
The L9935 is a two-phase stepper motor driver
circuit suited to drive bipolar stepper motors. The
device can be controlled by a serial interface
(SPI). All protections required to design a well
protected system (short-circuit, overtemperature,
cross conductionetc.) are integrated.
MAX. OPERATING SUPPLY VOLTAGE 24V
STANDBY CONSUMPTION TYPICALLY40µA
SERIAL INTERFACE (SPI)
BLOCK DIAGRAM
1
20
GND
GND
~
19
SR
A
2
18
DRIVER
LOGIC
OUT
A1
OUT
A2
17
16
N.C.
V
S
3
SCK
4
15
14
SDI
OSC
OSCILLATOR
DIAGNOSTIC
BIASING
5
SDO
COMMON
LOGIC
6
7
8
VCC
CSN
EN
C
DRV
9
13
DRIVER
LOGIC
OUT
OUT
B1
B2
12
11
SR
B
~
10
GND
GND
D99AT415
November 1999
1/19
L9935
PIN CONNECTION
10
9
8
7
6
5
4
3
2
1
11
12
13
14
15
16
17
18
19
20
GND
GND
SR
OUT
B1
B
EN
OUT
B2
CSN
VCC
SDO
SDI
C
DRV
OSC
V
S
N.C.
OUT
SCK
A2
OUT
SR
A
A1
GND
GND
D99AT416
PIN FUNCTIONS
Pin No
Name
GND
Description
1,10,11,20
Ground. (All ground pins are internally connected to the frame of the device).
Output 1 of full bridge 1
2
3
OUTA1
SCK
SDI
Clock for serial interface (SPI)
Serial data input
4
5
SDO
VCC
CSN
EN
Serial data output
6
5V logic suplly voltage
7
Chip select (Low active)
8
Enable (Low active)
9
OUTB1
SRB
Output 1 of full bridge 2
12
13
14
15
16
17
18
19
Cyrrent sense resistor of the chopper regulator for OUTB
Output 2 of full bridge 2
OUTB2
CDRV
OSC
VS
Charge pump buffer capacitor
Oscillator capacitor or external clock
Supply voltage
NC
Not connected
OUTA2
SRA
Output of full bridge 1
Current sense resistor of the chopper regulator for OUTA
2/19
L9935
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
VS
DC Supply Voltage
-0.3 to 35
-0.3 to 40
VSPulsed
VOUT (Ai/Bi)
Pulsed supply voltage T < 400ms
Output Voltages
V
internally clamped to VS
or GND depending on the
current direction
IOUT (Ai/Bi)
DC Output Currents
Peak Output Currents (T/tp ≥ 10)
1.2
±2.5
A
A
±
VSRA/SRB
VCC
Sense Resistor Voltages
Logic Supply Voltages
-0.3 to 6.2
-0.3 to 6.2
-0.3 to 10
-2 to 8
V
V
V
V
VCDRV
Charge Pump Buffer Voltage versus VS
Logic Input Voltages
V
SCK, VSDI,
V
CSN, VEN
VOSC, VSDO
Oscillator Voltage Range, Logic Output
-0.3 to VCC +0.3
V
Note: ESD for all pins, except pins SDO, SRA and SRB, are according to MIL883C, tested at 2kV, corresponding to a maximum energy
dissipation of 0.2mJ. SDO, SRA and SRB pins are tested with 800V.
THERMAL DATA
Symbol
Rth j-case
Rth j-amb
Parameter
Value
5
Unit
°C/W
°C/W
Typical Thermal Resistance Junction to Case
Typical Thermal Resistance Junction to Ambient
35
(6cm2 Ground Plane 35µm Thhickness)
Rth j-amb, FR4
Typical Thermal Resistance Junction to Ambient
(soldered on a FR 4 board with through holes for heat transfer
and external heat sink applied)
8
°C/W
TS
Storage Temperature
-40 to 150
180
°C
°C
TSD
Typical Thermal Shut-Down Temperature
ELECTRICAL CHARACTERISTICS
(8V ≤ VS ≤ 24V; -40°C ≤ Tj ≤ 150°C; 4.5V ≤ VCC ≤ 5.5V, unless oth-
erwise specified.)1)
Symbol
SUPPLY
IS85
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Total Supply Current
VS = 14V
40
100
A
µ
IS + IVCC (Both Bridges Off)
EN = HIGH
TJ ≤ 85°C
ISOP
Operating Supply Current
5V Supply Current
IOUT Ai/Bi = 0
4.5
1.4
mA
mA
fOSC = 30kHz
VS = 14V
ICC
FULL BRIDGES
EN = LOW
10
ROUT, Sink
RDSON of Sink Transistors
Current bit
combinations LL, LH,
0.4
0.4
0.7
0.7
Ω
Ω
ROUT, Source RDSON of Source Transistors
VS 12V
≥
ROUT8, Sink
RDSON of Sink Transistors +
DSON of Source Transistors
Current bit
Combinations LL, LH,
VS = 8V
1.6
3
Ω
R
VFWD
VREV
tr, tf
Forward Voltage of the DMOS
Body Diodes
EN = HIGH
1
1.4
0.9
1.5
V
V
I
FWD = 1A; VS ≥ 12V
EN = LOW
REV = 1A
Reverse DMOS Voltage
0.5
0.6
I
Rise and Fall Time of Outputs
OUTAi/Bi
0.1...0.9 VOUT VS = 14V
Chopping 550mA
0.3
s
µ
3/19
L9935
ELECTRICAL CHARACTERISTICS
(continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SWITCH OFF THRESHOLD OF THE CHOPPER (R1 R = 0.33 )
Ω
2
2)
VSRHL
VSRLH
VSRLL
Voltage Drops Across R1 R2
(Voltage at Pin SRA or SRB vs.
GND)
Bit 5, 2 = H Bit 4, 1 = L
Bit 5, 2 = L Bit 4, 1 = H
Bit 5, 4, 2, 1 = L
12
20
35
mV
mV
mV
160
270
180
300
210
340
ENABLE INPUT EN
VEN High
High Input Voltage
VCC
-1.2V
V
VEN low
VEN Hyst
IEN High
IEN Low
Low Input Voltage
Enable Hysteresis
High Input Current
Low Input Current
1.2
V
V
0.1
-10
-3
VHigh = VCC
VLOW = 0V
0
10
A
A
µ
µ
-10
-30
LOGIC INPUTS SDI. SCK, CSN
VHIGH
VLOW
VHyst
IHIGH
ILow
High Input Voltage
Low Input Voltage
Hysteresis
EN = LOW
2.6
-0.3
0.8
-10
-3
8
V
1
V
V
1.2
0
1.6
10
-30
High Input Current
Low Input Current
VHigh = VCC
VLow = 0V
µA
µA
-10
LOGIC OUTPUTS (SDO)
VSDO,High High Output Voltage
ISDO = -1mA
ISDO = 1mA
VCC -1
VCC
-0.17
VCC
1
V
V
VSDO,Low
Low Output Voltage
0.17
OSCILLATOR
VOSC, H
VOSC, L
IOSC
High Peak Voltage
EN = LOW
EN = LOW
2.2
1
2.46
1.23
62
2.6
1.4
V
V
Low Peak Voltage
Charging/Discharging Current
Oscillator Frequency
45
80
µA
kHz
fOSC
COSC = 1nF
20
25
31
tStart
Oscillator Startup Time
EN = High
Low
2/fosc
5/fosc
8/fosc
→
THERMAL PROTECTION
TJ-OFF
Thermal Shut-Down
Temperature
160
180
200
30
°C
TJ-ALM
Thermal Prealarm
Margin Prealarm/Shut-Down
130
10
160
20
°C
∆TMGN
K
1) Parameters are tested at 125°C. Values at 140°C are guaranteed by design and correlation.
2) Currents of combinations LH and LL are sensed at the external resistors. The Current of bit combination HL is sensed internally and
cannot be adjusted by changing the sense resistors.
4/19
L9935
Figure 1. General Application Circuit Proposal.
GND
1
20
19
GND
~
SR
A
R1 0.33Ω
OUT
2
3
18
OUT
N.C.
A1
DRIVER
LOGIC
A2
17
16
SCK
V
S
SDI
SDO
4
5
7
8
6
15
14
OSC
SDI
INTERFACE
OSCILLATOR
DIAGNOSTIC
BIASING
C
1nF
STEPPER
MOTOR
OSC
COMMON
LOGIC
CSN
C
Driver
100nF
POWER
SUPPLY
µC
EN
C
DRV
C1
C2
10µF
+5V VCC
100nF
100nF
OUT
9
13
OUT
B1
B2
DRIVER
LOGIC
12
11
SR
B
R2 0.33Ω
GND
~
GND
10
D99AT417
loads with a choppercurrent regulation.
Application hints:
C1 and C2 should be placed as close to the de-
vice as possible. Low ESR of C2 is advanta-
geous. Peak currents through C1 and C2 may
reach 2A. Care should be taken that the reso-
nance of C1, C2 together with supply wire induc-
tances is not the chopping frequencyor a multiple
of it.
Outputs A1 and A2 belong to full bridge A
Outputs B1 and B2 belong to full bridge B
The polarity of the bridges can be controlled by
bit0 and bit3 (for full bridge A, bit3, for full bridge
B, bit0). Bit5, bit4 (for full bridge A) and bit2, bit1
(for full bridge B) control the currents. Bit3 high
leads to output A1 high. Bit0 high leads to output
B1 high.
FUNCTIONAL DESCRIPTION
Basic structure
Current setting Table 1 using a 0.33W sense re-
sistor.
The L9935 is a dual full bridge driver for inductive
Table 1.
bit5, bit2
bit4, bit1
IQX (Typ.)
IRX/max
Remark
H
H
L
H
L
H
L
0
0%
60mA
550mA
900mA
inernally sensed
61%
100%
L
5/19
L9935
Figure 2. Typical average load current dependence on RSense
.
I
D99AT418
typical current limitation of high side transistor
A
1.8
limit recommended for usual application
suggested range of operation
1.1
1
0.8
0.6
0.4
0.2
I
LL
I
LH
I
HL
0.075
0
R
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6
Ω
Full Bridge Function
Figure 3. Displays a full bridge including the current sense circuit.
V
S
M
M
M
11
21
D
D
D
D
D
D
D
21
11
11
21
A
2
A
1
DRIVE
LOGIC
bit3, (bit0)
M
LOAD
12
22
D
22
12
12
22
-
COMP1
τ
+
R
1
R
EXTERNAL
INHIBIT
ON HH
1
bit5, (bit2)
bit4, (bit1)
SENSE RESISTOR
CURRENT
LOGIC
CURRENT ADJUST
D99AT419
6/19
L9935
by capacitiveload componentsup to 5 nF.
No current:
Turning off for example M12 will yield a flyback
current through D11. (So now the free wheeling
current flows through M21, the load and D11).
This leads to a slow current decay during flyback.
Maximum duty cycles of more than 85% (at fOSC
= 25kHz) are possible. In this case current flows
of both bridges will overlap (not shown in Fig. 5).
Bit 5, bit 4 (correspondingbit 2 and bit1 for bridge
B) both are HIGH, the current logic will inhibit all
drivers D11, D12, D21, D22 turning off M11, M12,
M21, M22 independentlyfrom the signal of the cur-
rent sense comparator comp 1.
Turning on:
Changing bit 5 or bit 4 or bothto LOW will turn on
either M11 and M22 orM21 and M12 (dependingon
the phase signal bit 3). Current will start to flow
through the load. The current will be sensed by
the drop across R1.
The threshold of the comparator comp 1 depends
on the current settings of bit 5 and bit 4.
Reversing phase:
Suppose the current flowed via M21, the load and
M12 before reversing phase. Reversing phase
M21 and M12 will be turned off. So now the cur-
rent will flow through D22, the load and D11. This
leads to a fast current decay.
The current will rise until it exceeds the turn off
thresholdof comp 1.
Chopper control by oscillator
Both chopping circuits work with offset phase.
One chopper will switch on the bridge at the
maximum voltage of the oscillator while the other
chopper will switch on the bridge at minimum
voltage of the oscillator.
MS1 and MS2 blank switching spikes that could
lead to errors of the current control circuit.
Chopping:
Exceeding the threshold of comp 1 the drive logic
will turn off the sink transistor (M12 or M22). The
sink transistor periodically is turned on again by
the oscillator. Immediately after turning on M12 or
M22 the comparator comp 1 will be inhibited for a
certain time to blank switch over spikes caused
Figure 4. Principal chopper control circuit.
MS1
inhibit
SR
A
+
-
Comp1
RESET
DOMINANT
R
RES1
RSFF1
S
Dr1
Dr2
OSC
C
OSCILLATOR
OSC
S
RSFF2
R
iOSC
2.46V · COSC
RES2
fOSC=
RESET
DOMINANT
MOS DRIVERS
SR
B
+
-
Comp2
inhibit
MS2
D99AT420
7/19
L9935
Figure 5. Pulse diagram to explain offset chopping.
V
OSC
current
threshold 1
V
V
SRA
SRB
current
threshold 2
turn off delay
due to slope
velocity control
total current consumption
I
VS
∆I
D99AT421
Using offset chopping the changes of the supply current remain half as large as using non offset chop-
ping.
Turning off the oscillator for example by shorting pin OSC to ground will hinder turning on of the bridges
anymore after the comparatorshave generateda turn off signal.
External clocking is possible overdriving the charge and discharge currents of the oscillator for example
with a push pull logic gate. So several devices can be synchronized.
Protection and Diagnosis Functions
The L9935 provides several protection functions and error detection functions. Current limitation usually
is customerdefined by the external current sense resistors. The current sensed there is used to regulate
the current through the steppermotor windings by pulse width modulation. This PWM regulation protects
the sink transistors. The source transistors are protected by an internal overcurrent shut down turning off
the source transistors in case of overload.
Overload detection of the source transistor will turn off the bridge and set the corresponding error flag.
To turn on the bridge again a new byte must be written into the interface. (Rising slope of CSN resets
the overload error flag).
Both bridges use the same flags. To locate which bridge is affected by an error the bridges can be
tested individually (One bridge just is turned off to check for the error in the other bridge).
Short from an Output to the Supply Voltage VS
The current will be limited by the pulse width modulator. The sink transistor will turn off again after some
microseconds. The transistor will periodically be turned on again by the oscillator 8 times. After having
detected short 8 times the low side transistor will remain off until the next data transfer took place. After
detection of a short to VS we suggest to turn off the corresponding bridge to reduce power dissipation
for at least 1ms.
8/19
L9935
Diagnosis of a Short to VS
During the short current through the sink transistor will rise more rapidly than under normal load condi-
µ
µ
tions. Reaching a peak current of 1.5 times the maximum PWM current between typically 2 s and 5 s
after turn on will be detected as a short to VS.
Detecting a short the low side transistor will try to turn on again the next 7 trigger pulse of the oscillator.
Simultaneouslythe error flag will updated on each pulse.
Figure 6. Normal PWM current versus short circuit current and detection of short to VS..
I short threshold
Q
PWM threshold
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PWM
ON short PWM
ON short PWM
ON
short
PWM
ON
short
PWM detection
signal (internal)
Short detection
signal (internal)
t
t
Error 1
t
t
t
:
turn on of the sink transistor
activation of short threshold
: activation of PWM threshold
on
on
on
+ t = t
+ t
:
1
short
D99AT422
= t
PWM
delay
Between ton and tshort the over current detection is totally blanked.
Between tshort and tPWM the current threshold is set to 1.5 times the maximum PWM current (1.5 times
the current of current setting LL).
Overcurrent now will set the error flag.
After tPWM the current threshold is the nominal PWM current set by the external resistor. Exceeding this
current will just turn off the sink transistor. This is considered as normal operation. The error flag is de-
tachedfrom the comparator after tPWM so no error flag is set during normal pulse width modulation.
Short from an Output to Ground
The current through the short will be detected by the protection of the source transistor. The source tran-
sistor will turn off exceeding a current of typically 1.8A. Minimum overload detection current is 1.2A. To
obtain proper current regulation (by the sink transistors and not by source transistor shut down) the
maximum current of the PWMregulator should be set to a maximum value of 1.1A.
9/19
L9935
Diagnosis of a Short to Ground
Detecting an overload will set an overcurrent error (Error2 = LOW) (bit6). To reset the error flag a new
byte must be written into the interface. (Reset of the error flag takes place at the rising slope of CSN).
Shorted Load
With a shorted load both, the sink- and the source protection or the PWM alone will respond. In either
case there will be no flyback pulse.
Diagnosis of a Shorted Load
Shorting the load two events may take place:
- overload (of the high side transistor) while low side transistor overcurrent is detected will set the
following combinations:
bit6 = LOW
bit7 = HIGH
- overload is marginal. So the low side driver may turn off before overload is detected.This leads to the
combinationbit6 = HIGH and bit7 = LOW.
Open Load
An open load will not lead to any flyback pulses. Error detection will take advantageof the flyback pulse.
Missing the flyback pulse after reversing the polarity of a motor winding bit7 will become LOW.
Open load will not be tested in the low current mode (current bits HL) to avoid the risk of instable diagno-
sis at low flayback currents. Open load immediately after reset or power down may on random be de-
tected in the low current mode too. This diagnosishowever will not persist longer than 8 changes of po-
larity. We strongly suggest to test open load at a high current mode (combination LH or LL).
OvertemperaturePrealarm
Typically 20K before thermal shut down takes place an overtemperature prealarm (bit7 and bit6 low)
takes place. Typically overtemperatureprealarm temperature is between 150°C and 160°C.
Application hints using a high resistivestepper motor
The L9935 was originally targeted on stepper chopping stepper motor application with typical resis-
tances of 8..12W. Using motors with higher resistance will work too but diagnosis behaviour will slightly
change. This paragraph shows the details that should be taken in account using diagnosis for high resis-
tive motors.
Startup behaviour:
The device has simple digital filter to avoid triggering diagnosis at a single event that could be random
noise. This digital filter needs 4 chopping pulses to settle. Using a high resistive motor this chopping
does not take place. Instead the digital filter samples each time a polarty change takes place. So the first
three response telegrams after reset may show an ’open load’ error.
Input data
High resistive motor (error bits)
Low resistive motor (error bits)
Standby
1st telegram (550mA or 900mA)
Reverse phase (550mA or 900mA)
Reverse phase (550mA or 900mA)
Any data
HH
XH
XH
XH
HH
HH
HH
HH
HH
HH
Any data
H means check for HIGH at the error bits.
X means don’t care becausefilter is not yet settled.
10/19
L9935
Using 75mA chopping immediatelly after stand by:
The high resistive motor can be forced to chopping operation in the low current range. This leads to the
samebehaviouras using a low resistive motor.
Short to VS detectionusing high resistive motors:
The short to VS flag is overwritten each time the chopper comparator responds. Having detected a short
this flagonly can be reset by reachingchopping operation or resetting the circuit (ENN=1). For a high re-
sistive motor thisleads to the following consequence: Once a short to VS is detected the error flag will
persist even if the short is removed again until either a reset (ENN=1) or chopping(for example in 75mA
mode) has taken place. We suggest to return to operation once a short to VS was detected by using the
low current mode to reset the flag.
Limitation of the Diagnosis
The diagnosis depends on either detecting an overcurrent of more than typically 1.8A through the
source transistor or on not detecting a flyback pulse, or on detecting severe overcurrents of the sink
transistorimmediately after turn on.
Small currents bypassing the load will not be detected.
In the low current range (hold current) the flyback pulse (especially commutating against the supply
voltage after changing phase) may (depending on the inductivity of the stepper motor windings) be
too short to be detected correctly. For this reason diagnosis using the flyback pulse is blanked at
phase reversal at hold current.
In the low current range (hold current) the current capability of the bridge is reduced on purpose.
Short to VS may not be detected. In stead the bridge may just chop like normal operation.
Flyback pulse detection is not blanked during PWM regulation at hold current (here commutation
voltage is less than 1V thus providing a longer pulse duration.) This however should be taken in ac-
count using stepper motors with low inductivity (less than 0.5mH). Using motors with such a low in-
ductivity the flyback voltage in hold mode may decay too fast.
Motors with extremely low ohmic resistance tend to pump up the current because current decay dur-
ing flyback approaches zero while at bridge turn on the current will increase. This may lead to over-
current detection. We suggest to use stepper motors with an ohmic resistance of approximately 3Ω or
more.
Partial shorts of windings or shorts of stepper motors with coils in series may still yield a flyback pulses
that are accepted by the diagnosisas a proper signal.
Table 2. Error table.
Error 1
bit7
Error 2
bit6
Description
H
L
H
H
Normal operation
Short to VS (sink overload immediately after turn on)
shorted load (no flyback)
open load (no flyback)
H
L
L
L
short to gnd (source overload, missing flyback is masked)
overtemperature prealarm
At stepping rates faster than 1ms/data transfer error flags indicating a short should be used to initiate a
pause of at least 1ms to allow the power bridges to cool down again.
11/19
L9935
Serial Data Interface (SPI)
The serial data interface itself consists of the pins SCL (serial clock), SDI (serial data input) and SDO
(serial data output).
To especially support bus controlled applications the additional signals EN (chip enable not) and CSN
(chip select not) are available.
Startup of the Serial Data Interface
Falling slope of EN activates the device. After ten.sck the device is ready to work.
Falling slope of CSN indicates start of frame. Data transfer (reading SDI into the register) takes place at
the rising slopes of SCK.
Data transfer of the register to SDO takes place at the falling slope of SCK.
Rising slope of CSN indicates end of frame. At the end of frame data will only be accepted if modulo 8
bit (modulo8 falling slopes to SCK) have been transferred. If this is not the case the input will be ignored
and the bridges will maintain the same status as before.
SDO is a tristate output.
SDO is active while CSN = LOW, while CSN = HIGH SDO is high resistive.
Figure 7. SPI Data/Clock Timing.
t
en_sck
EN
CSN
SCK
SDI
MSB7
MSB7
bit6
bit6
bit5
bit5
bit4
bit4
bit3
bit2
bit2
bit1
bit1
bit0
SDO
bit3
bit0
ERROR BITS
CURRENT A
POLARITY A
CURRENT B
POLARITY B
A
X
t
Pd
CSN
SCK
SDI
t
t
1
t
cl
t
ch
t
t
1
1
1
t
t
su sh
bit7
bit0
td
t
zch
bit7
bit0
SDO
D99AT437
12/19
L9935
Test condition for all propagation times (unless otherwise specified)
HIGH ≥ 3V; LOW ≤ 0.8V;tr, tf = 10ns, Enable: ENN Low < 0.8V, ENN High > Vcc -0.8V
Symbol
fSCLK
t1
Parameter
SCK-Frequency
SCK stable before and after
CSN = 0
Test Conditions
Min.
DC
100
Typ.
Max.
2MHz
Unit
ns
tch
tcl
tsu
tsh
td
tzc
ten_sck
tpd
Width of SCK high pulse
Width of SCK low pulse
SDI setup time
SDI hold time
SDO delay time (CL = 50pF)
SDO high Z CSN high
Setup time ENABLE to SCK
Propagation delay SPI to
output QXX
200
200
80
ns
ns
ns
ns
ns
ns
µs
µs
80
100
100
HIGH > VCC -1.2V
30
2 (*)
(*) Measured at a transition from High impedance (Bridge off) to bridgeon. (Reversing polarity takes about 1µs longer because the bridge first
turns off before turning on in reverse direction).
Table of bits
bit5,bit4 : current range of bridge A (Outputs A1 and A2)
bit3
: polarityof bridge A
bit2,bit1 : current range of bridge B (Outputs B1 and B2)
bit0
: polarityof bridge B
bit7,bit6 : Error1 and Error 2
Cascading several Devices
Cascading several devices can be done using the SDO output to pass data to the next device. The
whole frame now consists of n byte. n is the number of devices used.
Figure 8. CascadingSeveral Stepper motor drivers.
no.1
no.2
no.3
SDO
SDI
SDO
SDI
SDO
SDI
SDO
µP
CSN SCK
CSN
CSN
CSN
SCK
SCK
SCK
D99AT438
Figure 9. Control sequence for 3 Stepper motor drivers.
EN
CSN
SCK
SDO
byte for no. 3
byte for no. 2
byte for no. 1
of µP
Q
D99AT439
XX
13/19
L9935
Figure 10. Paralleling several Devices.
no.1
no.2
SDI
SDO
SDI
SDO
SDO
SCK
CSN1
CSN2
SCK
CSN
µP
SDI
SCK
CSN
D99AT440
here usually only one Steppermotor driver is selected at a time while all others are deselected.
Application Information
For driving a steppermotor we suggest to use the following codes. The columned ’SDO correct’ shows
the data returned at SDO in correct function. The columnes presented under ’Error cases’ display the di-
agnosis bits if errors are detected.
Examples of control sequences
Full step mode control sequencesand diagnosis response.
SDI
SDO
Error cases and SDObit7, bit6
correct
A
B
A1
A2
B1
B2
A1
*)
S
H
O
R
T
A2
*)
S
H
O
R
T
B1
*)
S
H
O
R
T
B2 therm.
*)
therm.
O
P
E
N
O
P
E
N
S
H
O
R
T
S
H
O
R
T
S
H
O
R
T
S
H
O
R
T
S
H
O
R
T
alarm
shut
down
(reset
operating
codes)
VS VS VS VS GND GND GND GND
76 76 76 76 76 76 76 76
bit
76543210
XX111111
76543210
76
76
76
76543210
SDO PRESENT LAST DATA OR 11111111 IN CASE PREV. STATE WAS STAND BY
11
10
10
01
11
10
10
01
11
11
11
10
10
01
11
10
00
00
00
00
00
00
00
00
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
XX011011
XX010011
XX010010
XX011010
XX011011
XX010011
XX010010
XX011010
11111111
11011011
11010011
11010010
11011010
11011011
11010011
11010010
11
11
01
11
01
11
01
11
11
11
11
01
11
01
11
01
11
11
01
01
01
11
01
01
11
01
01
11
01
01
01
11
11
11
11
01
01
01
11
01
11
01
01
01
11
01
01
01
11
10
01
11
10
10
01
11
11
11
10
10
01
11
10
10
*) Motor resistance approximatelly 10Ω and VS = 12V. So a short to ground only is detected on one branche of the bridge. Lower resistivity of
the motor may lead to detection of short to ground on both branches of the bridge leading to code 10 on all steps.
14/19
L9935
These sequences are intended to give the user a good starting point for his software development. Be-
sides these two there are further possibilities how to implement control sequences for this device (other
currents, quarters step etc.).
SDI
SDO
A
B
A1
A2
B1
B2
A1
*)
S
H
O
R
T
A2
*)
S
H
O
R
T
B1
*)
S
H
O
R
T
B2 therm.
*)
therm.
O
P
E
N
O
P
E
N
S
H
O
R
T
S
H
O
R
T
S
H
O
R
T
S
H
O
R
T
S
H
O
R
T
alarm
shut
down
(reset
operating
codes)
VS VS VS VS GND GND GND GND
bit
76543210
76543210
76
76
76
76
76
76
76
76
76
76
76
76543210
XX111111 previous code
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
00111111
11
11
11
11
11
11
11
01
01
01
01
01
11
11
11
01
01
11
10
10
10
10
01
11
11
11
11
10
01
10
01
11
11
11
11
11
11
11
11
11
10
10
10
01
11
11
11
11
10
10
10
11
11
11
11
10
10
10
01
11
11
11
11
10
10
10
01
11
11
11
11
11
11
11
11
11
10
10
10
01
11
11
11
11
10
XX011111
XX011111
XX011111
XX011011
XX111011
XX010011
XX010111
XX010010
XX110010
XX011010
XX011110
XX011011
XX111011
XX010011
XX010111
XX010010
XX110010
11111111
11011111
11011111
11011111
11011111
11011011
11111011
11010011
11010111
11110010
11011010
11011110
11011011
11111011
11010011
11010111
11010010
11
11
11
11
11
01
11
11
11
01
11
11
11
01
11
11
11
11
11
11
11
11
11
11
01
11
11
11
01
11
11
11
01
11
11
11
11
11
11
01
01
01
01
01
11
11
01
01
01
01
01
11
01
01
01
01
01
11
11
11
01
01
01
01
01
11
11
11
11
11
11
11
01
01
01
01
11
11
11
01
01
01
01
01
11
Double errors: Double errors will create composite codes by an AND operation between columns of the
same dominance. Open and short to VS are the least dominant error codes. (first 6 error code columns).
Short to ground is the second dominant error code. detection of short to gnd will overwrite error codes of
the least dominant kind (open, short to VS). Temperature prealarm and thermal shut down are the most
dominant error codes. Thermal prealarm returns error code 00 but the device still is working and returns
the appropriateoperation code (bits 0..5).
Thermal shut down returns error code 00 and turns off the device. The opcode returnedcorresponds the
action eventuallyperformed (bit 0..5 become 1).
For example open bridge A and simultaneously open bridge B will lead to error code 01 by performing
an AND operation between the two correspondingcolumns.
*) Motor resistance approximatelly 10Ω and VS = 12V. So a short to ground only is detected on one branche of the bridge. Lower resistivity of
the motor may lead to detection of short to ground on both branches of the bridge leading to code 10 on all steps.
Electromagnetic Emission classification(EME)
ElectromagneticEmission classes presented below are typical data found on bench test. For detailed test de-
scription please refer to ’ElectromagneticEmission (EME) Measurement of IntegratedCircuits, DC to 1GHz’ of
VDE/ZVEIwork group767.13andVDE/ZVEIwork group767.14or IEC projectnumber47A1967Ed.This data
is targetedto boarddesignerstoallow an estimationof emission filtering effortrequired in application.
Pin
EME class
Remark
GND
VCC
E
E
K
G
E
10
0
e
h
f
1
test
Ω
Blocked with 100nF closemto the device
EN. SDI, CSN, CSK, SDO in tristate
SDO
SDO in low-Z state, no data transfer
Sourcing output
Power output A1, A2, B1, B2
Power output A1, A2, B1, B2
5
6
f
f
Sinking output in chopping mode fosc = 20kHz
Electromagnetic Emission is not testedin production.
15/19
L9935
Figure 11. State diagram.
new telegram
same polarity
new telegram
no error
DEVICE ON
CHECKS FOR
ERRORS 11
turn on
new telegram
flyback OK
STAND
BY
ON
11
short
to gnd
short
to VS
ON
CHECKING
FLYBACK 6
new telegram current = 0
or reverse polarity
t
OFF
OFF
new
telegram
missing
flyback
shor
to VS
t
shor
to gnd
t
new
telegram
new
telegram
ON
01
CHECKING
FOR ERRORS
01
CHECKING
FOR ERRORS
10
no short
LOGIC
SELECTS
BRANCHE
DEPENDING
ON PREVIOUS
STATE
different polarity
than before
no short
short to VS
same polarity as before
short to VS
D99AT441
Remark: Return to stand by is possiblefrom every state
Note: Reversing polarity in low current mode no flyback check will be performed.
Electromagnetic Emission classification(EME)
Electromagnetic Emission classes presentel below are typicaldata found on bench test. For detailed test
description please refer to ’Electromagnetic Emission (EME) Measurement of Integrated Circuits, DC to
1GHz’ of VDE/ZVEI work group 767.13 and VDE/ZVEI work group 767.14 or IEC project number 47A
1967Ed. This data is targeted to board designers to allow an estimation of emission filtering effort re-
quired in application.
Pin
EME class
Remark
GND
VCC
E
E
K
G
E
10
o
e
h
f
1Ω test
Blocked with 100nF close to the device
EN, SDI, CSN, SCK, SDO in tristate
SDO
SDO in low-state, no data transfer
Sourcing output
Power output A1, A2, B1, B2
Power output A1, A2, B1, B2
5
6
f
f
Sinking output in chopping mode fOSC = 20kHz
Electromagnetic Emission is not testedin production.
16/19
L9935
Figure 12. EMC Compatibility for L9935
100 H
Vbatt
47nF
47nF100 F
Vs
Out 1
Out 2
Out 3
Out 4
to motors
4* 2,2nF
GND 1/101/1/20
17/19
L9935
18/19
L9935
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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http://www.st.com
19/19
E-L9935 替代型号
型号 | 制造商 | 描述 | 替代类型 | 文档 |
L9935013TR | STMICROELECTRONICS | Two-Phase Stepper Motor Driver | 完全替代 | |
L9935 | STMICROELECTRONICS | TWO-PHASE STEPPER MOTOR DRIVER | 类似代替 |
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