概述
数据手册DRV8839_16 概述
Low-Voltage Dual H-Bridge Driver IC
DRV8839_16 数据手册
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SLVSBN4 –JANUARY 2013
LOW VOLTAGE DUAL ½-H-BRIDGE DRIVER IC
Check for Samples: DRV8839
1
FEATURES
2
•
Dual ½-H-Bridge Motor Driver
APPLICATIONS
–
–
Drives a DC Motor or One Winding of a
Stepper Motor, or Other Loads
•
Battery-Powered:
–
–
–
–
–
–
DSLR Lenses
Consumer Products
Toys
Low MOSFET On-Resistance:
HS + LS 280 mΩ
•
•
1.8-A Maximum Drive Current
Robotics
1.8-V to 11-V Motor Operating Supply Voltage
Range
Cameras
Medical Devices
•
•
•
Separate Motor and Logic Supply Pins
Individual ½-H-Bridge Control Input Interface
Low-Power Sleep Mode With 120-nA Maximum
Combined Supply Current
•
2-mm x 3-mm 12-Pin WSON Package
DESCRIPTION
The DRV8839 provides a versatile power driver solution for cameras, consumer products, toys, and other
low-voltage or battery-powered applications. The device has two independent ½-H-bridge drivers and can drive
one DC motor or one winding of a stepper motor, as well as other devices like solenoids. The output stages use
N-channel power MOSFET’s configured as ½-H-bridges. An internal charge pump generates needed gate drive
voltages.
The DRV8839 can supply up to 1.8-A of output current. It operates on a motor power supply voltage from 1.8 V
to 11 V and a device power supply voltage of 1.8 V to 7 V.
The DRV8839 has independent input and enable pins for each ½-H-bridge which allow independent control of
each output.
Internal shutdown functions are provided for over current protection, short circuit protection, under voltage
lockout and overtemperature.
The DRV8839 is packaged in a 12-pin, 2-mm x 3-mm WSON package with PowerPAD™ (Eco-friendly: RoHS &
no Sb/Br).
ORDERING INFORMATION(1)
ORDERABLE PART
NUMBER
TOP-SIDE
MARKING
PACKAGE(2)
PowerPAD™ (WSON) - DSS
Reel of 3000
DRV8839DSSR
8839
(1) For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
DRV8839
SLVSBN4 –JANUARY 2013
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
1.8 to 11V
VM
VM
VM
Drives DC motor or
1/2 Stepper
OUT1
Gate
Drive
OCP
Charge
Pump
1.8 to 7V
VCC
Step
Motor
VCC
DCM
VM
Logic
OUT2
Gate
Drive
OCP
IN1
EN1
IN2
Over-
Temp
EN2
Osc
nSLEEP
GND
2
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NAME
SLVSBN4 –JANUARY 2013
Table 1. TERMINAL FUNCTIONS
EXTERNAL COMPONENTS
PIN
I/O(1)
DESCRIPTION
OR CONNECTIONS
POWER AND GROUND
GND
5, 6
-
-
Device ground
Motor supply
Bypass to GND with a 0.1-μF, 16-V ceramic
capacitor.
VM
1, 2
Bypass to GND with a 0.1-μF, 6.3-V ceramic
capacitor.
VCC
12
11
-
Device supply
CONTROL
Logic low puts device in low-power sleep mode
Logic high for normal operation
nSLEEP
I
Sleep mode input
Internal pulldown resistor
Logic input controls OUT1
Internal pulldown resistor
IN1
10
9
I
I
I
I
Input 1
Logic high enables OUT1
Internal pulldown resistor
EN1
IN2
Enable 1
Input 2
Logic input controls OUT2
Internal pulldown resistor
8
Logic high enables OUT2
Internal pulldown resistor
EN2
7
Enable 2
OUTPUT
OUT1
3
4
O
O
Output 1
Output 2
Connect to motor winding
No connection to these pins
OUT2
NO CONNECT
NC
2, 5
-
No connection
(1) Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output
DSS PACKAGE
(TOP VIEW)
1
2
3
4
5
12
11
10
9
VM
VM
VCC
nSLEEP
IN1
OUT1
OUT2
GND
GND
(PPAD)
EN1
8
IN2
6
7
GND
EN2
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ABSOLUTE MAXIMUM RATINGS(1)(2)
VALUE
-0.3 to 12
UNIT
V
VM
Power supply voltage range
Power supply voltage range
Digital input pin voltage range
Peak motor drive output current
Operating junction temperature range
Storage temperature range
VCC
-0.3 to 7
V
-0.5 to 7
V
Internally limited
-40 to 150
-60 to 150
A
TJ
°C
°C
Tstg
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
THERMAL INFORMATION
DRV8839
THERMAL METRIC(1)
DSS
12 PINS
50.4
58
UNITS
θJA
Junction-to-ambient thermal resistance(2)
Junction-to-case (top) thermal resistance(3)
Junction-to-board thermal resistance(4)
Junction-to-top characterization parameter(5)
Junction-to-board characterization parameter(6)
Junction-to-case (bottom) thermal resistance(7)
θJCtop
θJB
19.9
0.9
°C/W
ψJT
ψJB
20
θJCbot
6.9
xxx
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Spacer
RECOMMENDED OPERATING CONDITIONS
TA = 25°C (unless otherwise noted)
MIN
1.8
1.8
0
NOM
MAX
7
UNIT
V
VCC
VM
Device power supply voltage range
Motor power supply voltage range
H-bridge output current(1)
11
V
IOUT
fPWM
VIN
1.8
250
5.5
A
Externally applied PWM frequency
Logic level input voltage
0
kHz
V
0
(1) Power dissipation and thermal limits must be observed.
4
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SLVSBN4 –JANUARY 2013
ELECTRICAL CHARACTERISTICS
TA = 25°C, VM = 5 V, VCC = 3 V (unless otherwise noted)
PARAMETER
POWER SUPPLY
TEST CONDITIONS
MIN
TYP
MAX
UNIT
No PWM
40
0.8
30
100
1.5
95
µA
mA
nA
µA
mA
nA
IVM
VM operating supply current
VM sleep mode supply current
VCC operating supply current
VCC sleep mode supply current
50 kHz PWM
nSLEEP = 0 V
No PWM
IVMQ
IVCC
ICCQ
VUVLO
300
0.7
5
500
1.5
25
50 kHz PWM
nSLEEP = 0 V
VCC rising
1.8
1.7
VCC undervoltage lockout
voltage
V
VCC falling
LOGIC-LEVEL INPUTS
VIL
Input low voltage
0.31 x VCC 0.34 x VCC
V
V
VIH
VHYS
IIL
Input high voltage
Input hysteresis
0.39 x VCC 0.43 x VCC
0.08 x VCC
V
Input low current
Input high current
Pulldown resistance
VIN = 0
-5
5
μA
μA
kΩ
IIH
VIN = 3.3 V
50
RPD
100
H-BRIDGE FETS
RDS(ON) HS + LS FET on resistance
IOFF Off-state leakage current
PROTECTION CIRCUITS
IOCP Overcurrent protection trip level
tTSD Thermal shutdown temperature
I O = 800 mA, TJ = 25°C
280
330
mΩ
±200
nA
1.9
3.5
A
Die temperature
150
160
180
°C
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TIMING REQUIREMENTS(1)
TA = 25°C, VM = 5 V, VCC = 3 V, RL = 20 Ω
NO.
1
PARAMETER
CONDITIONS
MIN
MAX
120
120
120
120
150
150
UNIT
ns
t1
t2
t3
t4
t5
t6
Output enable time
Output disable time
2
ns
3
Delay time, INx high to OUTx high
Delay time, INx low to OUTx low
Output rise time
ns
4
ns
5
50
50
ns
6
Output fall time
ns
(1) Not production tested – ensured by design
INx
ENx
3
1
4
2
OUTx
z
z
80%
80%
20%
OUTx
20%
5
6
6
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SLVSBN4 –JANUARY 2013
FUNCTIONAL DESCRIPTION
Bridge Control
The DRV8839 is controlled using separate enable and input pins for each ½-H-bridge.
The following table shows the logic for the DRV8839:
ENx
INx
X
OUTx
0
1
1
Z
L
0
1
H
Sleep Mode
If the nSLEEP pin is brought to a logic-low state, the DRV8839 will enter a low-power sleep mode. In this state
all unnecessary internal circuitry is powered down.
Power Supplies and Input Pins
The input pins may be driven within their recommended operating conditions with or without the VCC and VM
power supplies present. No leakage current path will exist to the supply. There is a weak pulldown resistor
(approximately 100 kΩ) to ground on each input pin.
VCC and VM may be applied and removed in any order. When VCC is removed, the device will enter a low
power state and draw very little current from VM. If the supply voltage is between 1.8 V and 7 V, VCC and VM
may be connected together.
Protection Circuits
The DRV8839 is fully protected against undervoltage, overcurrent and overtemperature events.
Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this
analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled. After
approximately 1 ms, the bridge will be re-enabled automatically.
Overcurrent conditions on both high and low side devices; i.e., a short to ground, supply, or across the motor
winding will all result in an overcurrent shutdown.
Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled. Once the die temperature
has fallen to a safe level operation will automatically resume.
Undervoltage Lockout (UVLO)
If at any time the voltage on the VCC pin falls below the undervoltage lockout threshold voltage, all circuitry in
the device is disabled and internal logic is reset. Operation resumes when VCC rises above the UVLO threshold.
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APPLICATIONS INFORMATION
Motor Connections
If a single DC motor is connected to the DRV8839, it is connected between the OUT1 and OUT2 pins as shown
below:
OUT1
DCM
OUT2
Figure 1. Single DC Motor Connection
Motor operation is controlled as follows:
EN1
0
EN2
X
IN1
X
X
0
IN2
X
X
0
OUT1
OUT2
MOTOR OPERATION
Off (coast)
Off (coast)
Brake
(1)
Z
See
(2)
X
0
See
Z
L
1
1
L
L
1
1
0
1
H
L
Reverse
1
1
1
0
H
H
Forward
1
1
1
1
H
Brake
(1) State depends on EN2 and IN2, but does not affect motor operation because OUT1 is tri-stated.
(2) State depends on EN1 and IN1, but does not affect motor operation because OUT2 is tri-stated.
8
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SLVSBN4 –JANUARY 2013
Two DC motors may be connected to the DRV8839. In this mode, it is not possible to reverse the direction of the
motors; they will turn only in one direction. The connections are shown below:
OUT1
DCM
OUT2
DCM
Figure 2. Dual DC Motor Connection
Motor operation is controlled as follows:
ENx
INx
X
OUTx
MOTOR OPERATION
Off (coast)
0
1
1
Z
L
0
Brake
1
H
Forward
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THERMAL INFORMATION
Thermal Protection
The DRV8839 has thermal shutdown (TSD) as described above. If the die temperature exceeds approximately
150°C, the device will be disabled until the temperature drops to a safe level.
Any tendency of the device to enter thermal shutdown is an indication of either excessive power dissipation,
insufficient heatsinking, or too high an ambient temperature.
Power Dissipation
Power dissipation in the DRV8839 is dominated by the power dissipated in the output FET resistance, or RDS(ON)
.
Average power dissipation when running a stepper motor can be roughly estimated by:
2
PTOT = RDS(ON) x (IOUT(RMS)
)
(1)
Where PTOT is the total power dissipation, RDS(ON) is the resistance of the HS plus LS FETs, and IOUT(RMS) is the
RMS output current being applied to each winding. IOUT(RMS) is equal to the approximately 0.7x the full-scale
output current setting.
The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and
heatsinking.
Note that RDS(ON) increases with temperature, so as the device heats, the power dissipation increases.
10
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PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
DRV8839DSSR
ACTIVE
WSON
DSS
12
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
8839A0
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DRV8839DSSR
WSON
DSS
12
3000
330.0
12.4
2.3
3.3
0.85
4.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Mar-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
WSON DSS 12
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
DRV8839DSSR
3000
Pack Materials-Page 2
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DRV8839_16 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| DRV8840 | TI | DC MOTOR DRIVER IC | 获取价格 |
|
| DRV8840PWP | TI | DC MOTOR DRIVER IC | 获取价格 |
|
| DRV8840PWPR | TI | DC MOTOR DRIVER IC | 获取价格 |
|
| DRV8840_15 | TI | DC Motor Driver IC | 获取价格 |
|
| DRV8841 | TI | DUAL H-BRIDGE DRIVER IC | 获取价格 |
|
| DRV8841PWP | TI | DUAL H-BRIDGE DRIVER IC | 获取价格 |
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| DRV8841PWPR | TI | DUAL H-BRIDGE DRIVER IC | 获取价格 |
|
| DRV8841_15 | TI | Dual H-Bridge Driver IC | 获取价格 |
|
| DRV8842 | TI | DC MOTOR DRIVER IC | 获取价格 |
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| DRV8842-EP | TI | DC Motor Driver IC | 获取价格 |
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