THMC45DGN

更新时间:2024-12-03 13:10:59
品牌:TI
描述:5V and 3.3V DC Brushless Fan Motor Driver W/ Single Wire Control 8-MSOP-PowerPAD -30 to 80

THMC45DGN 概述

5V and 3.3V DC Brushless Fan Motor Driver W/ Single Wire Control 8-MSOP-PowerPAD -30 to 80 运动控制电子器件

THMC45DGN 规格参数

是否无铅: 含铅生命周期:Obsolete
零件包装代码:MSOP包装说明:HTSSOP,
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.84模拟集成电路 - 其他类型:BRUSHLESS DC MOTOR CONTROLLER
JESD-30 代码:S-PDSO-G8长度:3 mm
功能数量:1端子数量:8
最高工作温度:80 °C最低工作温度:-30 °C
封装主体材料:PLASTIC/EPOXY封装代码:HTSSOP
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH
认证状态:Not Qualified座面最大高度:1.07 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
温度等级:COMMERCIAL EXTENDED端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:3 mmBase Number Matches:1

THMC45DGN 数据手册

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ꢀꢁ ꢂ ꢃꢄ ꢅ  
ꢅ ꢆꢇ ꢈꢉꢊ ꢋ ꢌꢋ ꢆꢇ ꢊꢃ ꢍꢎꢏ ꢐꢁꢑ ꢒꢐꢐ ꢓꢈ ꢉ ꢂ ꢔꢀꢔꢎ ꢊ ꢎꢕ ꢇ ꢒꢎ  
ꢖ ꢕꢀ ꢁ ꢐꢕ ꢉꢗ ꢑ ꢒ ꢖ ꢕꢎꢒ ꢃ ꢔꢉ ꢀꢎ ꢔ ꢑ  
SLIS101A − MAY 2001  
D
D
5-V DC Fan Motor PWM Drive for Speed  
Control With No External Power Drive  
Stage Required  
D
Noise Immune Signal Conditioning to Allow  
Use of Low Cost Hall Effect Position  
Sensor  
High Efficiency H-Bridge Topology With  
D
D
D
Locked Rotor Protection With Auto Retry  
Thermal Shutdown Protection  
Integrated Low R  
MOS Output Drivers  
DSON  
to Drive Single Winding, Bipolar Wound,  
Two-Phase BLMs  
8-Pin MSOP PowerPadPackage Suited  
for Small Fan Circuit Board and Rotor  
Housing  
D
Digital PWM Input to Control Output PWM  
Frequency and Duty Cycle—Suited for  
Cooling Fan Applications Requiring  
Variable RPM Control to Reduce  
Noise/Increase MTBF  
DGN Package  
(TOP VIEW)  
V
PWM  
H−  
D
Single Wire RPM Control, Tachometer  
Feedback Signal, and Locked Rotor Detect  
Feedback Signal  
PWR  
8
7
6
5
1
2
3
4
OUTA  
OUTB  
GND  
H+  
TACH  
D
D
Low Current Sleep State  
Tachometer Signal Valid Over Entire RPM  
Range  
description  
The THMC45 is a dc brushless motor (BLM) driver and control device designed for use with low-voltage (5 V  
or 3.3 V) dc cooling fans having two-phase motors with a single-winding stator. The device includes a  
high-efficiency H-bridge pulse width modulation (PWM) drive topology with integrated MOS high-side and  
low-side drivers, plus a PWM control input stage to provide the industry’s first efficient speed control solution  
inside low-voltage dc cooling fans. This solution eliminates the need for any power drive components on the  
main system board, reducing printed-circuit board (PCB) component count, PCB space, and assembly time.  
The device also offers two advantages over the other commonly used fan speed control methods, adjustable  
external dc supply voltage and adjustable external PWM drive duty cycle.  
Unlike the external linear voltage regulation method, the THMC45 high-efficiency PWM drive method adjusts  
the level of motor winding power while all other circuitry inside the fan obtains a fixed dc voltage from the fan  
supply. This eliminates problems with loss of headroom to internal control circuitry at low fan supply voltage and  
the resulting limitation of low-speed operation of 40% that is typically associated with external dc voltage  
regulation. The high-efficiency PWM drive method employed by the THMC45 reduces fan supply power  
consumption and maximizes full-scale RPM speed over the external linear voltage regulation method, which  
has V × I power loss due to the voltage drop across the regulator.  
The THMC45 includes a Hall sensor amplifier and signal conditioning, global thermal shutdown, and locked  
rotor protection with automatic restart after a locked rotor condition. The device provides a sleep state to  
eliminate the need for an external power component to disconnect the fan from the supply during a system sleep  
state. The device also has internal reverse blocking capability to prevent excessive reverse leakage current due  
to reversal of power line. The THMC45 is primarily designed for 5-V dc notebook PC cooling fan applications  
that require single-wire RPM speed control and tachometer feedback. However, with an open-drain tachometer  
output, the device is also suitable for applications that require two wires for RPM speed control and tachometer  
signal.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments.  
ꢀꢤ  
Copyright 2001, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢭ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢌ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄ ꢅ  
ꢅꢆ ꢇ ꢈ ꢉꢊ ꢋ ꢌ ꢋꢆꢇ ꢊꢃ ꢍꢎ ꢏꢐ ꢁꢑ ꢒꢐ ꢐ ꢓ ꢈ ꢉ ꢂꢔꢀꢔ ꢎ ꢊꢎꢕ ꢇꢒ ꢎ  
ꢖꢕ ꢀ ꢁ ꢐꢕ ꢉ ꢗꢑ ꢒ ꢖ ꢕ ꢎꢒ ꢃꢔ ꢉꢀ ꢎꢔ ꢑ  
SLIS101A − MAY 2001  
functional block diagram  
V
PWR  
SLEEP  
OSC  
OSC  
Sleep State  
Detection  
Oscillator  
70 k  
PWM  
8
SLEEP  
Locked Rotor  
Detection and  
Auto-Restart  
+5 V  
OSC  
1
V
PWR  
C1  
1 µF  
OSC  
I
TACH/RD  
H-Bridge  
Drive  
Signaling  
and  
Control  
2
3
OUTA  
OUTB  
I
TACH  
700 µA  
S N  
N S  
+5 V  
Hall  
H−  
H+  
7
6
+
Signal  
Conditioning  
Sensor  
4
GND  
Hall  
Sensor  
Amplifier  
TACH  
TACH  
5
TACH  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂ ꢃꢄ ꢅ  
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ꢖ ꢕꢀ ꢁ ꢐꢕ ꢉꢗ ꢑ ꢒ ꢖ ꢕꢎꢒ ꢃ ꢔꢉ ꢀꢎ ꢔ ꢑ  
SLIS101A − MAY 2001  
Terminal Functions  
TERMINAL  
NAME NO.  
GND  
I/O  
DESCRIPTION  
4
6
7
2
3
8
5
1
I
I
Ground  
H+  
Hall sensor positive input  
Hall sensor negative input  
Motor winding drive output A  
Motor winding drive output B  
H−  
I
OUTA  
OUTB  
PWM  
TACH  
O
O
I/O PWM duty cycle control input and tachometer/locked rotor detect current sink output  
O
I
Open drain tachometer output signal  
5-V Supply voltage input  
V
PWR  
absolute maximum ratings over operating case temperature range (unless otherwise noted)  
Supply voltage input, V  
Open-drain tachometer output voltage, V  
H-bridge output voltage, V  
Hall sensor amplifier input voltage, V , V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V  
Speed control voltage input and tachometer/locked rotor feedback, V  
Continuous H-bridge output current source/sink, I  
Continuous H-bridge output current source/sink, I  
Continuous power dissipation, P (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 W  
Operating case temperature range, T  
Storage temperature range, T  
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C  
Lead temperature (soldering, 10 sec), T  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V  
PWR  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V  
TACH  
, V  
OUTA OUTB  
H+ H−  
(see Note 1) . . . . . . . . . . . . . . 6 V  
(see Note 2) . . . . . . . . . . . . . . . . . . . . 350 mA  
(see Note 3) . . . . . . . . . . . . . . . . . . . . 260 mA  
PWM  
, I  
OUTA OUTB  
, I  
OUTA OUTB  
D
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30°C to 80°C  
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 150°C  
stg  
J
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C  
LEAD  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. All voltage values are with respect to GND.  
2. Assumed package plus PCB system thermal impedance = 170°C/W, T = 25°C.  
A
3. Assumed package plus PCB system thermal impedance = 170°C/W, T = 80°C.  
A
4. In free air at T = 25°C, assumed 58.4°C/W and T = 150°C.  
A
J
recommended operating conditions  
MIN  
2.5  
2
MAX  
UNIT  
V
Supply voltage, V  
PWR  
5
PWM high-level input voltage, V  
IH  
V
PWM low-level input voltage, V  
IL  
0.8  
50  
80  
V
PWM input frequency, f  
PWM  
18  
kHz  
°C  
Operating case temperature, T  
−30  
C
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢖꢕ ꢀ ꢁ ꢐꢕ ꢉ ꢗꢑ ꢒ ꢖ ꢕ ꢎꢒ ꢃꢔ ꢉꢀ ꢎꢔ  
ꢓ ꢈ ꢉ  
ꢀꢔ  
SLIS101A − MAY 2001  
dc electrical characteristics, V  
= 5V, T = −30°C to 80°C (unless otherwise noted)  
A
PWR  
supply current  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Supply voltage normal operation  
4.5  
5
5.5  
V
V
PWR Supply voltage functional with derated  
performance  
2.4  
4.5  
V
Power-on reset voltage threshold  
Increase V  
PWR  
until logic active  
1.5  
0.5  
0.5  
5
V
POR  
I
L
= 0 A  
1.5  
1.5  
I
I
V
PWR  
supply current  
mA  
VPWR  
Idle condition, in locked rotor detect  
Reverse leakage  
V
= −5 V at T = 25°C  
mA  
REV  
PWR  
PWM  
A
I
Sleep-state current  
V
= 0 V for >2 ms  
75  
300  
µA  
SLEEP  
Hall sensor signal conditioning  
PARAMETER  
TEST CONDITIONS  
MIN  
−1  
TYP  
MAX  
1
UNIT  
µA  
I
Input bias current  
ICR common mode input voltage range  
See Note 5  
IB(HL)  
V
V
1
3.5  
20  
V
ICR(HL)  
(HL)  
Hall amplifier input offset voltage  
−20  
0
mV  
IO  
NOTE 5: Design target only. Not tested in production.  
OUTA, OUTB phase winding driver outputs  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
PWM  
V
OUTx  
= 0 V for >2 ms, sleep state,  
= 5 V  
I
OUTA, OUTB output leakage current  
−1  
1
µA  
LEAK  
OUTA, OUTB low-side output ON  
resistance  
I
T
= 200 mA,  
= 25°C  
OUTx  
A
R
R
1.6  
1.9  
3
2.5  
2.5  
6
DSON(Low)  
DSON(High)  
OUTA, OUTB high-side output ON  
resistance  
I
T
= −200 mA,  
OUTx  
= 25°C  
A
OUTA, OUTB low-side output ON  
resistance  
I
T
= 100 mA,  
V
V
= 2.4 V  
= 2.4 V  
OUTx  
= 25°C,  
PWR  
PWR  
A
R
DSON  
OUTA, OUTB high-side output ON  
resistance  
I
T
= −100 mA,  
OUTx  
= 25°C,  
3.5  
6
A
PWM input/TACH pulse output  
PARAMETER  
PWM high-level input voltage  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
V
V
2
IH  
PWM low-level input voltage  
0.8  
1
V
IL  
I
PWM high-level input current  
V
V
= 5 V  
= 0 V  
−1  
µA  
µA  
V
IH  
IL  
PWM  
PWM  
PWM  
I
PWM low-level input current  
75  
200  
0.4  
V
OL  
PWM input tachometer pulse output low voltage  
I
= 2 mA  
TACH open-drain output  
PARAMETER  
TACH output high leakage  
TACH output low voltage  
TEST CONDITIONS  
MIN  
TYP  
MAX  
1
UNIT  
µA  
I
V
TACH  
= V  
−1  
IH  
PWR  
V
I
= 5 mA  
400  
mV  
OL  
TACH  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂ ꢃꢄ ꢅ  
ꢅ ꢆꢇ ꢈꢉꢊ ꢋ ꢌꢋ ꢆꢇ ꢊꢃ ꢍꢎꢏ ꢐꢁꢑ ꢒꢐꢐ ꢓꢈ ꢉ ꢂ ꢔꢀꢔꢎ ꢊ ꢎꢕ ꢇ ꢒꢎ  
ꢖ ꢕꢀ ꢁ ꢐꢕ ꢉꢗ ꢑ ꢒ ꢖ ꢕꢎꢒ ꢃ ꢔꢉ ꢀꢎ ꢔ ꢑ  
SLIS101A − MAY 2001  
ac electrical characteristics, V  
= 5 V, T = −30°C to 80°C (unless otherwise noted)  
A
PWR  
PARAMETER  
PWM input frequency  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
f
t
18  
30  
50  
kHz  
PWM  
Time to enter sleep state after no transitions on PWM  
terminal  
See Figure 5  
2
ms  
(SLEEP)  
t
t
t
t
t
Tachometer signal pulse width  
See Figure 4  
1
1
µs  
µs  
s
(PW)  
Delay after rising edge of PWM input for TACH signal  
Locked rotor detect delay time  
See Figure 4  
d
See Figure 6  
1
RD  
Auto-restart delay time  
See Figure 6  
8
s
RETRY  
(de-glitch)  
Hall transition valid time for commutation to occur  
See Figures 1 and 4  
25  
µs  
De-glitch time for PWM input to prevent TACH current  
pulses from falsely triggering PWM  
t
See Figure 5  
25  
µs  
(PWM_de-glitch)  
t
t
OUTA, OUTB output fall time  
OUTA, OUTB output rise time  
See Note 5  
See Note 5  
200  
200  
ns  
ns  
f(OUT)  
r(OUT)  
NOTE 5: Design target only. Not tested in production.  
thermal resistance  
PARAMETER  
TEST CONDITIONS  
MIN  
MAX  
58.4  
4.7  
UNIT  
°C/W  
°C/W  
R
R
Thermal resistance, in system  
2 oz. copper traces, JEDEC low K board, 0 LFPM airflow  
Exposed back-side die mount  
θJ(SYS)  
θJC  
Thermal resistance, junction-to-case  
PRINCIPLES OF OPERATION  
general overview  
The THMC45 is a dc BLM driver and control device designed for use with low-voltage (5 V or 3.3 V) dc cooling  
fans having two-phase motors with a single winding, bipolar-wound stator. The device is intended primarily for  
low-voltage cooling fan applications requiring speed control with a tachometer feedback signal to ensure normal  
fan operation. The output drive PWM duty cycle and frequency are dependent on the input signal on the PWM  
terminal. The device has an internal Hall sensor amplifier and signal conditioning with drive commutation logic,  
a low power sleep-state mode, and locked rotor protection with automatic restart after a locked rotor condition.  
The PWM terminal is used to input PWM frequency and duty cycle, to output a tachometer current pulse  
feedback signal, and to provide a means for entering sleep and run states. The THMC45 provides a more  
effective drive solution to fan RPM control than either external linear voltage regulation or external PWM drive.  
The device is offered in an MSOP-8 miniature surface-mount package to meet the critical space constraints of  
PCB designs of small low-voltage fans typically found in notebook PCs.  
supply voltage input (V  
)
PWR  
The V  
terminal serves as the voltage supply input to the THMC45. A 0.1-µF bypass capacitor should be  
PWR  
placed as close to this terminal as layout permits.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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ꢖꢕ ꢀ ꢁ ꢐꢕ ꢉ ꢗꢑ ꢒ ꢖ ꢕ ꢎꢒ ꢃꢔ ꢉꢀ ꢎꢔ ꢑ  
SLIS101A − MAY 2001  
PRINCIPLES OF OPERATION  
Hall sensor amplifier inputs (H+, H−)  
The THMC45 has an internal Hall sensor amplifier with signal conditioning to allow the use of low-cost Hall  
sensors requiring no external components for noise filtering. The Hall signal conditioning block receives a  
low-level differential voltage from the Hall position sensor and implements a zero differential voltage crossing  
detection with a de-glitch time of 25 µs (typical), t  
, to reject noise on the Hall signal inputs. Refer to  
(de-glitch)  
Figure 1, the OUTA output changes from sourcing current to sinking current after the 25-µs de-glitch time.  
Likewise, the OUTB output changes from sinking current to sourcing current after the 25-µs de-glitch time. The  
Hall amplifier circuit has an input offset voltage, V , not greater than 13 mV when V  
is between 4.5 V and  
is between 4.5 V and 5.5 V.  
IO  
PWR  
5.5 V. The common mode input voltage range is 1 V to 3.5 V when V  
PWR  
Differential Hall  
Signal (H+ − H−)  
t
t
t
(de-glitch)  
(de-glitch)  
(de-glitch)  
Conditioned Hall  
Amplifier Output  
(Internal)  
PWM Input  
OUTA  
OUTB  
Figure 1. Hall Sensor Signal Conditioning Waveform and OUTA/OUTB Commutation  
Illustrated in truth table format, Table 1 shows OUTA and OUTB commutation and PWM.  
Table 1. OUTA and OUTB Low-Side Drive Commutation  
H+  
H
H−  
L
OUTA  
H
OUTB  
PWM  
H
L
H
PWM  
H-bridge motor drive outputs (OUTA, OUTB)  
Using an H-bridge to drive a bipolar wound, two-phase BLM provides several advantages for dc fans over the  
unipolar-wound motor commonly driven by two commutated low-side switches. A bipolar-wound motor has only  
two connections; hence, the H-bridge drive topology requires only two output terminals and two traces are  
needed on the fan PCB. A bipolar-wound stator has a single-wire winding which is simpler to manufacture, and  
thus increases reliability and reduces manufacturing time. All factors combine to allow a smaller diameter fan  
center hub, and thus higher blade area for increased airflow on a given fan frame size. Generally, an H-bridge  
drive method with bipolar-wound stator increases fan motor torque density over a typical unipolar drive method.  
The H-bridge drive method also eliminates the need for snubbing inductive energy at commutation transitions  
and allows for recirculation of winding current to maintain energy in the motor while PWM switching occurs.  
6
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SLIS101A − MAY 2001  
PRINCIPLES OF OPERATION  
H-bridge motor drive outputs (OUTA, OUTB) (continued)  
Figures 2a and 2b show THMC45 H-bridge motor drive states with stator winding current being driven from  
OUTA to OUTB and from OUTB to OUTA, respectively, based on the Hall sensor commutation state. As shown  
during t , PWM signal is high and the drive current is from V  
through the activated switches and motor  
ON  
PWR  
to GND. PWM occurs on the low side, and the stator winding inductive current recirculates on the high side  
during t and PWM signal is low (see Figure 3 for motor current waveform). Recirculation of inductive current  
OFF  
through the high-side switches during t  
, known as synchronous rectification, improves power conversion  
OFF  
efficiency by maintaining energy in the stator winding and results in a continuous dc current level.  
V
PWR  
V
PWR  
I
PWM t  
ON  
PWM  
PWM  
PWM  
PWM  
ON  
M1  
OUTA  
M2  
OUTB  
ON  
M1  
M2  
(RECIRCULATE)  
Motor  
Motor  
OUTA  
OUTB  
M4  
OFF  
OFF  
I
M3  
M4  
M3  
PWM t  
OFF  
(DRIVE)  
GND  
GND  
H+  
H−  
L
OUTA  
H
OUTB  
PWM  
H
a) A to B Current Direction  
V
PWR  
V
PWR  
I
PWM  
PWM  
PWM t  
ON  
M1  
OUTA  
M2  
OUTB  
M1  
M2  
ON  
ON  
(RECIRCULATE)  
PWM  
PWM  
Motor  
Motor  
OUTA  
OUTB  
M4  
OFF  
OFF  
I
M3  
M4  
M3  
PWM t  
OFF  
(DRIVE)  
GND  
GND  
H+  
L
H−  
H
OUTA  
PWM  
OUTB  
H
b) B to A Current Direction  
Figure 2. H-Bridge PWM Drive With Synchronous Rectification  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄ ꢅ  
ꢅꢆ ꢇ ꢈ ꢉꢊ ꢋ ꢌ ꢋꢆꢇ ꢊꢃ ꢍꢎ ꢏꢐ ꢁꢑ ꢒꢐ ꢐ ꢓ ꢈ ꢉ ꢂꢔꢀꢔ ꢎ ꢊꢎꢕ ꢇꢒ ꢎ  
ꢖꢕ ꢀ ꢁ ꢐꢕ ꢉ ꢗꢑ ꢒ ꢖ ꢕ ꢎꢒ ꢃꢔ ꢉꢀ ꢎꢔ ꢑ  
SLIS101A − MAY 2001  
PRINCIPLES OF OPERATION  
PWM input (PWM)  
The PWM input provides several functions:  
D
D
Input for controlling H-bridge PWM drive frequency and duty cycle  
Output for a tachometer current sink pulse on the first rising edge of the PWM input signal after a  
commutation  
D
Initiating a low-current sleep state when the voltage maintained a logic low level for 2 ms (typical) or longer,  
and allowing the THMC45 to return to a normal run state on the next rising edge of the PWM input signal  
The THMC45 requires a TTL level PWM input signal from another device, such as a Super I/O device. This  
signal, along with the Hall sensor input, is used to PWM the OUTA and OUTB outputs according to truth table,  
Table 1.  
It is recommended that the frequency of the PWM input signal be between 18 kHz and 60 kHz. A PWM frequency  
of 18 kHz or higher, being above the audible range, ensures quiet fan operation. Frequencies above 18 kHz  
also promote efficient fan speed control by keeping the PWM period below the electrical L/R time constant of  
the motor. This allows continuous current in the fan windings (see Figure 3). Keeping the PWM frequency below  
60 kHz minimizes switching losses. Switching losses, typically observed at higher frequencies, decreases  
overall efficiency.  
The speed of the cooling fan can be varied by adjusting the duty cycle of the PWM input signal. The higher the  
duty cycle of the PWM input signal, the higher the current in the fan windings, and thus results in faster fan speed.  
I
(DRIVE)  
I
(MOTOR)  
I
(RECIRCULATE)  
PWM Period  
t
OFF  
t
ON  
PWM  
Figure 3. Motor Current Waveform  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂ ꢃꢄ ꢅ  
ꢅ ꢆꢇ ꢈꢉꢊ ꢋ ꢌꢋ ꢆꢇ ꢊꢃ ꢍꢎꢏ ꢐꢁꢑ ꢒꢐꢐ ꢓꢈ ꢉ ꢂ ꢔꢀꢔꢎ ꢊ ꢎꢕ ꢇ ꢒꢎ  
SLIS101A − MAY 2001  
PRINCIPLES OF OPERATION  
tachometer signaling on PWM input (PWM)  
The PWM terminal of the THMC45 provides a 1-µs (typical) current sink pulse, t  
, following the next rising  
(PW)  
edge of the PWM input signal after the Hall sensor amplifier changes states (see Figure 4). Note that the  
THMC45 incorporates a blanking circuit that disregards transitions on the PWM terminal during the TACH  
current pulses. This ensures that the TACH pulses do not corrupt the output PWM signal. This current signal  
can be detected with external circuitry and can be sent to the TACH input of the hardware monitor portion of  
a Super I/O device.  
Differential Hall  
Signal (H+ − H−)  
t
t
t
(de-glitch)  
(de-glitch)  
(de-glitch)  
Conditioned Hall  
Amplifier Output  
(Internal)  
PWM Input  
t
t
(PW)  
d
TACH Current  
Sink Pulses  
TACH  
Figure 4. Tachometer Current Pulse Timing on PWM Input Pin  
sleep/run states using PWM input (PWM)  
The THMC45 enters a low-current sleep state when the PWM input maintains a logic low level for more than  
2 ms (typical), t . In sleep state, the OUTA and OUTB outputs are in a high-impedance state. The THMC45  
(SLEEP)  
transitions from sleep state to run state on the first rising edge on the PWM input. Figure 5 shows the timing  
relationships between the PWM signal and sleep/run state.  
PWM Input  
t
t
(PWM_de-glitch)  
(SLEEP)  
OUTA, OUTB  
Enable Signal  
Figure 5. PWM Input Signal, Sleep State, and Run State Timing  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄ ꢅ  
ꢅꢆ ꢇ ꢈ ꢉꢊ ꢋ ꢌ ꢋꢆꢇ ꢊꢃ ꢍꢎ ꢏꢐ ꢁꢑ ꢒꢐ ꢐ ꢓ ꢈ ꢉ ꢂꢔꢀꢔ ꢎ ꢊꢎꢕ ꢇꢒ ꢎ  
ꢖꢕ ꢀ ꢁ ꢐꢕ ꢉ ꢗꢑ ꢒ ꢖ ꢕ ꢎꢒ ꢃꢔ ꢉꢀ ꢎꢔ ꢑ  
SLIS101A − MAY 2001  
PRINCIPLES OF OPERATION  
locked rotor protection  
An internal digital timer is used to monitor the output of the Hall sensor amplifier. When change in commutation  
state is not observed via the Hall amplifier inputs within 1 second (typical), t , the OUTA and OUTB outputs  
(RD)  
are disabled for 8 seconds (typical), t  
. After this period, the THMC45 re-enables the OUTA and OUTB  
(RETRY)  
outputs to automatically restart the motor after a locked rotor condition. When the locked rotor condition  
continues to exist, the above process repeats itself until the locked condition is removed or the THMC45 is  
powered down (see Figure 6).  
Conditioned Hall  
Amplifier Output  
(Internal)  
t
t
(RD)  
(RD)  
(RETRY)  
t
t
(RETRY)  
OUTA, OUTB  
Enable  
Figure 6. Typical Locked Rotor Protection Timing Waveforms  
open-drain tachometer output (TACH)  
The TACH output is an open-drain output that is activated by the output of the Hall sensor comparator output.  
When the output of the Hall sensor comparator is high, the TACH output floats high. When the output of the Hall  
sensor amplifier is low, the TACH output is pulled low. The resulting output signal has two pulses per revolution  
on a four-pole motor.  
The TACH output can be used to monitor and measure actual fan speed. It may also be used as part of a  
closed-loop speed control system.  
thermal shutdown  
The THMC45 provides protection against excessive device temperature with a thermal sensor to monitor the  
die temperature. In the event that operating or abnormal condition causes the die temperature to exceed t  
,
(SD)  
the thermal shutdown threshold (175°C typical), all output drivers are turned off. When t  
has been exceeded,  
(15°C typical) before the output drivers  
(SD)  
the die temperature must fall below a hystersis temperature, t  
are re-enabled.  
(SD_HYS)  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂ ꢃꢄ ꢅ  
ꢅ ꢆꢇ ꢈꢉꢊ ꢋ ꢌꢋ ꢆꢇ ꢊꢃ ꢍꢎꢏ ꢐꢁꢑ ꢒꢐꢐ ꢓꢈ ꢉ ꢂ ꢔꢀꢔꢎ ꢊ ꢎꢕ ꢇ ꢒꢎ  
ꢖ ꢕꢀ ꢁ ꢐꢕ ꢉꢗ ꢑ ꢒ ꢖ ꢕꢎꢒ ꢃ ꢔꢉ ꢀꢎ ꢔ ꢑ  
SLIS101A − MAY 2001  
THERMAL INFORMATION  
POWER DISSIPATION  
vs  
AMBIENT TEMPERATURE  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
R
= 100°C/W  
θJ(SYS)  
R
= 125°C/W  
θJ(SYS)  
R
= 170°C/W  
θJ(SYS)  
R
= 225°C/W  
θJ(SYS)  
R
= 285°C/W  
θJ(SYS)  
20  
30  
40  
50  
60  
70  
80  
90  
100  
110  
120  
130  
140  
150  
t − Ambient Temperature − °C  
Note: R  
refers to composite thermal impedance provided by the IC package, PCB, and fan housing.  
θJ(SYS)  
Figure 7  
CONTINUOUS CURRENT  
vs  
AMBIENT TEMPERATURE  
0.5  
0.4  
0.3  
0.2  
0.1  
R
= 100°C/W  
θJ(SYS)  
R
= 125°C/W  
θJ(SYS)  
R
= 170°C/W  
θJ(SYS)  
R
= 225°C/W  
θJ(SYS)  
R
= 285°C/W  
θJ(SYS)  
0.0  
20  
30  
40  
50  
60  
70  
80  
90  
100  
110  
120  
130  
140  
150  
t − Ambient Temperature − °C  
Note: R  
refers to composite thermal impedance provided by the IC package, PCB, and fan housing.  
θJ(SYS)  
Analysis assumes combined high and low-side RDSon = 5.5 Ω.  
Figure 8  
11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃ ꢄ ꢅ  
ꢅꢆ ꢇ ꢈ ꢉꢊ ꢋ ꢌ ꢋꢆꢇ ꢊꢃ ꢍꢎ ꢏꢐ ꢁꢑ ꢒꢐ ꢐ ꢓ ꢈ ꢉ ꢂꢔꢀꢔ ꢎ ꢊꢎꢕ ꢇꢒ ꢎ  
ꢖꢕ ꢀ ꢁ ꢐꢕ ꢉ ꢗꢑ ꢒ ꢖ ꢕ ꢎꢒ ꢃꢔ ꢉꢀ ꢎꢔ ꢑ  
SLIS101A − MAY 2001  
APPLICATION INFORMATION  
PWM  
INPUT  
TACH  
GND  
+ 5V  
R1  
1.3 kΩ  
A
1
2
3
4
8
7
6
5
V
PWM  
H−  
PWR  
D
B
Hall  
Sensor  
C1  
1 µF  
10 V  
OUTA  
OUTB  
GND  
+
THMC45  
H+  
C
TACH  
Bipolar Wound  
Motor  
NOTES: A. Traces in bold are high current traces.  
B. C1 should be placed as close as possible to terminals 1 and 4.  
Figure 9. Application Schematic  
12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁ ꢂ ꢃꢄ ꢅ  
ꢅ ꢆꢇ ꢈꢉꢊ ꢋ ꢌꢋ ꢆꢇ ꢊꢃ ꢍꢎꢏ ꢐꢁꢑ ꢒꢐꢐ ꢓꢈ ꢉ ꢂ ꢔꢀꢔꢎ ꢊ ꢎꢕ ꢇ ꢒꢎ  
ꢖ ꢕꢀ ꢁ ꢐꢕ ꢉꢗ ꢑ ꢒ ꢖ ꢕꢎꢒ ꢃ ꢔꢉ ꢀꢎ ꢔ ꢑ  
SLIS101A − MAY 2001  
MECHANICAL DATA  
DGN (S-PDSO-G8)  
PowerPADPLASTIC SMALL-OUTLINE PACKAGE  
0,38  
0,25  
0,65  
M
0,25  
8
5
Thermal Pad  
(See Note D)  
0,15 NOM  
3,05  
2,95  
4,98  
4,78  
Gage Plane  
0,25  
0°ā6°  
1
4
0,69  
0,41  
3,05  
2,95  
Seating Plane  
0,10  
0,15  
0,05  
1,07 MAX  
4073271/A 04/98  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions include mold flash or protrusions.  
D. The package thermal performance may be enhanced by attaching an external heat sink to the thermal pad.  
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.  
E. Falls within JEDEC MO-187  
PowerPAD is a trademark of Texas Instruments.  
13  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
8-Apr-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
THMC45DGN  
OBSOLETE  
MSOP-  
Power  
PAD  
DGN  
8
TBD  
Call TI  
Call TI  
THMC45DGNR  
OBSOLETE  
MSOP-  
Power  
PAD  
DGN  
8
TBD  
Call TI  
Call TI  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
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