SI7465DP

更新时间:2025-04-20 10:19:23
品牌:VISHAY
描述:P-Channel 60-V (D-S) MOSFET

SI7465DP 概述

P-Channel 60-V (D-S) MOSFET P通道60 -V (D -S )的MOSFET

SI7465DP 数据手册

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SPICE Device Model Si7465DP  
Vishay Siliconix  
P-Channel 60-V (D-S) MOSFET  
CHARACTERISTICS  
P-Channel Vertical DMOS  
Macro Model (Subcircuit Model)  
Level 3 MOS  
Apply for both Linear and Switching Application  
Accurate over the 55 to 125°C Temperature Range  
Model the Gate Charge, Transient, and Diode Reverse Recovery  
Characteristics  
DESCRIPTION  
The attached spice model describes the typical electrical  
characteristics of the p-channel vertical DMOS. The subcircuit  
model is extracted and optimized over the 55 to 125°C  
temperature ranges under the pulsed 0-V to 10-V gate drive. The  
saturated output impedance is best fit at the gate bias near the  
threshold voltage.  
A novel gate-to-drain feedback capacitance network is used to model  
the gate charge characteristics while avoiding convergence difficulties  
of the switched Cgd model. All model parameter values are optimized  
to provide a best fit to the measured electrical data and are not  
intended as an exact physical interpretation of the device.  
SUBCIRCUIT MODEL SCHEMATIC  
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate  
data sheet of the same number for guaranteed specification limits.  
www.vishay.com  
Document Number: 73148  
S-52519Rev. B, 12-Dec-05  
1
SPICE Device Model Si7465DP  
Vishay Siliconix  
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED)  
Simulated Measured  
Parameter  
Symbol  
Test Condition  
Unit  
Data  
Data  
Static  
Gate Threshold Voltage  
On-State Drain Currenta  
VGS(th)  
ID(on)  
2
V
A
V
DS = VGS, ID = 250 µA  
99  
VDS = 5 V, VGS = 10 V  
0.050  
0.063  
15  
0.051  
0.064  
16  
VGS = 10 V, ID = 5 A  
Drain-Source On-State Resistancea  
rDS(on)  
VGS = 4.5 V, ID = 4.5 A  
Forward Transconductancea  
Diode Forward Voltagea  
gfs  
S
V
VDS = 15 V, ID = 5 A  
VSD  
I
S = 2.9 A, VGS = 0 V  
0.83  
0.80  
Dynamicb  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
Qg  
Qgs  
Qgd  
24  
4.5  
7
26  
4.5  
7
nC  
VDS = 30 V, VGS = 10 V, ID = 5 A  
Notes  
a. Pulse test; pulse width 300 µs, duty cycle 2%.  
b. Guaranteed by design, not subject to production testing.  
www.vishay.com  
Document Number: 73148  
S-52519Rev. B, 12-Dec-05  
2
SPICE Device Model Si7465DP  
Vishay Siliconix  
COMPARISON OF MODEL WITH MEASURED DATA (TJ=25°C UNLESS OTHERWISE NOTED)  
www.vishay.com  
Document Number: 73148  
S-52519Rev. B, 12-Dec-05  
3

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