概述
数据手册SI9136 概述
Multi-Output Power-Supply Controller 多路输出电源控制器
SI9136 数据手册
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PDF下载Si9136
Vishay Siliconix
Multi-Output Power-Supply Controller
FEATURES
D Up to 95% Efficiency
D High Efficiency Pulse Skipping Mode Operation at
Light Load
D 3% Total Regulation (Each Controller)
D 5.5-V to 30-V Input Voltage Range
D 3.3-V, 5-V, and 12-V Outputs
D Only Three Inductors Required No Transformer
D LITTLE FOOTR Optimized Output Drivers
D Internal Soft-Start
D 200-kHz Low-Noise Fixed Frequency Operation
D Precision 3.3-V Reference Output
D 30 mA Linear Regulator Output
D Minimal External Control Components
D 28-Pin SSOP Package
DESCRIPTION
The Si9136 is a current-mode PWM and PSM converter
controller, with two synchronous buck converters (3.3 V and
5 V) and a flyback (non-isolated buck-boost) converter (12 V).
Designed for portable devices, it offers a total five power
outputs (three tightly regulated dc/dc converter outputs, a
precision 3.3-V reference and a 5-V LDO output). It requires
minimum external components and is capable of achieving
conversion efficiencies approaching 95%.
The Si9136 is available in a 28-pin SSOP package and
specified to operate over the extended commercial (0_C to
90_C) temperature range.
FUNCTIONAL BLOCK DIAGRAM
V
IN
5-V
Linear
Regulator
3.3-V
Voltage
Reference
V
REF
(+3.3 V)
V
L
(5.0 V)
3.3-V
SMPS
5-V
SMPS
+3.3 V
+5 V
+12 V
12-V SMPS
Control
Inputs
Power-Up Control
Document Number: 70818
S-00583—Rev. C, 03-Apr-00
www.vishay.com S FaxBack 408-970-5600
1
Si9136
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
V
P
V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +36 V
DH3 to LX , DH5 to LX ,
3 5
DHFY to LXFY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (BSTX +0.3 V)
IN
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±2 V
GND
a
Continuous Power Dissipation (T = 90_C)
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +6.5 V
A
L
b
28-Pin SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 572 mW
BST , BST , BSTFY to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +36 V
3
5
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0_C to 90_C
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . –40_C to 125_C
Lead Temperature (Soldering, 10 Sec.) . . . . . . . . . . . . . . . . . . . . . . . . . 300_C
V
Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
L
LX to BST ; LX to BST ; LXFY to BST . . . . . . . . . . . . . . . . . –6.5 V to 0.3 V
3
3
5
5
Inputs/Outputs to GND
(CS , CS , CSP, CSN) . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (V +0.3 V)
3
5
L
5 ON/OFF, 3 ON/OFF, 12 ON/OFF . . . . . . . . . . . . . . . . . . . . . –0.3 V to +5.5 V
Notes
DL3, DL5 to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (V +0.3 V)
L
a. Device mounted with all leads soldered or welded to PC board.
DLFY to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input of Flyback
b. Derate 9.52 mW/_C above 90_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
ofthe device at these or any other conditions beyond those indicated in the operational sections ofthespecificationsisnotimplied. Exposuretoabsolutemaximumrating
conditions for extended periods may affect device reliability.
SPECIFICATIONS
Specific Test Conditions
Limits
V
= 15 V , I = I
= 0 mA
REF
IN
VL
Parameter
3.3-V Buck Controller
Mina Typb Maxa
Unit
T
A
= 0_C to 90_C, All Converters ON
Total Regulation (Line, Load, and Temperature)
Line Regulation
V
IN
= 6 to 30 V, 0 < V
– V < 90 mV
FB3
3.23
90
3.33
3.43
±0.5
±0.5
160
V
CS3
V
IN
= 6 to 30 V
%
Load Regulation
0 < V
– V
< 90 mV
FB3
CS3
Current Limit
V
CS3
– V
125
50
mV
kHz
_
FB3
Bandwidth
L = 10 mH, C = 330 mF
= 20 mW
Phase Margin
R
SENSE
65
5-V Buck Controller
Total Regulation (Line, Load, and Temperature)
Line Regulation
V
IN
= 6 to 30 V, 0 < V
– V < 90 mV
FB5
4.88
90
5.03
5.18
±0.5
±0.5
160
V
CS5
V
IN
= 6 to 30 V
%
Load Regulation
0 < V
– V
< 90 mV
FB5
CS5
Current Limit
V
CS5
– V
125
50
mV
kHz
_
FB5
Bandwidth
L = 10 mH, C = 330 mF
= 20 mW
Phase Margin
R
SENSE
65
12-V Flyback Controller
Total Regulation (Line, Load, and Temperature)
Line Regulation
V
IN
= 6 to 30 V, 0 < V
– V < 300 mV
CSN
11.4
330
12.0
12.6
±0.5
±0.5
500
V
CSP
V
IN
= 6 to 30 V
%
Load Regulation
0 < V
– V
< 300 mV
FBN
CSP
Current Limit
V
CSP
– V
410
10
mV
kHz
_
CSN
Bandwidth
L = 10 mH, C = 100 mF
= 100 mW, C = 120 pF
Phase Margin
R
SENSE
65
comp
Internal Regulator
V
V
V
V
V
Output
All Converters OFF, V >5.5 V, 0 <I <30 mA
4.7
3.6
5.5
4.2
L
L
L
L
IN
L
V
Fault Lockout Voltage
Fault Lockout Hysteresis
/FB5 Switchover Voltage
/FB5 Switchover Hysteresis
75
75
mV
V
4.2
4.7
mV
L
Document Number: 70818
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Si9136
Vishay Siliconix
SPECIFICATIONS
Specific Test Conditions
Limits
Mina Typb Maxa
V
IN
= 15 V , I = I
= 0 mA
REF
VL
Parameter
Reference
Unit
T
= 0_C to 90_C, All Converters ON
A
REF Output
No External Load
0 to 1 mA
3.24
3.30
30
3.36
75
V
REF Load Regulation
mV
Supply Current
Supply Current*Shutdown
Supply Current*Operation
All Converters OFF, No Load
35
60
mA
All Converters ON, No Load, F
= 200 kHz
1100
1800
OCS
Oscillator
Oscillator Frequency
Maximum Duty Cycle
180
92
200
95
220
kHz
%
Outputs
Gate Driver Sink/Source Current (Buck)
Gate Driver On-Resistance (Buck)
DL3, DH3, DL5, DH5 Forced to 2 V
High or Low
1
2
A
W
A
7
Gate Driver Sink/Source Current (Flyback)
Gate Driver On-Resistance (Flyback)
DHFY, DLFY Forced to 2 V
High or Low
0.2
15
W
5 ON/OFF, 3 ON/OFF, and 12 ON/OFF
V
0.8
IL
V
V
IH
2.4
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
PIN CONFIGURATION
SSOP-28
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ORDERING INFORMATION
Part Number
Temperature Range
VOUT
3
Si9136LG
0 to 90_C
3.3 V, 5 V, 12 V
4
5
6
Evaluation Board
Temperature Range
Board Type
7
Si9136DB
0 to 90_C
Surface Mount
8
9
10
11
12
12
14
Top View
Document Number: 70818
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Si9136
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PIN DESCRIPTION
Pin
Number
Symbol
Description
1
CS
3
Current sense input for 3.3-V buck.
2
FBFY
BSTFY
DHFY
LXFY
Feedback for flyback.
3
Boost capacitor connection for flyback converter.
Gate-drive output for flyback high-side MOSFET.
Inductor connection for flyback converter.
Gate-drive output for flyback low-side MOSFET.
Current sense positive input for flyback converter.
Current sense negative input for flyback converter.
Analog ground.
4
5
6
DLFY
7
CSP
8
CSN
9
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
COMP
REF
Flyback compensation connection, if required.
3.3-V internal reference.
12 ON/OFF
ON and OFF control input for 12-V flyback controller.
3.3 ON/OFF ON and OFF control input for 3.3-V buck controller.
5 ON/OFF
CS
ON and OFF control input for 5-V buck controller.
Current sense input for 5-V buck controller.
Inductor connection for buck 5-V.
5
DH5
LX
Gate-drive output for 5-V buck high-side MOSFET.
Boost capacitor connection for 5-V buck converter.
Gate-drive output for 5-V buck low-side MOSFET.
Power ground.
5
BST
5
DL5
PGND
FB
5
Feedback for 5-V buck.
V
L
5-V logic supply voltage for internal circuitry.
Input voltage
V
IN
DL3
BST
Gate-drive output for 3.3-V buck low-side MOSFET.
Boost capacitor connection for 3.3-V buck converter.
Inductor connection for 3.3-V buck low-side MOSFET.
Gate-drive output for 3.3-V buck high-side MOSFET.
Feedback for 3.3-V buck.
3
LX
3
DH3
FB
3
Document Number: 70818
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Si9136
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TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Efficiency vs. 3.3-V Output Current
Efficiency vs. 5.0-V Output Current
100
90
100
90
Frequency = 200 kHz
= 6 V
Frequency = 200 kHz
V
IN
15 V
V
IN
= 6 V
15 V
80
70
60
80
70
60
30 V
30 V
3.3 V Off, 12 V Off
5 V On, 12 V Off
50
50
0.001
0.01
0.1
1
10
0.001
0.01
0.1
Current (A)
1
10
Current (A)
Efficiency vs. 12-V Output Current
85
80
V
IN
= 15 V
Frequency = 200 kHz
6 V
75
70
65
30 V
5 V On, 3.3 V Off
60
55
0.001
0.01
Current (A)
0.1
1
Document Number: 70818
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Si9136
Vishay Siliconix
TYPICAL WAVEFORMS
5-V Converter (V = 10 V)
5-V Converter (V = 10 V)
IN
IN
Ch1: V
Ch1: V
OUT
OUT
Ch2: Load
Current (1 A/div)
Ch2: Load
Current (1 A/div)
PWM Loading
PWM Unloading
5-V Converter (V = 10 V)
5-V Converter (V = 10 V)
IN
IN
Ch1: V
OUT
Ch1: V
OUT
Ch2: Load
Current (1 A/div)
Ch2: Load
Current (1 A/div)
PSM Õ PWM
PWM Õ PSM
5-V Converter (V = 10 V)
IN
5-V Converter (V = 10 V)
IN
Ch2: V
OUT
Ch2: V
OUT
Ch3: Inductor
Node
(L X5)
Ch3: Inductor
Node
(L X5)
Ch4: Inductor
Current (1A/div)
Ch4: Inductor
Current (1A/div)
PSM Operation
PWM Operation
Document Number: 70818
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Si9136
Vishay Siliconix
TYPICAL WAVEFORMS
3-V Converter (V = 10 V)
3-V Converter (V = 10 V)
IN
IN
Ch1: V
OUT
OUT
ad
Ch2: Load
(1 A/div)
Current (1 A/div)
PWM, Loading
PWM, Unloading
3-V Converter (V = 10 V)
3-V Converter (V = 10 V)
IN
IN
ad
(1 A/div)
oad
(1 A/div)
PSM Õ PWM
PWM Õ PSM
12-V Converter (V = 10 V)
Start-Up
IN
3.3-V Output
5-V Output
Ch1: V
OUT
12-V Output
Inductor Current,
5-V Converter
(2 A/div)
Ch4: Load
Current
(100 mA/div)
250-mA Transient
Document Number: 70818
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Si9136
Vishay Siliconix
STANDARD APPLICATION CIRCUIT
V
IN
+5 V up to 30 mA
C7
33 mF
D1
CMPD2836
CMPD2836
C5
D2
4.7 mF
C4
33 mF
V
IN
V
L
C1
0.1 mF
C2
0.1 mF
BST
BST
3
5
Q2
Si4416DY
L1, 10 mH
R
7
DH5
LX
R
cs1
Q1
Si4416DY
0.02 W
+5 V
DH3
LX
5
C3
330 mF
3
Q4
Si4812DY
R
1
L2
10 mH
R
cs2
DL5
0.02 W
+3.3 V
Q3
Si4812DY
DL3
CS
FB
5
C6
330 mF
5
D3
CMPD2836
C8
CS
3
C9
4.7 mF
BSTFY
0.1 mF
Q5
DHFY
LXFY
Si2304DS
+12 V 0 to
250 mA
L3, 10 mH
D4, D1FS4
C10
100 mF
D5, D1FS4
FB3
Q6
Si2304DS
DLFY
CSP
5 ON/OFF
R
R
6
cs3
3.3 ON/OFF
12 ON/OFF
CSN
FBFY
+3.3 V up
to 1 mA
REF
COMP
PGND
GND
C11
1 mF
C12
120 pF
FIGURE 1.
Document Number: 70818
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Si9136
Vishay Siliconix
TIMING DIAGRAMS
The converter is enabled
ON/OFF
V
IN
is applied
V
IN
LDO is activated
after V is applied
IN
V
L
REF circuit is activated
after V becomes
available
2.4 V
L
V
REF
After V
goes above
REF
2.4 V, the converter is
turned on
OSC EN
(Sysmon EN)
Oscillator is activated
OSC
Slow soft-start gradually
increases the maximum
inductor current
4 ms
f
(SS)
DH
max
High-side gate drive duty
ratio gradually increases
to maximum
t
BBM
Low-side gate drive
D
L
FIGURE 2. Converter is Enabled Before V is Applied
IN
The converter is
enabled
ON/OFF
V
IN
is applied
V
IN
LDO is activated
after V is applied
IN
V
L
REF circuit is activated
after V becomes
available
L
2.4 V
V
REF
After V
goes above
REF
2.4 V, the converter is
turned on
OSC EN
(Sysmon EN)
Oscillator is activated
OSC
4 ms
Slow soft-start gradually
increases the maximum
inductor current
f
(SS)
DH
DL
max
FIGURE 3. Converter is Enabled After V is Applied
IN
Document Number: 70818
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Si9136
Vishay Siliconix
TIMING DIAGRAMS
V
IN
[ V (V )
L
V
L
4 V
3.4 V
RESET
V
REF
OSC EN
(Sysmon EN)
OSC
D
H
D
L
f
(SS)
max
FIGURE 4. Power Off Sequence
Document Number: 70818
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Si9136
Vishay Siliconix
DETAIL FUNCTIONAL BLOCK DIAGRAM
FB
5
CS_
FB_
+
_
1X
R
R
X
Internal voltage
divider is only
used on 5-V
Error
output.
Amplifier
Y
–
5/3 ON/OFF_
BST_
PWMCMP
+
REF
–
+
DH
DH
Logic
Control
Pulse
Skipping
Control
LX_
SLC
BBM
DL
20 mV
V
L
Current
Limit
DL
V
Soft-Start
SYNC
Rectifier Control
t
FIGURE 5. Buck Block Diagram
FBFY
R1
ON/OFF
R2
Error
Amplifier
PWM
Comparator
BSTY
–
+
–
Logic
Control
DH
REF
+
LXFY
COMP
DHFY
DLFY
C/S
Amplifier
Pulse
Skipping
Control
DL
ICSP
ICSN
–
+
–
+
100 mV
Current Limit
V
Soft-Start
t
FIGURE 6. PWM Flyback Block Diagram
Document Number: 70818
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Si9136
Vishay Siliconix
DETAIL FUNCTIONAL BLOCK DIAGRAM
5-V
Linear
Regulator
V
IN
FB
5
CS
5
5-V
Buck
BST
5
5 ON/OFF
3 ON/OFF
12 ON/OFF
Controller
DH5
LX
5
V
L
4.5 V
DL5
4 V
FB
3
CS
3
Logic
3.3-V
Buck
Controller
Control
BST
3.3-V
3
Reference
DH3
LX
2.4 V
3
DL3
FYBFY
ICSP
12-V
Flyback
Controller
ICSN
BSTFY
DHFY
LXFY
DLFY
FIGURE 7. Complete Si9136 Block Diagram
DESCRIPTION OF OPERATION
Start-up Sequence
and one 5-V low drop out (LDO) linear regulator output.
Switch-mode supply output current capabilities depend on
external components (can be selected to exceed 10 A). In the
standard application circuit illustrated in Figure 1, each buck
converter is capable of delivering 5 A, with the flyback
converterdelivering 250 mA. The recommended load currents
for the precision 3.3-V reference output is less than 1 mA, and
the 5-V LDO output is less than 30 mA. In order to maximize
power efficiency of the converter, when the 5-V buck converter
output (FB5) voltage is above 4.5-V, the internal 5-V LDO is
turned off and VL is supplied by the 5-V converter output.
Si9136’s outputs are controlled by three specific input control
lines; 3.3 ON/OFF, 5 ON/OFF, and 12 ON/OFF. Once VIN is
applied, the VL, the 5-V LDO will come up within its tolerance.
When any one of these control lines becomes logic high, the
precision 3.3-V reference will also come up. Immediately
afterwards, the oscillator will begin and the corresponding
converter will come up with its own tolerance. In the event of all
three converters are turned off, the oscillator and the reference
output will be turned off, and the total system will only draw
35-mA of supply current.
Buck Converter Operation:
Each converter can soft-start independently. This internal
soft-start circuitry for each converter will gradually increases
the inductor maximum peak current during the soft-startperiod
(approximately 4 ms), preventing excessive currents from
being drawn from the input.
The 3.3-V and 5-V buck converters are both current-mode
PWM and PSM (during light load operation) regulators using
high-side bootstrap n-channel and low-side n-channel
MOSFETs. At light load conditions, the converters switch at a
lower frequency than the clock frequency, seen like some
clock pulses between the actual switching are skipped, this
operating condition is defined as pulse-skipping. The
operation of the converter(s) switching at clock frequency is
defined as normal operation.
Si9136 converts a 5.5-V to 30-V input voltage to five different
output voltages; two buck (step-down) high current, PWM,
switch-mode supplies of 3.3-V and 5-V, one “flyback” PWM
switch-mode supply of 12-V, one precision 3.3-V reference
Document Number: 70818
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DESCRIPTION OF OPERATION (CONT'D)
Normal Operation: Buck Converters
called for brevity a flyback. It consists of two n-channel
MOSFET switches that are turned on and off in phase, and two
diodes. Similar to the buck converter, during the light load
conditions, the flyback converter will switch at a frequency
lower than the internal clock frequency, which can be defined
as pulse skipping mode (PSM); otherwise, it is operating in
normal PWM mode.
In normal operation, the buck converter high-side MOSFET is
turned on with a delay (known as break-before-make time -
tBBM), after the rising edge of the clock. After a certain on time,
the high-side MOSFET is turned off and then after a delay
(tBBM), the low-side MOSFET is turned on until the next rising
edge of the clock, or the inductor current reaches zero. The
tBBM (approximately 25 ns to 60 ns), has been optimized to
guarantee the efficiency is not adversely affected at the high
switching frequency and a specified minimum to account for
variations of possible MOSFET gate capacitances.
Normal Operation: Flyback Converter
In normal operation mode, the two MOSFETs are turned on at
the rising edge of the clock, and then turned off. The on time is
controlled internally to provide excellent load, line, and
temperature regulation. The flyback converter has load, line
and temperature regulation well within 0.5%.
During the normal operation, the high-side MOSFET switch
on-time is controlled internally to provide excellent line and
load regulation over temperature. Both buck converters
should have load, line, regulation to within 0.5% tolerance.
Pulse Skipping: Flyback Converter
Pulse Skipping: Buck Converters
Under the light load conditions, similar to the buck converter,
the flyback converter will enter pulse skipping mode. The
MOSFETs will be turned on until the inductor current increases
tosuchalevelthatthevoltageacrossthepinCSPandpinCSN
reaches 100 mV, or the on time reaches the maximum duty
cycle. After the MOSFETs are turned off, the inductor current
will conduct through two diodes until it reaches zero. At this
point, the flyback converter output will rise slightly above the
regulation level, and the converter will stay idle for one or
several clock cycle(s) until the output falls back slightly below
the regulation level. The switching losses are reduced by
skipping pulses and so the efficiency during light load is
preserved.
When the buck converter switching frequency is less than the
internalclock frequency, itsoperationmodeisdefinedaspulse
skipping mode. During this mode, the high-side MOSFET is
turnedon until VCS-VFB reaches 20 mV, ortheontimereaches
its maximum duty ratio. After the high-side MOSFET is turned
off, the low-side MOSFET is turned on after the tBBM delay,
which will remain on until the inductor current reaches zero.
The output voltage will rise slightly above the regulation
voltage after this sequence, causing the controller to stay idle
for the next one, or several clock cycles. When the output
voltage falls slightly below the regulation level, the high-side
MOSFET will be turned on again at the next clock cycle. With
the converter remaining idle during some clock cycles, the
switching losses are reduced in order to preserve conversion
efficiency during the light output current condition.
Current Limit: Flyback Converter
Current Limit: Buck Converters
Similartothebuckconverter;whenthevoltageacrosspinCSP
and pin CSN exceeds 410-mV typical, the two MOSFETs will
be turned off regardless of the input and output conditions.
When the buck converter inductor current is too high, the
voltage across pin CS3(5) and pin FB3(5) exceeds
approximately 120 mV, the high-side MOSFET would be
turned off instantaneously regardless of the input, or output
condition. The Si9136 features clock cycle by clock cycle
current limiting capability.
Flyback Lowside Drive
Unlike the gate drive for the two buck converters, the flyback
lowside gate drive DLFY is powered by a voltage that can be
as high as 15 V with 20-V input for the flyback converter. If this
poses concerns on the MOSFET VGS rating, a simple
resistor-zener circuit can be used: a resistor series with gate
and zener diode across the gate and source to clamp its
voltage. A 100-W, 10-V combination works well.
Flyback Converter Operation:
Designed mainly for PCMCIA or EEPROM programming, the
Si9136 has a 12-V output non-isolated buck boost converter,
Document Number: 70818
S-00583—Rev. C, 03-Apr-00
www.vishay.com S FaxBack 408-970-5600
13
Si9136
Vishay Siliconix
DESCRIPTION OF OPERATION (CONT'D)
Grounding:
efficiency. The converters are current mode control, with a
bandwidthsubstantially higher than the LC tank dominant pole
frequency of the output filter. To ensure stability, the minimum
capacitance and maximum ESR values are:
There are two separate grounds on the Si9136, analog signal
ground (GND) and power ground (PGND). The purpose of two
separate grounds is to prevent the high currents on the power
devices (both external and internal) from interfering with the
analog signals. The internal components of Si9136 have their
grounds tied (internally) together. These two grounds are then
tied together (externally) at a single point, to ensure Si9136
noise immunity.
VREF
VOUT x Rcs
CLOAD
w
ESR v
2p xĂ VOUT x RCS x BW
VREF
Where VREF = 3.3 V, VOUT is the output voltage (5 V or 3.3 V),
Rcs is the current sensing resistor in ohms and BW = 50 khz
This separation of grounds should be maintained in the
external circuitry, with the power ground of all power devices
being returned directly to the input capacitors, and the small
signal ground being returned to the GND pin of Si9136.
With the components specified in the application circuit
(L = 10 mH, RCS = 0.02 W,
COUT = 330 mF,
ESR
ON/OFF Function
approximately 0.1 W), the converter should have a bandwidth
at approximately 50 kHz, with minimum phase margin of 65_,
and dc gain above 50 dB.
Logic-low shuts off the appropriate section by disabling the
gate drive stage. High-side and low-side gate drivers are
turned off when ON/OFF pins are logic-low. Logic-high
enables the DH and DL pins.
Other Outputs
The Si9136 also provides a 3.3-V reference which can be
external loaded up to 1 mA, aswellas, a5-VLDOoutputwhich
can be loaded 30 mA, or even more depending on the system
application. When the 5-V buck converter is turned on, the 5-V
LDOoutputisshortedwiththe5-Vbuckconverteroutput, soits
loading capability is substantially increased. For stability, the
3.3-V reference output requires a 1-mF capacitor, and 5-V LDO
output requires a 4.7-mF capacitor.
Stability:
Buck Converters:
In order to simplify designs, the Si9136 requires no specified
external components except load capacitors for stability
control. Meanwhile, it achieves excellent regulation and
Document Number: 70818
S-00583—Rev. C, 03-Apr-00
www.vishay.com S FaxBack 408-970-5600
14
SI9136 相关器件
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| SI9137LG-T1 | VISHAY | IC SWITCHING CONTROLLER, 330 kHz SWITCHING FREQ-MAX, PDSO28, SSOP-28, Switching Regulator or Controller | 获取价格 |
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