ZL60102MJD
更新时间：2025-05-19 01:41:11
品牌：ZARLINK
描述：12 x 2.7 Gbps Parallel Fiber Optic Link Transmitter and Receiver
概述
数据手册ZL60102MJD 概述
12 x 2.7 Gbps Parallel Fiber Optic Link Transmitter and Receiver 12× 2.7 Gbps的并行光纤连接发射器和接收器
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PDF下载ZL60101/2
12 x 2.7 Gbps Parallel Fiber Optic Link
Transmitter and Receiver
Data Sheet
June 2004
Ordering Information
ZL60101/MJD Parallel Fiber Transmitter
ZL60102/MJD Parallel Fiber Receiver
Heat sink and EMI shield options
are available upon request
0°C to +80°C
Features
Description
•
•
•
•
12 parallel channels, total 32.6 Gbps capacity
Data rate up to 2.72 Gbps per channel
850 nm VCSEL array
Data I/O is CML compatible with DC blocking
capacitors
Link reach 300 m with 50/125 µm 500 MHz.km
The ZL60101 and ZL60102 together make a very high
speed transmitter/receiver pair for parallel fiber
applications.
The ZL60101 transmitter module converts parallel
electrical input signals via a laser driver and a VCSEL
array into parallel optical output signals at a wavelength
of 850 nm.
•
fiber at 2.5 Gbps
•
•
Channel BER better than 10-12
Industry standard MPO/MTP ribbon fiber
connector interface
Pluggable MegArray® ball grid array connector
Optionally available with EMI shield and external
heat sink
The ZL60102 receiver module converts parallel optical
input signals via a PIN photodiode array and a
transimpedance and limiting amplifier into electrical
output signals.
•
•
The modules are pluggable each fitted with an industry-
standard MegArray® BGA connector. This provides
ease of assembly on the host board and enables
provisioning of bandwidth on demand.
•
•
•
Laser class 1M IEC 60825-1:2001 compliant
Power supply 3.3 V
Compatible with industry MSA
Applications
•
High-speed interconnects within and between
switches, routers and transport equipment
•
•
Proprietary backplanes
Low cost SONET/SDH VSR (Very Short Reach)
OC-192/STM64 connections
InfiniBand® connections
Interconnects rack-to-rack, shelf-to-shelf, board-
to-board, board-to-optical backplane
•
•
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-4, Zarlink Semiconductor Inc. All Rights Reserved.
ZL60101/2
Data Sheet
Table of Contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
ZL60101 Transmitter Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Transmitter Control and Status Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Transmitter Control and Status Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Transmitter Pinout Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Transmitter Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
ZL60102 Receiver Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Receiver Control and Status Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Receiver Control and Status Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Receiver Pinout Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Receiver Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Regulatory Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Eye Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrostatic Discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrostatic Discharge Immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electromagnetic Interference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Emission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Handling instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Cleaning the Optical Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
ESD Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Link Reach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Link Model Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical Interface - Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Absolute Maximum Ratings
Not necessarily applied together. Exceeding these values may cause permanent damage. Functional operation
under these conditions is not implied.
Parameter
Symbol
Min.
Max.
Unit
Supply voltage
VCC
∆V
-0.3
4.0
1.2
V
V
Differential input voltage amplitude1
Voltage on any pin
VPIN
MOS
TSTG
VESD
-0.3
5
VCC + 0.3
95
V
Relative humidity (non-condensing)
Storage temperature
%
°C
kV
-40
100
ESD resistance
±1
1. Differential input voltage amplitude is defined as ∆V = DIN+ − DIN-.
Recommended Operating Conditions
These parameters apply both to the transmitter and the receiver.
Parameter
Symbol
Min.
Max.
Unit
Power supply voltage
VCC
TCASE
fD
3.135
0
3.465
80
V
°C
Operating case temperature
Signaling rate (per channel)1
Link distance2
1.0
2
2.72
Gbps
m
LD
Data I/O DC blocking capacitors3
Power supply noise4
CBLK
VNPS
100
nF
200
mVp-p
1. Data patterns are to have maximum run lengths and DC balance shifts no worse than that of a Pseudo Random Bit Sequence of
length 223-1 (PRBS-23). Information on lower bit rates is available on request.
2. For maximum distance, see Table 6.
3. For AC-coupling, DC blocking capacitors external to the module with a minimum value of 100 nF is recommended.
4. Power supply noise is defined at the supply side of the recommended filter for all VCC supplies over the frequency range of 500 Hz
to 2720 MHz with the recommended power supply filter in place.
L1 1
µ
H
L2 6.8 nH
R1 100
Ω
R2 1.0 kΩ
Host
Vcc
Module
Vcc
C1
10
C2
10
C3
0.1
C4
0.1
µ
F
µ
F
µ
F
µ
F
Figure 1 - Recommended Power Supply Filter
3
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
ZL60101 Transmitter Specifications
All parameters below require operating conditions according to “Recommended Operating Conditions” on page 3.
Parameter
Symbol
Min.
Max.
Unit
Optical Parameters
Launch power (50/125 µm MMF)1
Extinguished output power
Extinction ratio2
POUT
POFF
ER
-7.5
-2
dBm
dBm
dB
-30
7
Optical modulation amplitude3
OMA
λC
0.24
830
mW
nm
Center wavelength
860
0.85
-116
150
150
120
50
Spectral width4
∆λ
nmrms
dB/Hz
ps
Relative intensity noise OMA
Optical output rise time (20 - 80%)
Optical output fall time (20 - 80%)
Total jitter contributed (peak to peak)5
Deterministic jitter contributed (peak to peak)
Channel to channel skew6
Electrical Parameters
RIN12OMA
tRO
tFO
ps
TJ
ps
DJ
ps
tSK
100
ps
Power dissipation
PD
ICC
∆VIN
ZIN
tRE
1.5
450
800
120
160
160
W
mA
mVp-p
Ω
Supply current
Differential input voltage amplitude (peak to peak)7
Differential input impedance8
Electrical input rise time (20 - 80%)
Electrical input fall time (20 - 80%)
200
80
ps
tFE
ps
1. The output optical power is compliant with IEC 60825-1 Amendment 2, Class 1M Accessible Emission Limits.
2. The extinction ratio is measured at 622 Mbps.
3. Informative. Corresponds to POUT = -7.5 dBm and ER = 7 dB.
4. Spectral width is measured as defined in EIA/TIA-455-127 Spectral Characterization of Multimode Laser Diodes.
5. Total jitter equals TP1 to TP2 as defined in IEEE 802.3 clauses 38.2 and 38.6 (Gigabit Ethernet).
6. Channel skew is defined for the condition of equal amplitude, zero ps skew signals applied to the transmitter inputs.
7. Differential input voltage is defined as the peak to peak value of the differential voltage between DIN+ and DIN-. Data inputs are
CML compatible.
8. Differential input impedance is measured between DIN+ and DIN-.
4
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Classified in accordance with IEC 60825-1/A2:2001, IEC 60825-2 : 2000
Class 1M Laser Product
Emited wavelength: 840 nm
DIN0+
DIN0-
0
1
2
3
4
5
6
7
VCSEL
Driver
VCSEL
Array
8
DIN11+
DIN11-
9
10
11
VCSEL Driver Controller
V
CC
V
EE
RESET Tx_DIS Tx_EN FAULT
Figure 2 - ZL60101 Transmitter Block Diagram
Front view - MTP key up
Ch 11
Ch 10
Ch 9
Ch 8
Ch 7
Ch 6
Ch 5
Ch 4
Ch 3
Ch 2
Ch 1
Ch 0
Host circuit board
Table 1 - Transmitter Optical Channel Assignment
5
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
DIN+
DIN-
VCC
50Ω
50Ω
13k
Ω
Ω
11k
VEE
Figure 3 - Differential CML Input Equivalent Circuit
Transmitter Control and Status Signals
The following table shows the timing relationships of the status and control signals of the pluggable optical
transmitter.
Parameter
Symbol
Min.
Typ.
Max.
Unit
Control input voltage high1
Control input voltage low
Control pull-up resistor2
Control pull-down resistor3
Status output voltage low4, 5
Status pull-down resistor4
FAULT assert time
VIH
VIL
2.1
V
0.62
V
RPU
RPD1
VOL
RPD2
TFA
10
10
kΩ
kΩ
V
0.4
10
kΩ
µs
µs
µs
µs
ms
ms
µs
µs
ms
100
100
FAULT lasers off
TFD
RESET duration
TTDD
TOFF
TON
TTEN
TTD
10
RESET assert time
5
10
100
1
RESET de-assert time
Tx_EN assert time
Tx_EN de-assert time
Tx_DIS assert time
5
5
10
10
1
TTD
Tx_DIS de-assert time
TTEN
1. Applies to control signals RESET, Tx_DIS and Tx_EN.
2. Applies to control signals RESET and Tx_EN. Internal pull-up resistor.
3. Applies to control signal Tx_DIS. Internal pull-down resistor.
4. Applies to status signal FAULT. Internal pull-down to VEE
5. With status output sink current max. 2 mA.
.
6
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Transmitter Control and Status Timing Diagrams
The following figures show the timing relationships of the status and control signals of the pluggable optical
transmitter.
Vcc
TTEN
Tx Output [0:11]
Data [0:11]
Transmitter Not Ready
Normal operation
RESET: floating or high
Figure 4 - Transmitter Power-up Sequence
FAULT
TFA
TFD
Data [0:11]
Tx Output [0:11]
No Fault
Fault
Figure 5 - Transmitter Fault Signal Timing Diagram
7
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
RESET
FAULT
TTDD
TON
Data [0:11]
Tx Output [0:11]
Transmitter Not Ready
Normal operation
Figure 6 - Transmitter Reset Signal Timing Diagram
Tx_DIS
Tx_EN
TTD
Data [0:11]
TTD
Data [0:11]
Lasers
off
Lasers
off
Normal operation
Tx_EN
Tx Off
Normal operation
Tx Off
TTEN
Data [0:11]
Transmitter Not Ready
Normal operation
Figure 7 - Transmitter Enable and Disable Timing Diagram
Tx_DIS High
Tx_DIS Low
Normal operation
Transmitter disabled
Tx_EN High
Tx_EN Low
Transmitter disabled
Transmitter disabled
Table 2 - Truth Table for Transmitter Operation (Pre-condition: RESET floating or HIGH)
8
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Transmitter Pinout Assignments
K
J
H
G
F
E
D
C
B
A
NIC
NIC
NIC
VEE
VEE
VEE
VEE
DIN5+
DIN5-
VEE
VEE
VEE
VEE
NIC
1
2
NIC
NIC
NIC
VCC
NIC
VCC
VEE
VEE
VEE
VEE
VEE
DIN7+
DIN7-
VEE
DIN8+
DIN8-
VEE
VEE
VEE
NIC
VEE
VEE
NIC
NIC
NIC
DNC
DIN4+
DIN4-
VEE
3
NIC
VCC
VCC
DIN3+
DIN3-
VEE
DIN6+
DIN6-
VEE
4
NIC
VCC
VCC
DIN2+
DIN2-
VEE
DIN9-
DIN9+
VEE
5
NIC
VCC
VCC
DIN1+
DIN1-
VEE
DIN10-
DIN10+
VEE
6
NIC
DNC
DNC
DNC
NIC
NIC
DIN0+
DIN0-
VEE
DIN11-
DIN11+
VEE
7
RESET
Tx_EN
DNC
FAULT
Tx_DIS
DNC
VEE
VEE
8
VEE
VEE
VEE
VEE
9
DNC
DNC
DNC
DNC
DNC
DNC
10
Table 3 - Transmitter Host Circuit Board Layout (Top view, toward MPO/MTP connector end)
(10x10 array, 1.27 mm pitch)
Transmitter Pin Description
Signal Name
Type
Description
Comments
DIN[0:11] +/-
VCC
Data input Transmitter data in, channel 0 to 11
Transmitter power supply rail
Internal differential termination at 100 Ω.
VEE
Transmitter signal common. All
transmitter voltages are referenced
to this potential unless otherwise
stated.
Directly connect these pads to the PC
board transmitter signal ground plane.
Tx_EN
Tx_DIS
FAULT
Control
input
Transmitter enable.
HIGH: normal operation
LOW: disable transmitter
Active high, internal pull-up. See
Table 2.
Control
input
Transmitter disable.
HIGH: disable transmitter
LOW: normal operation
Active high, internal pull-down. See
Table 2.
Status
output
Transmitter fault.
When active, all channels are disabled.
Clear by reset signal. Internal pull-up.
HIGH: normal operation
LOW: laser fault detected on at least
one channel
RESET
Control
input
Transmitter reset.
HIGH: normal operation
LOW:reset to clear fault signal
Internal pull-up.
DNC
NIC
Do not connect to any potential,
including ground.
No internal connection.
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Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
ZL60102 Receiver Specifications
All parameters below require operating conditions according to Table 2 and a termination load of 100 Ω differential
at the electrical output.
Parameter
Symbol
Min.
Max.
Unit
Optical Parameters
Input optical power1
Center wavelength
Return loss2
PIN
λC
-16
830
12
-2
dBm
nm
860
RL
dB
Total jitter contributed (peak to peak)3
Deterministic jitter contributed (peak to peak)
Stressed receiver sensitivity4
Channel to channel skew5
TJ
120
50
ps
DJ
ps
PSS
tSK
PSA
PSD
-11.3
100
-17
dBm
ps
Signal detect assert
dBm
dBm
Signal detect de-assert
-27
Electrical Parameters
Power dissipation
PD
ICC
1.5
450
800
120
W
mA
mVp-p
Ω
Supply current
Differential output voltage amplitude (peak to peak)6
Output differential load impedance7
Stressed receiver eye opening8
Electrical output rise time (20 - 80 %)
Electrical output fall time (20 - 80 %)
∆VOUT
ZL
500
80
PSE
tRE
0.3
UI
150
150
ps
tFE
ps
1. Receive power for a channel is measured for a BER of 10-12 and worst case extinction ratio. PIN (Min) is measured using a fast
rise/fall time source with low RIN and adjacent channel(s) operating with incident power of 6 dB above PIN (Min).
2. Return loss is measured as defined in TIA/EIA-455-107A Determination of Component Reflectance or Link/System Return Loss Us-
ing a Loss Test Set.
3. Total jitter equals TP3 to TP4 as defined in IEEE 802.3 clauses 38.2 and 38.6 (Gigabit Ethernet).
4. The stressed receiver sensitivity is measured using PRBS 223-1 pattern, 2.7 dB inter-symbol interference, ISI (Min), 30 ps duty cycle
dependent deterministic jitter, DCD DJ (Min), and 7 dB extinction ratio, ER (Min) (ER penalty = 1.76 dB). All channels not under test
are receiving signals with an average input power of 6 dB above PIN (Min).
5. Channel skew is defined for the condition of equal amplitude, zero ps skew signals applied to the receiver inputs.
6. Differential output voltage is defined as the peak to peak value of the differential voltage between DOUT+ and DOUT- and measured
with a 100 Ω differential load connected between DOUT+ and DOUT-. Data outputs are CML compatible.
7. See Figure 14.
8. The stressed receiver eye opening represents the eye at TP4 as defined in IEEE 802.3 clauses 38.2 and 38.6 (Gigabit Ethernet).
The stressed receiver eye opening is measured using PRBS 223-1 pattern, 2.7 dB ISI min, 30 ps DCD DJ min, 7 dB ER min and an
average input power of -10.8 dBm (0.5 dB above minimum stressed receiver sensitivity as defined in IEEE 802.3 clause 38.6). All chan-
nels not under test are receiving signals with an average input power of 6 dB above PIN (Min).
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Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
DOUT0+
DOUT0-
0
1
2
3
Trans-
Impedance
and
Limiting
Amplifier
4
PIN
Array
5
6
7
8
9
10
11
DOUT11+
DOUT11-
VCC VEE
Rx_EN Rx_SD SQ_EN
Figure 8 - ZL60102 Receiver Block Diagram
Front view - MTP key up
Ch 11
Ch 10
Ch 9
Ch 8
Ch 7
Ch 6
Host circuit board
Table 4 - Receiver Optical Channel Assignment
Ch 5
Ch 4
Ch 3
Ch 2
Ch 1
Ch 0
Receiver Control and Status Signals
The following table shows the timing relationships of the status and control signals of the pluggable optical receiver.
Parameter
Control input voltage high1
Symbol
Min.
Typ.
Max.
Unit
VIH
VIL
2.0
V
V
Control input voltage low1
0.9
100
0.4
Control input pull-up current1
Status output voltage low2, 3
Status output pull-up resistor2
Receiver signal detect assert time
Receiver signal detect de-assert time
Receiver enable assert time
Receiver enable de-assert time
IIN
VOL
10
µA
V
RPU
3.25
50
50
33
5
kΩ
µs
µs
ms
µs
TSD
200
200
TLOS
TRXEN
TRXD
1. Applies to control signals Rx_EN, SQ_EN.
2. Applies to status signal Rx_SD. Internal pull-up to VCC
3. With status output sink current max 2 mA.
.
11
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Receiver Control and Status Timing Diagrams
The following figures show the timing relationships of the status and control signals of the pluggable optical
receiver.
Rx_EN
TRXD
ICC
Normal Operation
Rx Off
Figure 9 - Receiver Enable Signal Timing Diagram
Rx_SD
TLOS
Signal
No Signal
Figure 10 - Receiver Signal Detect Timing Diagram
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Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Receiver Pinout Assignments
K
J
H
G
F
E
D
C
B
A
DNC
NIC
NIC
VEE
VEE
VEE
VEE
DOUT5-
DOUT5+
VEE
VEE
VEE
VEE
NIC
1
2
DNC
NIC
NIC
VCC
NIC
VCC
VEE
VEE
VEE
VEE
VEE
DOUT7-
DOUT7+
VEE
DOUT8-
DOUT8+
VEE
VEE
VEE
NIC
VEE
VEE
NIC
NIC
NIC
DNC
DOUT4-
DOUT4+
VEE
3
NIC
VCC
VCC
DOUT3-
DOUT3+
VEE
DOUT6-
DOUT6+
VEE
4
NIC
VCC
VCC
DOUT2-
DOUT2+
VEE
DOUT9+
DOUT9-
VEE
5
NIC
VCC
VCC
DOUT1-
DOUT1+
VEE
DOUT10+
DOUT10-
VEE
6
NIC
NIC
Rx_SD
NIC
DOUT0-
DOUT0+
VEE
DOUT11+
DOUT11-
VEE
7
DNC
DNC
SQ_EN
NIC
VEE
VEE
8
Rx_EN
DNC
NIC
VEE
VEE
VEE
VEE
9
DNC
DNC
DNC
DNC
DNC
DNC
DNC
10
Table 5 - Receiver Pinout Assignments (Top view, toward MPO/MTP connector end)
(10x10 array, 1.27 mm pitch)
Receiver Pin Description
Signal Name
Type
Description
Comments
DOUT[0:11] +/-
Data
Receiver data out, channel 0 to 11.
output
VCC
VEE
Receiver power supply rail.
Receiver signal common. All receiver voltages Directly connect these pads to
are referenced to this potential unless
otherwise stated.
the PC board transmitter
signal ground plane.
Rx_EN
Rx_SD
SQ_EN
Control
input
Receiver enable.
HIGH: normal operation
LOW: disable receiver
Internal pull-up.
Internal pull-up.
Internal pull-up.
Status
output
Receiver signal detect.
HIGH: valid optical input on all channels
LOW: loss of signal on at least one channel
Control
input
Squelch enable.
HIGH: squelch function enabled. Data OUT is
squelched on any channels that have loss of
signal
LOW: squelch function disabled
DNC
NIC
Do not connect to any potential, including
ground.
No internal connection.
13
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Thermal Characteristics
There are three options for heat sinks depending on the cooling needs. They are:
1. Direct application without any attached external heat sink
2. Use a generic heat sink specified by Zarlink
3. Use a customer designed external heat sink
In Figure 11 and Figure 12, the temperature rise and thermal resistance as a function of air velocity (free air velocity
at the top of the module) is shown for option 1 and 2. The thermal resistance is defined as the temperature
difference between the case temperature and ambient flowing air divided by the total heat dissipation of the
module.
Improved thermal properties can be achieved by using a larger heat sink especially if more height is available
(option 3). For this option, a more detailed discussion with Zarlink is recommended regarding heat sink design
attachment materials.
Temperature rise at 1.5W
(Free stream air velocity)
20
16
12
Option ZL6010*/ML
8
Option ZL6010*/MJ
4
0
0
1
2
3
4
Air velocity (m/s)
Figure 11 - Temperature Difference Between Ambient Flowing Air and Case at a Heat Dissipation
of 1.5 W
Thermal resistance to air
(Free stream air velocity)
15
10
Option ZL6010*/ML
5
0
Option ZL6010*/MJ
0
1
2
3
4
Air velocity (m/s)
Figure 12 - Thermal Resistance, as a Function of Air Velocity (the airflow is along the shortest
side of the module)
For any other orientation, the thermal resistance is 75-100% of the values shown above.
14
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Regulatory Compliance
Eye Safety
The maximum optical output power is specified to comply with Class 1M in accordance with IEC 60825−1:2001. In
addition the transmitter complies with FDA performance standards for laser products except for deviations pursuant
to Laser Notice No.50, dated July 26, 2001. No maintenance or service of the product may be performed.
Electrostatic Discharge
The module is classified as Class 1 (> 1000 Volts) according to MIL−STD−883, test method 3015.7, with regards to
the electrical pads.
Electrostatic Discharge Immunity
The part withstand a 15 kV (air discharge) and 8 kV (contact discharge) either indirect or directly to receptacle;
tested according to IEC 61000−4−2, while in operation without addition of bit errors.
Electromagnetic Interference
Emission
The electromagnetic emission is tested in front of the module (module fitted with EMI shield), with the module
mounted in a frontplate cutout. The part is tested with FCC Part 15, 30 − 1000 MHz and 1 GHz to 5th harmonic of
the highest fundamental frequency (6.75 GHz), and is specified to be Class B with > 6 dB margin.
Immunity
The electromagnetic immunity is tested without a front panel or enclosure. The module specification is maintained
with an applied field of 10 V/m for frequencies between 10 kHz and 10 GHz, according to IEC 61000−4−3 and
GR−1089−CORE.
Handling instructions
Cleaning the Optical Interface
A protective connector plug is supplied with each module. This plug should remain in place whenever a fiber cable
is not inserted. This will keep the optical port free from dust or other contaminants, which may potentially degrade
the optical signal. Before reattaching the connector plug to the module, visually inspect the plug and remove any
contamination. If the module’s optical port becomes contaminated, it can be cleaned with high-pressure nitrogen
(the use of fluids, or physical contact, is not advised due to potential for damage).
Before a fiber cable connector is attached to the module, it is recommended to clean the fiber cable connector
using an optical connector cleaner, or according to the cable manufacturer's instructions. It is also recommended to
clean the optical port of the module with high-pressure nitrogen.
Connectors
For optimum performance, it is recommended that the number of insertions is limited to 50 for the electrical
MegArray connector and 200 for the optical MPO/MTP connector.
ESD Handling
When handling the modules, precautions for ESD sensitive devices should be taken. These include use of ESD
protected work areas with wrist straps, controlled work-benches, floors etc.
15
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Link Reach
The following table lists the minimum reach distance of the 12 channel pluggable optical modules for different multi-
mode fiber (MMF) types and bandwidths assuming worst case parameters. Each case allows for a maximum of
2 dB per channel connection loss for patch cables and other connectors.
Fiber Type
Modal Bandwidth ReachDistance ReachDistance ReachDistance
@ 850 nm
@ 1 Gbps
@ 2.5 Gbps
@ 2.72 Gbps
[core / cladding µm]
[MHz*km]
[m]
[m]
[m]
62.5/125 MMF
200
400
500
350
650
750
130
260
300
110
220
270
62.5/125 or 50/125 MMF
50/125 MMF
Table 6 - Link Reach for Different Fiber Types and Data Rates
Link Model Parameters
The link reaches above have been calculated using the following link model parameters and Gigabit Ethernet link
model version 2.3.5 (filename: 5pmd047.xls).
Parameter
Mode partition noise k-factor
Symbol
Value
Unit
k
0.3
0.3
Modal noise
MN
SO
UO
αdB
C1
Q
dB
ps/nm2*km
nm
Dispersion slope parameter
Wavelength of zero dispersion
Attenuation coefficient at 850 nm
Conversion factor
0.11
1320
3.5
dB/km
ns.MHz
480
7.04
0.3
Q-factor [BER 10-12
]
TP4 eye opening
UI
UI
DCD allocation at TP3
RMS baseline wander S.D.
RIN coefficient
DCD DJ
σBLW
kRIN
0.08
0.025
0.70
329
Conversion factor
c_rx
ns.MHz
16
Zarlink Semiconductor Inc.
ZL60101/2
Data Sheet
Electrical Interface - Application Examples
Recommended CML output
Transmitter CML input
Host PCB
100nF
100nF
ZOUT=100
Differential
Ω
ZIN=100
Differential
Ω
Z0=100Ω Differential
Figure 13 - Recommended Differential CML Input Interface
Receiver CML output
Recommended CML input
Host PCB
100nF
100nF
ZTERM=100
Differential
Ω
Z0=100Ω Differential
ZL
Figure 14 - Recommended Differential CML Output Interface
17
Zarlink Semiconductor Inc.
NOTES:-
1. All dimensions in mm.
2. Tolerancing per ASME Y14.5M-1994.
© Zarlink Semiconductor 2002. All rights reserved.
Package code
Drawing type
Package drawing - module layout
MJD
ISSUE
ACN
1
Previous package codes
JS004293R1A
12-JUN-03
DATE
Title
APPRD. TD/BE
JS004293
NOTES:-
1. All dimensions in mm.
2. Tolerancing per ASME Y14.5M-1994.
© Zarlink Semiconductor 2002. All rights reserved.
Package code
Drawing type
MJD
ISSUE
ACN
1
Previous package codes
Package Drawing,
JS004293R1A
Host circuit board footprint layout
12-JUN-03
DATE
Title
APPRD. TD/BE
JS004293
For more information about all Zarlink products
visit our Web Site at
www.zarlink.com
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable.
However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such
information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or
use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual
property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in
certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink.
This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part
of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other
information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the
capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute
any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and
suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does
not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in
significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request.
Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system
conforms to the I2C Standard Specification as defined by Philips.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright Zarlink Semiconductor Inc. All Rights Reserved.
TECHNICAL DOCUMENTATION - NOT FOR RESALE
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