AD823AR [ADI]
Dual, 16 MHz, Rail-to-Rail FET Input Amplifier; 双通道， 16 MHz的轨到轨FET输入放大器
| 型号： | AD823AR |
| 厂家： | 
ADI |
| 描述： | Dual, 16 MHz, Rail-to-Rail FET Input Amplifier |
| 文件： | 总16页 (文件大小：442K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual, 16 MHz, Rail-to-Rail
FET Input Amplifier
a
AD823
CONNECTION DIAGRAM
8-Pin Plastic Mini-DIP
and
FEATURES
Single Supply Operation
Output Swings Rail to Rail
8-Lead SOIC
Input Voltage Range Extends Below Ground
Single Supply Capability from +3 V to +36 V
High Load Drive
Capacitive Load Drive of 500 pF, G = +1
Output Current of 15 mA, 0.5 V from Supplies
Excellent AC Performance on 2.6 mA/Amplifier
–3 dB Bandwidth of 16 MHz, G = +1
350 ns Settling Time to 0.01% (2 V Step)
Slew Rate of 22 V/s
1
2
3
4
8
7
6
5
+V
S
OUT1
–IN1
+IN1
OUT2
–IN2
+IN2
–V
S
AD823
Good DC Performance
800 V Max Input Offset Voltage
2 V/؇C Offset Voltage Drift
25 pA Max Input Bias Current
Low Distortion
The AD823 is available over the industrial temperature range of
–40°C to +85°C and is offered in both 8-pin plastic DIP and
SOIC packages.
–108 dBc Worst Harmonic @ 20 kHz
Low Noise
16 nV/√Hz @ 10 kHz
R
C
V
= 100kΩ
= 50pF
= +3V
L
L
S
3V
No Phase Inversion with Inputs to the Supply Rails
APPLICATIONS
Battery Powered Precision Instrumentation
Photodiode Preamps
Active Filters
12- to 16-Bit Data Acquisition Systems
Medical Instrumentation
GND
PRODUCT DESCRIPTION
500mV
200µs
The AD823 is a dual precision, 16 MHz, JFET input op amp
that can operate from a single supply of +3.0 V to +36 V, or
dual supplies of ±1.5 V to ±18 V. It has true single supply
capability with an input voltage range extending below ground
in single supply mode. Output voltage swing extends to within
50 mV of each rail for IOUT ≤ 100 µA providing outstanding out-
put dynamic range.
Figure 1. Output Swing, VS = +3 V, G = +1
2
1
0
Offset voltage of 800 µV max, offset voltage drift of 2 µV/°C,
input bias currents below 25 pA and low input voltage noise
provide dc precision with source impedances up to a Gigohm.
16 MHz, –3 dB bandwidth, –108 dB THD @ 20 kHz and
22 V/µs slew rate are provided with a low supply current of
2.6 mA per amplifier. The AD823 drives up to 500 pF of direct
capacitive load as a follower, and provides an output current of
15 mA, 0.5 V from the supply rails. This allows the amplifier to
handle a wide range of load conditions.
–1
–2
–3
–4
V
= +5V
S
–5
–6
G = +1
–7
–8
This combination of ac and dc performance, plus the outstand-
ing load drive capability results in an exceptionally versatile am-
plifier for applications such as A/D drivers, high-speed active
filters, and other low voltage, high dynamic range systems.
1k
10k
100k
FREQUENCY – Hz
1M
10M
Figure 2. Small Signal Bandwidth, G = +1
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
(@ TA = +25°C, VS = +5 V, RL = 2 kΩ to +2.5 V, unless otherwise noted)
AD823–SPECIFICATIONS
AD823A
Parameter
Conditions
Min
Typ
Max Units
DYNAMIC PERFORMANCE
–3 dB Bandwidth, VO ≤ 0.2 V p-p
Full Power Response
Slew Rate
G = +1
O = 2 V p-p
G = –1, VO = 4 V Step
G = –1, VO = 2 V Step
12
14
16
3.5
22
MHz
MHz
V/µs
V
Settling Time
to 0.1%
to 0.01%
320
350
ns
ns
NOISE/DISTORTION PERFORMANCE
Input Voltage Noise
Input Current Noise
f = 10 kHz
f = 1 kHz
RL = 600 Ω to 2.5 V, VO = 2 V p-p,
f = 20 kHz
16
1
–108
nV/√Hz
fA/√Hz
dBc
Harmonic Distortion
Crosstalk
f = 1 kHz
f = 1 MHz
RL = 5 kΩ
RL = 5 kΩ
–130
–93
dB
dB
DC PERFORMANCE
Initial Offset
Max Offset Over Temperature
Offset Drift
Input Bias Current
at TMAX
Input Offset Current
at TMAX
0.2
0.3
2
3
0.5
2
0.8
2.0
mV
mV
µV/°C
pA
nA
pA
V
V
CM = 0 V to +4 V
O = 0.2 V to 4 V
25
5
20
0.5
nA
Open-Loop Gain
RL = 2 kΩ
20
20
45
V/mV
V/mV
TMIN to TMAX
INPUT CHARACTERISTICS
Input Common-Mode Voltage Range
Input Resistance
Input Capacitance
Common-Mode Rejection Ratio
–0.2 to 3 –0.2 to 3.8
V
Ω
pF
dB
1013
1.8
VCM = 0 V to 3 V
60
76
OUTPUT CHARACTERISTICS
Output Voltage Swing
IL = ±100 µA
0.025 to 4.975
V
IL = ±2 mA
0.08 to 4.92
V
IL = ±10 mA
0.25 to 4.75
V
Output Current
Short Circuit Current
V
OUT = 0.5 V to 4.5 V
16
40
30
500
mA
mA
mA
pF
Sourcing to 2.5 V
Sinking to 2.5 V
G = +1
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current
Power Supply Rejection Ratio
+3
70
+36
5.6
V
mA
dB
T
MIN to TMAX, Total
5.2
80
VS = +5 V to +15 V, TMIN to TMAX
Specification subject to change without notice.
–2–
REV. 0
AD823
(@ TA = +25°C, VS = +3.3 V, RL = 2 kΩ to +1.65 V, unless otherwise noted)
SPECIFICATIONS
AD823A
Typ
Parameter
Conditions
Min
Max Units
DYNAMIC PERFORMANCE
–3 dB Bandwidth, VO ≤ 0.2 V p-p
Full Power Response
Slew Rate
G = +1
12
13
15
3.2
20
MHz
MHz
V/µs
V
O = 2 V p-p
G = –1, VO = 2 V Step
G = –1, VO = 2 V Step
Settling Time
to 0.1%
to 0.01%
250
300
ns
ns
NOISE/DISTORTION PERFORMANCE
Input Voltage Noise
Input Current Noise
Harmonic Distortion
Crosstalk
f = 10 kHz
f = 1 kHz
RL = 100 Ω, VO = 2 V p-p, f = 20 kHz
16
1
–93
nV/√Hz
fA/√Hz
dBc
f = 1 kHz
f = 1 MHz
RL = 5 kΩ
RL = 5 kΩ
–130
–93
dB
dB
DC PERFORMANCE
Initial Offset
Max Offset Over Temperature
Offset Drift
Input Bias Current
at TMAX
Input Offset Current
at TMAX
0.2
0.5
2
3
0.5
2
1.5
2.5
mV
mV
µV/°C
pA
nA
pA
V
V
CM = 0 V to +2 V
O = 0.2 V to 2 V
25
5
20
0.5
nA
Open-Loop Gain
RL = 2 kΩ
15
12
30
V/mV
V/mV
TMIN to TMAX
INPUT CHARACTERISTICS
Input Common-Mode Voltage Range
Input Resistance
Input Capacitance
Common-Mode Rejection Ratio
–0.2 to 1 –0.2 to 1.8
V
Ω
pF
dB
1013
1.8
VCM = 0 V to 1 V
54
70
OUTPUT CHARACTERISTICS
Output Voltage Swing
IL = ±100 µA
0.025 to 3.275
V
IL = ±2 mA
0.08 to 3.22
V
IL = ±10 mA
0.25 to 3.05
V
Output Current
Short Circuit Current
V
OUT = 0.5 V to 2.5 V
15
40
30
500
mA
mA
mA
pF
Sourcing to 1.5 V
Sinking to 1.5 V
G = +1
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current
Power Supply Rejection Ratio
+3
+36
5.7
V
mA
dB
T
MIN to TMAX, Total
5.0
80
VS = +3.3 V to +15 V, TMIN to TMAX 70
Specification subject to change without notice.
REV. 0
–3–
(@ TA = +25°C, VS = ±15 V, RL = 2 kΩ to 0 V, unless otherwise noted)
AD823–SPECIFICATIONS
AD823A
Parameter
Conditions
Min
Typ
Max Units
DYNAMIC PERFORMANCE
–3 dB Bandwidth, VO ≤ 0.2 V p-p
Full Power Response
Slew Rate
G = +1
O = 2 V p-p
G = –1, VO = 10 V Step
G = –1, VO = 10 V Step
12
17
16
4
25
MHz
MHz
V/µs
V
Settling Time
to 0.1%
to 0.01%
550
650
ns
ns
NOISE/DISTORTION PERFORMANCE
Input Voltage Noise
Input Current Noise
f = 10 kHz
f = 1 kHz
RL = 600 Ω, VO = 10 V p-p,
f = 20 kHz
16
1
–90
nV/√Hz
fA/√Hz
dBc
Harmonic Distortion
Crosstalk
f = 1 kHz
f = 1 MHz
RL = 5 kΩ
RL = 5 kΩ
–130
–93
dB
dB
DC PERFORMANCE
Initial Offset
Max Offset Over Temperature
Offset Drift
0.7
1.0
2
3.5
7
mV
mV
µV/°C
pA
pA
nA
Input Bias Current
V
V
CM = 0 V
CM = –10 V
5
30
60
0.5
2
at TMAX
Input Offset Current
at TMAX
VCM = 0 V
5
20
pA
nA
0.5
Open-Loop Gain
VO = +10 V to –10 V
RL = 2 kΩ
30
30
60
V/mV
V/mV
TMIN to TMAX
INPUT CHARACTERISTICS
Input Common-Mode Voltage Range
Input Resistance
Input Capacitance
Common-Mode Rejection Ratio
–15.2 to 13 –15.2 to 13.8
V
Ω
pF
dB
1013
1.8
VCM = –15 V to +13 V
66
82
OUTPUT CHARACTERISTICS
Output Voltage Swing
IL = ±100 µA
–14.95 to +14.95
V
IL = ±2 mA
–14.92 to +14.92
V
IL = ±10 mA
–14.75 to +14.75
V
Output Current
Short Circuit Current
V
OUT = –14.5 V to +14.5 V
17
80
60
500
mA
mA
mA
pF
Sourcing to 0 V
Sinking to 0 V
G = +1
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current
Power Supply Rejection Ratio
+3
+36
8.4
V
mA
dB
T
MIN to TMAX, Total
7.0
80
VS = +5 V to +15 V, TMIN to TMAX 70
Specification subject to change without notice.
–4–
REV. 0
AD823
ABSOLUTE MAXIMUM RATINGS1
2.0
1.5
1.0
0.5
0
8-PIN MINI-DIP PACKAGE
T
= +150°C
J
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +36 V
Internal Power Dissipation2
Plastic Package (N) . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts
Small Outline Package (R) . . . . . . . . . . . . . . . . . . . 0.9 Watts
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±1.2 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range N, R . . . . . . . . .–65°C to +125°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
8-PIN SOIC PACKAGE
NOTES
1Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2Specification is for device in free air:
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE –
°C
Figure 3. Maximum Power Dissipation vs. Temperature
8-Pin Plastic Package: θJA = 90°C/Watt
8-Pin SOIC Package: θJA = 160°C/Watt
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
AD823AN
AD823AR
AD823AR-REEL
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Pin Plastic DIP
8-Pin Plastic SOIC
SOIC on Reel
N-8
SO-8
SO-8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD823 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–5–
AD823–Typical Characteristics
80
100
90
V
= +5V
S
V
= +5V
S
70
60
50
40
30
20
10
0
317 UNITS
= 0.4pA
314 UNITS
= 40µV
80
70
60
50
40
30
20
10
0
–200
–150
–100
–50
0
50
100
150
200
0
1
2
3
4
5
6
7
8
9
10
INPUT OFFSET VOLTAGE – µV
INPUT BIAS CURRENT – pA
Figure 4. Typical Distribution of Input Offset Voltage
Figure 7. Typical Distribution of Input Bias Current
22
10k
V
= +5V
S
20
18
16
14
12
V
V
= +5V
= 0V
S
–55°C TO +125°C
103 UNITS
CM
1k
100
10
8
10
1
6
4
2
0
0.1
–6 –5 –4 –3 –2 –1
0
1
2
3
4
5
6
7
0
25
50
75
100
125
INPUT OFFSET VOLTAGE DRIFT – µV/°C
TEMPERATURE – °C
Figure 5. Typical Distribution of Input Offset Voltage Drift
Figure 8. Input Bias Current vs. Temperature
3
1k
V
= +5V
V
= ±15V
S
S
2
1
100
10
1
0
–1
–2
–3
–4
0.1
–16
–5
–4
–3
–2
–1
0
1
2
3
4
5
–12
–8
–4
0
4
8
12
16
COMMON MODE VOLTAGE – Volts
COMMON MODE VOLTAGE – Volts
Figure6. InputBiasCurrentvs. Common-ModeVoltage
Figure 9. Input Bias Current vs. Common-Mode Voltage
–6–
REV. 0
AD823
95
94
110
100
90
V
R
= +5V
= 2kΩ
S
L
93
92
V
= ± 2.5V
S
91
90
89
88
80
70
87
86
60
100
–55
–25
5
35
65
95
125
1k
100k
500k
10k
LOAD RESISTANCE – Ω
TEMPERATURE – °C
Figure 10. Open-Loop Gain vs. Load Resistance
Figure 13. Open-Loop Gain vs. Temperature
100
1k
100
R
= 10kΩ
= 1kΩ
L
80
60
40
20
0
80
60
40
20
0
PHASE
100
10
1
R
R
L
GAIN
= 100Ω
L
R
C
= 2kΩ
= 20pF
L
L
0.1
–20
100M
–20
100
–2.5 –2.0 –1.5 –1.0 –0.5
0
0.5
1.0
1.5
2.0
2.5
1k
10k
100k
1M
10M
OUTPUT VOLTAGE – Volts
FREQUENCY – Hz
Figure 11. Open-Loop Gain vs. Output Voltage, VS = ±2.5 V
Figure 14. Open-Loop Gain and Phase vs. Frequency
100
–40
V
= +5V
S
R
= 600Ω
–50
–60
L
V
V
R
= +3V
S
30
10
3
= 2Vp-p
OUT
= 100Ω
ALL
OTHERS
–70
L
V
V
R
= ±15V
S
–80
= 10Vp-p,
OUT
= 600Ω
V
= +3V,
= 2Vp-p,
S
V
= ±2.5V
= 2Vp-p
S
L
V
R
OUT
= 5kΩ
V
R
–90
OUT
= 1kΩ
L
L
V
V
R
= +5V
S
–100
–110
= 2Vp-p
OUT
= 5kΩ
L
10
100
1k
10k
100k
1M
100
1k
10k
FREQUENCY – Hz
100k
1M
FREQUENCY – Hz
Figure 12. Total Harmonic Distortion vs. Frequency
Figure 15. Input Voltage Noise vs. Frequency
REV. 0
–7–
AD823–Typical Characteristics
90
80
70
60
50
40
30
20
5
V
= ±15V
S
G = +1
4
C
= 20pF
L
L
R
= 2kΩ
V
= +5V
S
3
2
1
0
–55°C
+27°C
–1
–2
–3
+125°C
–4
–5
0.3 3.27 6.24 9.21 12.18 15.15 18.12 21.09 24.06 27.03 30
FREQUENCY – MHz
10
100
1k
10k
100k
1M
10M
FREQUENCY – Hz
Figure 16. Closed Loop Gain vs. Frequency
Figure 19. Common-Mode Rejection vs. Frequency
100
10
V
= +5V
S
V
= +5V
S
GAIN = +1
10
1.0
1
V
– V
OH
S
+25°C
V
OL
+25°C
0.1
V
OL
+25°C
0.1
0.01
0.1
0.01
100
1k
10k
100k
1M
10M
1
10
100
LOAD CURRENT – mA
FREQUENCY – Hz
Figure 17. Output Resistance vs. Frequency, VS = 5 V,
Gain = +1
Figure 20. Output Saturation Voltage vs. Load Current
10
10
V
C
= ±15V
= 20pF
S
8
6
1%
L
0.1%
0.01%
+125°C
8
+25°C
4
6
2
–55°C
0
4
2
0
–2
–4
–6
–8
–10
0.1%
400
1%
0.01%
0
5
10
15
20
100
200
300
500
600
700
SUPPLY VOLTAGE – ±Volts
SETTLING TIME – ns
Figure 21. Quiescent Current vs. Supply Voltage
Figure 18. Inverter Settling Time vs. Output Step Size
–8–
REV. 0
AD823
100
90
80
70
60
50
40
30
20
10
0
21
18
15
R
V
S
IN
V
= +5V
S
C
L
+PSRR
V
= +5V
S
12
9
–PSRR
= 45°
M
6
= 20°
M
3
0
100
1k
10k
FREQUENCY – Hz
1M
10M
0
1
2
3
4
5
6
7
8
9
10
100k
CAPACITOR – pF ϫ 1000
Figure 22. Power Supply Rejection vs. Frequency
Figure 25. Capacitive Load vs. Series Resistance
30
–30
R
= 2kΩ
L
V
= +5V
–40
–50
S
G = +1
–60
20
10
0
–70
V
= ±15V
S
–80
–90
–100
–110
V
V
= +5V
= +3V
S
–120
–130
S
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 23. Large Signal Frequency Response
Figure 26. Crosstalk vs. Frequency
V
V
= +3V
S
R
C
V
= 100kΩ
= 50pF
= +3V
L
= 2.9Vp-p
IN
L
S
G = –1
3V
GND
500mV
10µs
100k
+3V
200µs
500mV
100k
V
= 2.9V p-p
IN
V
OUT
50Ω
50pF
Figure 24. Output Swing, VS = + 3 V, G = +1
100k
Figure 27. Output Swing, VS = +3 V, G = –1
REV. 0
–9–
AD823–Typical Characteristics
5V
R
L
C
L
R
F
= 300Ω
= 50pF
= R = 2kΩ
G
V
V
G = 1
= ±15V
S
= 20Vp-p
IN
500mV
200µs
20µs
5V
GND
+15V
–15V
Figure 28. Output Swing, VS = +5 V, G = –1
20kHz, 20Vp-p
50pF
604Ω
Figure 31. Output Swing, VS = ±15 V, G = +1
5V
R
L
C
L
= 2kΩ
= 50pF
V
V
= +3V
S
= 100mV STEP
IN
G =+1
1.55V
1.45V
100ns
500mV
25mV
50ns
GND
Figure 32. Pulse Response, VS = +5 V, G = +1
Figure 29. Pulse Response, VS = +3 V, G = +1
5V
V
= +5V
V
= +5V
S
S
G = +1
G =+2
R
L
C
L
= 2kΩ
= 470pF
R
L
C
L
= 2kΩ
= 50pF
50mV
200ns
500mV
100ns
GND
Figure 33. Pulse Response, VS = +5 V, G = +1, CL = 470 pF
Figure 30. Pulse Response, VS = +5 V , G = +2
–10–
REV. 0
AD823
R
L
C
L
= 100kΩ
= 50pF
10V
–10V
5V
500ns
Figure 34. Pulse Response, VS = ±15 V, G = +1
THEORY OF OPERATION
of 1 mV max and offset drift of 2 µV/°C are achieved through
the use of Analog Devices’ advanced thin-film trimming
techniques.
This AD823 is fabricated on Analog Devices’ proprietary
complementary bipolar (CB) process that enables the construc-
tion of pnp and npn transistors with similar fTs in the 600 MHz
to 800 MHz region. In addition, the process also features
N-channel JFETs, which are used in the input stage of the AD823.
These process features allow the construction of high frequency,
low distortion op amps with picoampere input currents. This
design uses a differential-output input stage to maximize band-
width and headroom (see Figure 35). The smaller signal swings
required on the S1P, S1N outputs reduce the effect of nonlinear
currents due to junction capacitances and improve the distortion
performance. With this design harmonic distortion of better
than –91 dB @ 20 kHz into 600 Ω with VOUT = 4 V p-p on a
single 5 volt supply is achieved. The complementary common-
emitter design of the output stage provides excellent load drive
without the need for emitter followers, thereby improving the
output range of the device considerably with respect to conven-
tional op amps. The AD823 can drive 20 mA with the outputs
within 0.6 V of the supply rails. The AD823 also offers out-
standing precision for a high speed op amp. Input offset voltages
A “Nested Integrator” topology is used in the AD823 (see small-
signal schematic shown in Figure 36). The output stage can be
modeled as an ideal op amp with a single-pole response and a
unity-gain frequency set by transconductance gm2 and capacitor
C2. R1 is the output resistance of the input stage; gm is the in-
put transconductance. C1 and C5 provide Miller compensation
for the overall op amp. The unity gain frequency will occur at
gm/C5. Solving the node equations for this circuit yields:
A0
VOUT
Vi
=
gm2
sR1[ C 1(A2 + 1)] + 1)
+ 1
(
× s
C2
where:
A0 = gmgm2R2R1 (Open Loop Gain of Op Amp)
A2 = gm2R2 (Open Loop Gain of Output Stage)
V
CC
Q44
A=1
Q43
Q58
Q55
Q49
I6
R42
R37
V
+ 0.3V
V1
I5
BE
Q57
A=19
Q61
Q72
Q18
C2
Q46
J1
J6
V
V
INP
R44
R28
V
Q54
OUT
Q21
INN
S1P
S1N
Q62
Q60
V
C1
CC
Q48
V
B
Q53
Q35
Q17
A=19
C6
I2
R33
R43
I1
Q59
A=1
I4
I3
Q56
Q52
V
EE
Figure 35. Simplified Schematic
–11–
REV. 0
AD823
The first pole in the denominator is the dominant pole of the
amplifier, and occurs at about 18 Hz. This equals the input
stage output impedance R1 multiplied by the Miller-multiplied
value of C1. The second pole occurs at the unity-gain band-
width of the output stage, which is 23 MHz. This type of archi-
tecture allows more open loop gain and output drive to be
obtained than a standard two-stage architecture would allow.
APPLICATION NOTES
INPUT CHARACTERISTICS
In the AD823, n-channel JFETs are used to provide a low
offset, low noise, high impedance input stage. Minimum input
common-mode voltage extends from 0.2 V below –VS to 1 V
less than +VS. Driving the input voltage closer to the positive
rail will cause a loss of amplifier bandwidth and increased
common-mode voltage error.
OUTPUT IMPEDANCE
The AD823 does not exhibit phase reversal for input voltages
up to and including +VS. Figure 37a shows the response of an
AD823 voltage follower to a 0 V to +5 V (+VS) square wave
input. The input and output are superimposed. The output
polarity tracks the input polarity up to +VS—no phase reversal.
The reduced bandwidth above a 4 V input causes the rounding
of the output wave form. For input voltages greater than +VS, a
resistor in series with the AD823’s plus input will prevent phase
reversal, at the expense of greater input voltage noise. This is il-
lustrated in Figure 37b.
The low frequency open loop output impedance of the
common-emitter output stage used in this design is approxi-
mately 30 kΩ. While this is significantly higher than a typical
emitter follower output stage, when connected with feedback
the output impedance is reduced by the open loop gain of the
op amp. With 109 dB of open loop gain the output impedance
is reduced to less than 0.2 Ω. At higher frequencies the output
impedance will rise as the open loop gain of the op amp drops;
however, the output also becomes capacitive due to the integra-
tor capacitors C1 and C2. This prevents the output impedance
from ever becoming excessively high (see Figure 17), which can
cause stability problems when driving capacitive loads. In fact,
the AD823 has excellent cap-load drive capability for a high fre-
quency op amp. Figure 33 shows the AD823 connected as a fol-
lower while driving 470 pF direct capacitive load. Under these
conditions the phase margin is approximately 20°. If greater
phase margin is desired a small resistor can be used in series
with the output to decouple the effect of the load capacitance
from the op amp (see Figure 25). In addition, running the part
at higher gains will also improve the capacitive load drive capa-
bility of the op amp.
1V
2µs
100
90
10
0%
GND
1V
a. Response with RP = 0; VIN from 0 to VS
C1
S1N
1V
1V
10µs
g
g
VI
VI
R1
R1
m
m
V
OUT
100
90
S1P
C5
+V
S
C2
R2
g
m2
10
0%
GND
Figure 36. Small Signal Schematic
1V
+5V
R
P
V
IN
AD823
V
OUT
b. VIN = 0 to +VS + 200 mV; VOUT = 0 to +VS; RP = 49.9 kΩ
Figure 37. AD823 Input Response
–12–
REV. 0
AD823
Since the input stage uses n-channel JFETs, input current dur-
ing normal operation is negative; the current flows out from the
input terminals. If the input voltage is driven more positive than
+VS – 0.4 V, the input current will reverse direction as internal
device junctions become forward biased. This is illustrated in
Figure 6.
Figure 38 shows a schematic of an AD823 being used to drive
both the input and reference input of an AD1672, a 12-bit
3 MSPS single supply A/D converter. One amplifier is config-
ured as a unity gain follower to drive the analog input of the
AD1672 which is configured to accept an input voltage that
ranges from 0 to 2.5 V.
A current limiting resistor should be used in series with the in-
put of the AD823 if there is a possibility of the input voltage ex-
ceeding the positive supply by more than 300 mV, or if an input
voltage will be applied to the AD823 when ±VS = 0. The ampli-
fier will be damaged if left in that condition for more than 10
seconds. A 1 kΩ resistor allows the amplifier to withstand up to
10 volts of continuous overvoltage, and increases the input volt-
age noise by a negligible amount.
+5VA
+5VD
+5VD
+5VA
8
0.1
µF
0.1
µF
10
µF
0.1µF
10µF
10µF
0.1µF
28 19
+V +V
CC DD
2
3
20
21
22
REFOUT
AIN1
AIN2
1
15
49.9Ω
OTR
V
IN
13
14
12
11
10
9
BIT1 (MSB)
AD823
AD1672
Input voltages less than –VS are a completely different story.
The amplifier can safely withstand input voltages 20 volts below
the minus supply voltage as long as the total voltage from the
positive supply to the input terminal is less than 36 volts. In
addition, the input stage typically maintains picoamp level input
currents across that input voltage range.
BIT2
BIT3
BIT4
BIT5
BIT6
5
6
V
REF
(1.25V)
7
23
24
25
26
REFIN
8
IN COM
NCOMP2
NCOMP1
4
7
6
5
4
3
2
1
BIT7
BIT8
BIT9
BIT10
BIT11
1k
1k
The AD823 is designed for 16 nV/√Hz wideband input voltage
noise and maintains low noise performance to low frequencies
(refer to Figure 15). This noise performance, along with the
AD823’s low input current and current noise means that the
AD823 contributes negligible noise for applications with source
resistances greater than 10 kΩ and signal bandwidths greater
than 1 kHz.
27
16
ACOM
BIT12 (LSB)
REF
D
CLOCK
COM COM
19
18
Figure 38. AD823 Driving Input and Reference of the
AD1672, a 12-Bit 3 MSPS A/D Converter
OUTPUT CHARACTERISTICS
The AD823’s unique bipolar rail-to-rail output stage swings
within 25 mV of the supplies with no external resistive load. The
AD823’s approximate output saturation resistance is 25 Ω
sourcing and sinking. This can be used to estimate output satu-
ration voltage when driving heavier current loads. For instance,
when driving 5 mA, the saturation voltage to the rails will be ap-
proximately 125 mV.
The other amplifier is configured as a gain of two to drive the
reference input from a 1.25 V reference. Although the AD1672
has its own internal reference, there are systems that require
greater accuracy than the internal reference provides. On the
other hand, if the AD1672 internal reference is used, the second
AD823 amplifier can be used to buffer the reference voltage for
driving other circuitry while minimally loading the reference
source.
If the AD823’s output is driven hard against the output satura-
tion voltage, it will recover within 250 ns of the input returning
to the amplifier’s linear operating region.
The circuit was tested with a 500 kHz sine wave input that was
heavily low pass filtered (60 dB) to minimize the harmonic con-
tent at the input to the AD823. The digital output of the
AD1672 was analyzed by performing an FFT.
A/D Driver
The rail-to-rail output of the AD823 makes it useful as an A/D
driver in a single supply system. Because it is a dual op amp, it
can be used to drive both the analog input of the A/D along with
its reference input. The high impedance FET input of the
AD823 is well suited for minimally loading of high output im-
pedance devices.
During the testing, it was observed that at 500 kHz, the output
of the AD823 cannot go below about 350 mV (operating with
negative supply at ground) without seriously degrading the sec-
ond harmonic distortion. Another test was performed with a
200 Ω pull-down resistor to ground that allowed the output to
go as low as 200 mV without seriously affecting the second har-
monic distortion. There was, however, a slight increase in the
third harmonic term with the resistor added, but it was still less
than the second harmonic.
REV. 0
–13–
AD823
+3V
Figure 39 is an FFT plot of the results of driving the AD1672
with the AD823 with no pull-down resistor. The input ampli-
tude was 2.15 V p-p and the lower voltage excursion was
350 mV. The input frequency was 490 kHz, which was chosen
to spread the location of the harmonics.
0.1µF
0.1µF
95.3kΩ
95.3k
8
3
2
CHANNEL 1
+
1/2
AD823
1µF
MYLAR
1
47.5k
500µF
The distortion analysis is important for systems requiring good
frequency domain performance. Other systems may require
good time domain performance. The noise and settling time
performance of the AD823 will provide the necessary informa-
tion for its applicability for these systems.
L
95.3k
4.99k
10k
10k
HEADPHONES
32Ω IMPEDANCE
R
4.99k
1
6
500µF
+
V
= 2.15Vp-p
IN
1/2
AD823
4
47.5k
1µF
7
G = +1
F = 490kHz
I
CHANNEL 2
5
MYLAR
2
Figure 40. 3 Volt Single Supply Stereo Headphone Driver
4
9
7
6
5
Second Order Low-Pass Filter
8
3
Figure 41 depicts the AD823 configured as a second order
Butterworth low-pass filter. With the values as shown, the cor-
ner frequency will be 200 kHz. The equations for component
selection are shown below:
R1 = R2 = user selected (typical values: 10 kΩ to 100 kΩ).
Figure 39. FFT of AD1672 Output Driven by AD823
1.414
0.707
C1( farads) =
; C2 =
2 πfcutoff R1
2 πfcutoff R1
3 Volt, Single Supply Stereo Headphone Driver
The AD823 exhibits good current drive and THD+N perfor-
mance, even at 3 V single supplies. At 20 kHz, total harmonic
distortion plus noise (THD+N) equals –62 dB (0.079%) for a
300 mV p-p output signal. This is comparable to other single
supply op amps which consume more power and cannot run on
3 V power supplies.
+5V
C2
56pF
C3
0.1µF
R1
20k
R2
20k
V
IN
1/2
AD823
C1
28pF
V
OUT
In Figure 40, each channel’s input signal is coupled via a 1 µF
Mylar capacitor. Resistor dividers set the dc voltage at the non-
inverting inputs so that the output voltage is midway between
the power supplies (+1.5 V). The gain is 1.5. Each half of the
AD823 can then be used to drive a headphone channel. A 5 Hz
high-pass filter is realized by the 500 µF capacitors and the
headphones, which can be modeled as 32 ohm load resistors to
ground. This ensures that all signals in the audio frequency
range (20 Hz–20 kHz) are delivered to the headphones.
50pF
C4
0.1µF
–5V
Figure 41. Second Order Low-Pass Filter
A plot of the filter is shown below; better than 50 dB of high fre-
quency rejection is provided.
–14–
REV. 0
AD823
0
put at node C is then a full-wave rectified version of the input.
Node B is a buffered half-wave rectified version of the input.
Input voltage supply to ±18 volts can be rectified, depending on
the voltage supply used.
–10
V
– V
OUT
DB
–20
–30
–40
R1
100kΩ
R2
100kΩ
+VS
8
0.01µF
6
5
A
7
3
2
C
A2
1
–50
–60
VIN
FULL-WAVE
RECTIFIED OUTPUT
A1
4
1/2
AD823
1/2
AD823
1k
10k
100k
FREQUENCY – Hz
10M
100M
1M
B
HALF-WAVE
RECTIFIED OUTPUT
Figure 42. Frequency Response of Filter
Single-Supply Half-Wave and Full-Wave Rectifiers
An AD823 configured as a unity gain follower and operated
with a single supply can be used as a simple half-wave rectifier.
The AD823’s inputs maintain picoamp level input currents even
when driven well below the minus supply. The rectifier puts that
behavior to good use, maintaining an input impedance of over
1011 Ω for input voltages from 1 volt from the positive supply to
20 volts below the negative supply.
2V
2V
200µs
100
90
A
B
C
10
The full- and half-wave rectifier shown in Figure 43 operates as
follows: when VIN is above ground, R1 is bootstrapped through
the unity gain follower A1 and the loop of amplifier A2. This
forces the inputs of A2 to be equal, thus no current flows
through R1 or R2, and the circuit output tracks the input. When
0%
2V
Figure 43. Single Supply Half- and Full-Wave Rectifier
V
IN is below ground, the output of A1 is forced to ground. The
noninverting input of amplifier A2 sees the ground level output
of A1, therefore, A2 operates as a unity gain inverter. The out-
REV. 0
–15–
AD823
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP
(N-8)
8
5
0.25
(6.35)
0.31
(7.87)
PIN 1
1
4
0.30 (7.62)
REF
0.39 (9.91) MAX
0.035±0.01
(0.89±0.25)
0.165±0.01
(4.19±0.25)
0.011±0.003
(0.28±0.08)
0.18±0.03
(4.57±0.76)
0.125
(3.18)
MIN
15
°
0°
0.10
(2.54)
0.018±0.003
(0.46±0.08)
0.033
(0.84)
NOM
SEATING
PLANE
BSC
8-Lead Plastic SOIC
(SO-8)
8
5
0.1574 (4.00)
0.1497 (3.80)
PIN 1
1
0.2440 (6.20)
0.2284 (5.80)
4
0.1968 (5.00)
0.1890 (4.80)
0.0196 (0.50)
0.0099 (0.25)
x 45°
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
–16–
REV. 0
相关型号：
AD823ARZ-REEL7
IC DUAL OP-AMP, 3500 uV OFFSET-MAX, PDSO8, ROHS COMPLIANT, MS-012AA, SOIC-8, Operational Amplifier
ADI
©2020 ICPDF网 联系我们和版权申明