AD8336 [ADI]
General-Purpose, −55 to +125, Wide Bandwidth, DC-Coupled VGA; 通用， -55 〜+ 125 ，宽带宽，直流耦合VGA
| 型号： | AD8336 |
| 厂家： | 
ADI |
| 描述： | General-Purpose, −55 to +125, Wide Bandwidth, DC-Coupled VGA |
| 文件： | 总28页 (文件大小：1237K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
General-Purpose, −55°C to +125°C,
Wide Bandwidth, DC-Coupled VGA
AD8336
FEATURES
FUNCTIONAL BLOCK DIAGRAM
PRAO VGAI
Low noise
8
9
Voltage noise: 3 nV/√Hz
Current noise: 3 pA/√Hz
Small signal BW: 115 MHz
Large signal BW: 2 V p-p = 80 MHz
Slew rate: 550 V/µs, 2 V p-p
Gain ranges (specified)
−14 dB to +46 dB,
AD8336
4
5
INPP
INPN
+
PrA
–
ATTENUATOR
–60dB TO 0dB
34dB
1
VOUT
GAIN CONTROL
INTERFACE
PWRA
2
BIAS
0 dB to 60 dB
Gain scaling: 50 dB/V
DC-coupled
10
13
VPOS
3
11
12
VNEG
VCOM
GPOS
GNEG
Single-ended input and output
Supplies: 3 V to 12 V
Temperature Range: −55°C to +125°C
Power
Figure 1.
150 mW @ 3 V, −55°C < T < +125°C
84 mW @ 3 V, PWRA = 3 V
APPLICATIONS
Industrial process controls
High performance AGC systems
I/Q signal processing
Video
Industrial and medical ultrasound
Radar receivers
GENERAL DESCRIPTION
The AD8336 is a low noise, single-ended, linear-in-dB, general-
purpose variable gain amplifier, usable over a large range of
supply voltages. It features an uncommitted preamplifier
(preamp) with a usable gain range of 6 dB to 26 dB established
by external resistors in the classical manner. The VGA gain
range is 0 dB to 60 dB, and its absolute gain limits are −26 dB to
+34 dB. When the preamplifier gain is adjusted for 12 dB, the
combined 3 dB bandwidth of the preamp and VGA is 100 MHz,
and the amplifier is fully usable to 80 MHz. With 5 V supplies,
the maximum output swing is 2 V p-p.
The large supply voltage range makes the AD8336 particularly
suited for industrial medical applications and for video circuits.
Dual-supply operation enables bipolar input signals, such as
those generated by photodiodes or photomultiplier tubes.
The fully independent voltage feedback preamp allows both
inverting and noninverting gain topologies, making it a fully
bipolar VGA. The AD8336 can be used within the specified
gain range of −14 dB to +60 dB by selecting a preamp gain
between 6 dB and 26 dB and choosing appropriate feedback
resistors. For the nominal preamp gain of 4×, the overall gain
range is −14 dB to +46 dB.
Thanks to its X-Amp® architecture, excellent bandwidth
uniformity is maintained across the entire gain range of the
VGA. Intended for a broad spectrum of applications, the
differential gain control interface provides precise linear-in-dB
gain scaling of 50 dB/V over the temperature span of −55°C to
+125 °C. The differential gain control is easy to interface with a
variety of external circuits within the common-mode voltage
limits of the AD8336.
In critical applications, the quiescent power can be reduced by
about half by using the power adjust pin, PWRA. This is
especially useful when operating with high supply voltages of
up to 12 V, or at high temperatures.
The operating temperature range is −55°C to +125°C. The
AD8336 is available in a 16-lead LFCSP (4 mm × 4 mm).
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
AD8336
TABLE OF CONTENTS
Features .............................................................................................. 1
Setting the Gain.......................................................................... 22
Noise ............................................................................................ 22
Offset Voltage.............................................................................. 22
Applications..................................................................................... 23
Amplifier Configuration ........................................................... 23
Preamplifier................................................................................. 23
Circuit Configuration for Noninverting Gain ................... 23
Circuit Configuration for Inverting Gain........................... 24
Using the Power Adjust Feature ............................................... 24
Driving Capacitive Loads.......................................................... 24
Evaluation Board ............................................................................ 25
Optional Circuitry...................................................................... 25
Board Layout Considerations................................................... 25
Outline Dimensions....................................................................... 28
Ordering Guide .......................................................................... 28
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Functional Descriptions.......................... 7
Typical Performance Characteristics ............................................. 8
Test Circuits ..................................................................................... 17
Theory of Operation ...................................................................... 21
Overview...................................................................................... 21
Preamplifier................................................................................. 21
VGA.............................................................................................. 21
REVISION HISTORY
10/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 28
AD8336
SPECIFICATIONS
VS = 5 V, T = 25°C, gain range = −14 dB to +46 dB, preamp gain = 4×, f = 1 MHz, CL = 5 pF, RL = 500 Ω, PWRA = GND, unless
otherwise specified.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
PREAMPLIFIER
−3 dB Small Signal Bandwidth
−3 dB Large Signal Bandwidth
Bias Current, Either Input
Differential Offset Voltage
Input Resistance
VOUT = 10 mV p-p
VOUT = 2 V p-p
150
85
725
±±00
900
3
MHz
MHz
nA
μV
kΩ
Input Capacitance
pF
PREAMPLIFIER + VGA
–3 dB Small Signal Bandwidth
VOUT = 10 mV p-p
115
40
20
MHz
MHz
MHz
MHz
VOUT = 10 mV p-p, PWRA = 5 V
VOUT = 10 mV p-p, PrA gain = 20×
VOUT = 10 mV p-p, PrA gain = –3×
125
–3 dB Large Signal Bandwidth
Slew Rate
VOUT = 2 V p-p
80
30
20
100
550
3.0
MHz
MHz
MHz
MHz
V/µs
VOUT = 2 V p-p, PWRA = 5 V
VOUT = 2 V p-p, PrA gain = 20×
VOUT = 2 V p-p, PrA gain = –3×
VOUT = 2 V p-p
Short-Circuit Preamp Input Voltage
Noise Spectral Density
±3 V ≤ VS ≤ ±12 V
nV/√Hz
Input Current Noise Spectral Density
Output Referred Noise
3.0
pA/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
VGAIN = 0.7 V, PrA gain = 4×
±00
190
2500
200
700
250
VGAIN = –0.7 V, PrA gain = 4×
VGAIN = 0.7 V, PrA gain = 20×
VGAIN = –0.7 V, PrA gain = 20×
VGAIN = 0.7 V, –55°C ≤ T ≤ +125°C
VGAIN = –0.7 V, –55°C ≤ T ≤ +125°C
DYNAMIC PERFORMANCE
Harmonic Distortion
VGAIN = 0 V, VOUT = 1 V p-p
HD2
HD3
HD2
HD3
f = 1 MHz
f = 1 MHz
f = 10 MHz
f = 10 MHz
VGAIN = –0.7 V
VGAIN = +0.7 V
VGAIN = 0 V, VOUT = 1 V p-p, f1 = 0.95 MHz, f2 = 1.05 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f1 = 9.95 MHz, f2 = 10.05 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f1 = 0.95 MHz, f2 = 1.05 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f1 = 9.95 MHz, f2 = 10.05 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f = 1 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f = 10 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f = 1 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f = 10 MHz
VGAIN = 0.7 V, VIN = 100 mV p-p to 5 mV p-p
1 MHz < f < 10 MHz, full gain range
1 MHz < f < 10 MHz, full gain range
–58
–±8
–±0
–±0
11
–23
–71
–±9
–±0
–58
34
32
34
33
50
±1
±3
dBc
dBc
dBc
dBc
dBm1
dBm
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
ns
Input 1 dB Compression Point
Two-Tone Intermodulation
Distortion (IMD3)
Output Third-Order Intercept
Overdrive Recovery
Group Delay Variation
PrA Gain = 20 ×
ns
ns
Rev. 0 | Page 3 of 28
AD8336
Parameter
ABSOLUTE GAIN ERROR2
Conditions
Min
0
0
−1.25 ±0.2
±0.5
Typ
Max
±
3
+1.25
1.25
Unit
dB
dB
dB
dB
dB
dB
dB
dB
−0.7 V < VGAIN < −0.± V
−0.± V < VGAIN < −0.5 V
−0.5 V < VGAIN < 0.5 V
−0.5 V < VGAIN < 0.5 V, ±3 V ≤ VS ≤ ±12 V
−0.5 V < VGAIN < 0.5 V, −55 °C ≤ T ≤ +125 °C
−0.5 V < VGAIN < 0.5 V, PrA gain = −3×
0.5 V < VGAIN < 0.± V
1 to 5
0.5 to1.5
±0.5
±0.5
−1.5 to −3.0
−1 to −5
−4.0
−9.0
0
0
0.± V < VGAIN < 0.7 V
GAIN CONTROL INTERFACE
Gain Scaling Factor
Intercept
48
49.9
1±.4
4.5
52
dB/V
dB
dB
dB
V
μA
pF
ns
Preamp + VGA
VGA Only
Gain Range
Input Voltage (VGAIN) Range
Input Current
Input Capacitance
Response Time
58
−VS
±0
±2
+VS
No foldover
1
±0 dB gain change
300
OUTPUT PERFORMANCE
Output Impedance, DC to 10 MHz
Output Signal Swing
±3 V ≤ VS ≤ ±12 V
2.5
Ω
V
V
mA
mA
mA
mA
mV
mV
mV
RL ≥ 500 Ω (for |VSUPPLY| ≤ ±5V); RL ≥ 1 kΩ above that
RL ≥ 1 kΩ (for |VSUPPLY| = ±12V)
Linear operation − minimum discernable distortion
VS = ±3 V
VS = ±5 V
VS = ±12 V
VGAIN = 0.7 V, gain = 200×
±3 V ≤ VS ≤ ±12 V
−55°C ≤ T ≤ +125°C
|VSUPPLY| − 1.5
|VSUPPLY| − 2.25
20
+123/−72
+123/−72
+72/−73
−125
Output Current
Short-Circuit Current
Output Offset Voltage
−250
150
−200
−200
PWRA Pin
Normal Power (Logic Low)
Low Power (Logic High)
Normal Power (Logic Low)
Low Power (Logic High)
Normal Power (Logic Low)
Low Power (Logic High)
POWER SUPPLY
Supply Voltage Operating Range
Quiescent Current
VS = ±3 V
VS = ±3 V
VS = ±3 V
VS = ±5 V
VS = ±5 V
VS = ±12 V
VS = ±12 V
0.7
1.2
3.2
V
V
V
V
V
V
1.5
2.0
4.0
±3
22
±12
30
V
25
−55°C ≤ T ≤ +125°C
PWRA = 3 V
23 to 31
14
2±
23 to 31
14
28
mA
mA
mA
10
22
18
30
VS = ±5 V
−55°C ≤ T ≤ +125°C
PWRA = 5 V
10
23
18
31
VS = ±12 V
−55°C ≤ T ≤ +125°C
PWRA = 5 V
24 to 33
1±
Rev. 0 | Page 4 of 28
AD8336
Parameter
Conditions
VS = ±3 V
VS = ±5 V
VS = ±12 V
VGAIN = 0.7 V, f = 1 MHz
Min
Typ
150
2±0
±72
−40
Max
Unit
mW
mW
mW
dB
Power Dissipation
PSRR
1 All dBm values are calculated with 50 Ω reference, unless otherwise noted.
2 Conformance to theoretical gain expression (see the Setting the Gain section).
Rev. 0 | Page 5 of 28
AD8336
ABSOLUTE MAXIMUM RATINGS
Table 2.
Stresses above those listed under the Absolute Maximum
Ratings may cause permanent damage to the device. This is a
stress rating only; functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
Supply Voltage (VPOS, VNEG)
Input Voltage (INPP, INPN)
Gain Voltage (GPOS, GNEG)
PWRA
Power Dissipation
VS ≤ ±5 V
15 V
VPOS, VNEG
VPOS, VNEG
5 V, GND
0.43 W
1.12 W
±5 V < VS ≤ ±12 V
Operating Temperature Range
±3 V < VS ≤ ±10 V
±10 V < VS ≤ ±12 V
Storage Temperature Range
Lead Temperature (Soldering ±0 sec)
ESD CAUTION
–55°C to +125°C
–55°C to +85°C
–±5°C to +150°C
300°C
Thermal Data (4-layer JEDEC board, no air
flow, exposed pad soldered to PC board)
θJA
θJB
θJC
ΨJT
ΨJB
58.2°C/W
35.9°C/W
9.2°C/W
1.1°C/W
34.5°C/W
Rev. 0 | Page ± of 28
AD8336
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
16 15 14 13
VOUT
PWRA
VCOM
INPP
1
2
3
4
12 GNEG
11 GPOS
10 VNEG
PIN 1
INDICATOR
AD8336
TOP VIEW
(Not to Scale)
9
VGAI
5
6
7
8
NC = NO CONNECT
Figure 2. 16-Lead LFCSP Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Function
1
2
3
4
5
±
VOUT
PWRA
VCOM
INPP
INPN
NC
Output Voltage.
Power Control. Normal power when grounded; power reduced by half if VPWRA is pulled high.
Common-Mode Voltage. Normally GND when using a dual supply.
Positive Input to Preamp.
Negative Input to Preamp.
No Connect.
7
NC
No Connect.
8
9
PRAO
VGAI
VNEG
GPOS
GNEG
VPOS
NC
Preamp Output.
VGA Input.
Negative Supply.
Positive Gain Control Input.
Negative Gain Control Input.
Positive Supply.
No Connect.
No Connect.
No Connect.
10
11
12
13
14
15
1±
NC
NC
Rev. 0 | Page 7 of 28
AD8336
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, T = 25°C, gain range = −14 dB to +46 dB, PrA gain = +4×, f = 1 MHz, CL = 5 pF, RL = 500 Ω, PWRA = GND, unless otherwise
specified.
50
40
2.0
T = +125°C
T = +25°C
T = –55°C
T = +125°C
T = +25°C
T = –55°C
1.5
1.0
30
0.5
20
0
10
–0.5
–1.0
–1.5
–2.0
0
–10
–20
–800
–600
–400
–200
0
200
400
600
800
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
V
(mV)
GAIN
GAIN
Figure 3. Gain vs. VGAIN for Three Values of Temperature (T)
Figure 6. Gain Error vs. VGAIN for Three Values of Temperature (T)
50
40
2.0
V
V
V
= ±12V
= ±5V
= ±3V
V
V
V
= ±12V
= ±5V
= ±3V
S
S
S
S
S
S
1.5
1.0
30
0.5
20
0
10
–0.5
–1.0
–1.5
–2.0
0
–10
–20
–800
–600
–400
–200
0
200
400
600
800
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
V
(mV)
GAIN
GAIN
Figure 4. Gain vs. VGAIN for Three Values of Supply Voltage (VS)
Figure 7. Gain Error vs. VGAIN for Three Values of Supply Voltage (VS)
70
2.0
PREAMP GAIN = 20×
PREAMP GAIN = 4×
60
50
1.5
1.0
0.5
40
30
PREAMP GAIN = 20×
PREAMP GAIN = 4×
0
20
–0.5
–1.0
–1.5
–2.0
10
0
–10
–20
–800
–600
–400
–200
0
200
400
600
800
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
V
(mV)
GAIN
GAIN
Figure 5 Gain vs. VGAIN for Preamp Gains of 4× and 20×
Figure 8. Gain Error vs. VGAIN for Preamp Gains of 4× and 20×
Rev. 0 | Page 8 of 28
AD8336
2.0
1.5
50
40
30
20
10
0
60 UNITS
PREAMP GAIN = 4×, f = 1MHz
PREAMP GAIN = 4×, f = 10MHz
PREAMP GAIN = 20×, f = 1MHz
PREAMP GAIN = 20×, f = 10MHz
V
= –0.3V
= +0.3V
GAIN
V
GAIN
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–800 –600
–400
–200
0
200
400
600
800
V
(mV)
GAIN
GAIN ERROR (dB)
Figure 9. Gain Error vs. VGAIN at 1 MHz and 10 MHz and
for Preamp Gains of 4× and 20×
Figure 12. Gain Error Histogram
50
40
30
20
10
0
2.0
1.5
60 UNITS
PREAMP GAIN = –3×, f = 1MHz
PREAMP GAIN = –3×, f = 10MHz
PREAMP GAIN = –19×, f = 1MHz
–0.3V ≤ V
≤ 0.3V
GAIN
PREAMP GAIN = –19×, f = 10MHz
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–800
–600
–400
–200
0
200
400
600
800
49.6
49.7
49.8
49.9
50.0
50.1
50.2
V
(mV)
GAIN
GAIN SCALING (dB/V)
Figure 13. Gain Scaling Factor Histogram
Figure 10. Gain Error vs. VGAIN at 1 MHz and 10 MHz and
for Inverting Preamp Gains of −3× and −19×
20
0
50
45
40
–20
V
V
V
= ±12V
= ±5V
= ±3V
S
S
S
–40
–60
35
0
–80
–100
–120
–140
–160
–180
–200
–220
–5
–10
–15
T = +125°C
T = +85°C
T = +25°C
T = –40°C
T = –55°C
–15
–10
–5
0
5
10
15
COMMON-MODE VOLTAGE OF V
GAIN
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
V
(V)
GAIN
Figure 14. Output Offset Voltage vs. VGAIN for
Various Values of Temperature (T)
Figure 11. Common-Mode Voltage at Pin VGAIN vs. VGAIN
Rev. 0 | Page 9 of 28
AD8336
20
0
50
40
VGAIN = +0.7V
+0.5V
–20
–40
–60
–80
–100
–120
–140
–160
30
+0.2V
0V
20
10
–0.2V
0
–0.5V
–0.7V
–10
–20
–30
V
V
V
= ±12V
= ±5V
= ±3V
S
S
S
–180
–200
100k
1M
10M
FREQUENCY (Hz)
100M 200M
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
V
(V)
GAIN
Figure 15. Output Offset Voltage vs. VGAIN for
Three Values of Supply Voltage (VS)
Figure 18. Frequency Response for Various Values of VGAIN
30
20
10
0
50
40
VGAIN = +0.7V
+0.5V
SAMPLE SIZE = 60 UNITS
= 0.7V
V
GAIN
30
+0.2V
20
0V
–240 –200 –160 –120
–80
–40
0
40
80
OUTPUT OFFSET (mV)
10
–0.2V
30
20
10
0
0
V
= 0V
GAIN
–0.5V
–0.7V
–10
–20
–30
LOW POWER MODE
–24
–20
–16
–12
–8
–4
0
4
8
100k
1M
10M
100M 200M
FREQUENCY (Hz)
OUTPUT OFFSET (mV)
Figure 16. Output Offset Histogram
Figure 19. Frequency Response for Various Values of VGAIN, Low Power Mode
70
50
60 UNITS
V
GAIN
= +0.7V
60
50
40
30
20
10
0
+0.5V
40
30
20
10
0
+0.2V
0V
–0.2V
–0.5V
–0.7V
PREAMP GAIN = 20×
–10
100k
1M
10M
100M 200M
16.25
16.30
16.35
16.40
16.45
16.50
16.55
FREQUENCY (Hz)
INTERCEPT (dB)
Figure 17. Intercept Histogram
Figure 20. Frequency Response for Various Values of VGAIN
when the Preamp Gain is 20×
Rev. 0 | Page 10 of 28
AD8336
50
40
30
25
20
15
10
5
VGAIN = +0.7V
+0.5V
GAIN = 20×
GAIN = 4×
30
20
+0.2V
0V
10
–0.2V
0
–0.5V
–0.7V
0
–10
–20
–30
–5
–10
V
V
V
= ±12V
= ±5V
= ±3V
S
S
S
PREAMP GAIN = –3×
100k
1M
10M
100M
500M
100k
1M
10M
100M 200M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Frequency Response for Various Values of VGAIN
for Preamp Gain of −3×
Figure 24. Preamp Frequency Response for Three Values of Supply Voltage (VS)
and Inverting Gain Values of −3× and −19×
20
25
20
15
10
5
PREAMP GAIN = 20×
PREAMP GAIN = 4×
V
= 0V
GAIN
15
10
5
0
C
C
C
C
= 47pF
= 22pF
= 10pF
= 0pF
LOAD
LOAD
LOAD
LOAD
–5
–10
0
1M
10M
100M
100k
1M
10M
100M 200M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 25. Group Delay vs. Frequency for Preamp Gains of 4× and 20×
Figure 22. Frequency Response for Various Values of Load Capacitance (CLOAD
)
1k
30
GAIN = 20×
25
20
100
10
15
GAIN = 4×
10
5
1
0
0.1
V
V
V
= ±12V
= ±5V
= ±3V
S
S
S
–5
0.01
100k
–10
100k
1M
10M
100M
500M
1M
10M
100M
500M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. Preamp Frequency Response for Three Values of Supply Voltage (VS)
and for Preamp Gains of 4× and 20×
Figure 26. Output Resistance vs. Frequency of the Preamplifier
Rev. 0 | Page 11 of 28
AD8336
1k
100
10
1k
100
10
f = 5MHz
PREAMP GAIN = 4×
1
0.1
V
V
V
= ±12V
= ±5V
= ±3V
S
S
S
PREAMP GAIN = 20×
1
–800
0.01
100k
–600
–400
–200
0
200
400
600
800
1M
10M
100M
500M
V
(mV)
GAIN
FREQUENCY (Hz)
Figure 27. Output Resistance vs. Frequency of the VGA
for Three Values of Supply Voltage (VS)
Figure 30. Input Referred Noise vs. VGAIN for Preamp Gains of 4× and 20×
1000
900
800
700
6
f = 5MHz
V
= 0.7V
GAIN
5
4
3
2
1
600
500
400
300
200
100
0
T = +125°C
T = +85°C
T = +25°C
T = –40°C
T = –55°C
V
V
V
= ±12V
= ±5V
= ±3V
S
S
S
0
100k
–800
–600
–400
–200
0
200
400
600
800
1M
10M
FREQUENCY (Hz)
100M
V
(mV)
GAIN
Figure 31. Short-Circuit Input Referred Noise vs. Frequency at Maximum Gain
for Three Values of Power Supply Voltage (VS)n
Figure 28. Output Referred Noise vs. VGAIN at Various Temperatures (T)
6
3000
V
= 0.7V
GAIN
PREAMP GAIN = –3×
f = 5MHz
PREAMP GAIN = 20×
2700
5
2400
2100
4
3
2
1
1800
1500
1200
900
T = +125°C
T = +85°C
T = +25°C
T = –40°C
T = –55°C
600
300
0
0
100k
1M
10M
FREQUENCY (Hz)
100M
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
GAIN
Figure 32. Short-Circuit Input Referred Noise vs. Frequency
at Maximum Inverting Gain
Figure 29. Output Referred Noise vs. VGAIN at Various Temperatures (T)
when the Preamp Gain is 20×
Rev. 0 | Page 12 of 28
AD8336
–40
–45
–50
–55
–60
–65
–70
100
10
1
V
V
= 2V p-p
= 0V
V
= 0.7V
OUT
GAIN
GAIN
f = 5MHz
HD2
HD3
INPUT REFERRED NOISE
R
THERMAL NOISE ALONE
S
0.1
10
100
1k
10k
0
5
10
15
20
25
30
35
40
45
50
SOURCE RESISTANCE (Ω)
LOAD CAPACITANCE (pF)
Figure 36. Harmonic Distortion vs. Load Capacitance
Figure 33. Input Referred Noise vs. Source Resistance
–20
–30
–40
–50
–60
–70
–80
70
60
50
40
30
20
10
0
OUTPUT SWING OF PREAMP
V
= 1V p-p
OUT
f = 10MHz
LIMITS V
TO 400mV
GAIN
SIMULATED
DATA
50Ω SOURCE
HD2 @ 1MHz
HD2 @ 10MHz
HD3 @ 1MHz
HD3 @ 10MHz
UNTERMINATED
–800
–600
–400
–200
0
200
400
600
800
–600
–400
–200
0
200
400
600
800
V
(mV)
V
(mV)
GAIN
GAIN
Figure 34. Noise Figure vs. VGAIN
Figure 37. 2nd and 3rd Harmonic Distortion vs. VGAIN at 1 MHz and 10 MHz
–40
–20
V
V
= 2V p-p
= 0V
HD2
f = 5MHz
OUTPUT SWING OF PREAMP LIMITS
LEVELS
OUT
V
GAIN
GAIN
f = 5MHz
–45
–50
–55
–60
–65
–30
–40
–50
HD2
HD3
–60
–70
–80
V
= 0.5V p-p
= 1V p-p
= 2V p-p
= 4V p-p
OUT
V
V
V
OUT
OUT
OUT
–70
0
200 400 600 800 1.0k 1.2k 1.4k 1.6k 1.8k 2.0k 2.2k
–600
–400
–200
0
200
(mV)
400
600
800
LOAD RESISTANCE (Ω)
V
GAIN
Figure 35. Harmonic Distortion vs. Load Resistance
Figure 38. 2nd Harmonic Distortion vs. VGAIN
for Four Values of Output Voltage (VOUT
)
Rev. 0 | Page 13 of 28
AD8336
–20
40
35
30
25
20
15
10
5
HD3
OUTPUT SWING OF PREAMP LIMITS
MINIMUM USABLE V LEVELS
1MHz 500mV
1MHz 1V
10MHz 500mV
10MHz 1V
f = 5MHz
GAIN
–30
–40
–50
–60
–70
–80
V
V
V
V
= 0.5V p-p
= 1V p-p
= 2V p-p
= 4V p-p
OUT
OUT
OUT
OUT
V
V
= 1V p-p
OUT
= 0V
GAIN
COMPOSITE INPUTS SEPARATED BY 100kHz
0
–600
–400
–200
0
200
400
600
800
–800
–600 –400 –200 200 400
0
600
800
V
(mV)
V
(mV)
GAIN
GAIN
Figure 39. 3rd Harmonic Distortion vs. VGAIN
for Four Values of Output Voltage (VOUT
Figure 42. Output Referred IP3 (OIP3) vs. VGAIN
at Two Frequencies and Two Input Levels
)
30
20
–20
–30
–40
–50
–60
–70
V
V
= 2V p-p
GAIN
OUT
INPUT LEVEL LIMITED
BY GAIN OF PREAMP
= 0V
V
V
= ±12V
= ±5V
S
S
10
V
= ±3V
S
HD2
0
–10
–20
–30
HD3
–800
–600
–400
–200
0
200
400
600
800
1M
10M
50M
V
(mV)
FREQUENCY (Hz)
GAIN
Figure 40. Harmonic Distortion vs. Frequency
Figure 43. Input P1dB (IP1dB) vs. VGAIN at Three Power Supply Values (VS)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
3
2
1
0
V
= 1V p-p
= 0V
OUT
V
GAIN
TONES SEPARATED BY 100kHz
V
V
(V)
(V)
IN
OUT
–1
–2
–3
–100
1M
10M
FREQUENCY (Hz)
100M
0
100
TIME (ns)
200
300
Figure 41. IMD3 vs. Frequency
Figure 44. Large Signal Pulse Response of the Preamp
Rev. 0 | Page 14 of 28
AD8336
0.6
0.4
25
20
15
10
2.5
2.0
1.5
1.0
60
V
= 0.7V
GAIN
OUTPUT
= 0.7V
40
V
GAIN
PREAMP GAIN = –3
0.2
20
5
0
0.5
0
0
0
–5
–0.5
–0.2
–0.4
–0.6
–20
–40
–60
–10
–15
–20
–25
–1.0
–1.5
–2.0
INPUT
INPUT
OUTPUT WHEN PWRA = 0
OUTPUT WHEN PWRA = 1
–2.5
350
–100 –50
0
50
100
150
200
250
300
–100 –50
0
50
100
150
200
250
300
350
TIME (ns)
TIME (ns)
Figure 45. Noninverting Small Signal Pulse Response for Both Power Levels
Figure 48. Inverting Gain Large Signal Pulse Response
0.6
0.4
60
20
15
2.0
V
= 0.7V
OUTPUT
= 0.7V
GAIN
V = ±3V
S
1.5
40
V
GAIN
10
1.0
PREAMP GAIN = –3
0.2
20
5
0.5
0
0
0
0
–5
–0.5
–1.0
–1.5
–2.0
–0.2
–0.4
–0.6
–20
–40
–60
INPUT
C
C
C
C
= 0pF
L
L
L
L
INPUT
= 10pF
= 22pF
= 47pF
–10
–15
–20
–100 –50
0
50
100
150
200
250
300
350
–100 –50
0
50
100 150 200 250 300 350 400
TIME (ns)
TIME (ns)
Figure 46. Inverting Gain Small Signal Pulse Response
Figure 49. Large Signal Pulse Response for Various Values of Load
Capacitance Using 3V Power Supplies
25
20
15
10
2.5
2.0
30
3
V
V
= 0.7V
= ±5V
V
= 0.7V
GAIN
GAIN
S
2
20
1.5
1.0
1
10
0.5
5
0
0
0
0
–5
–0.5
–1.0
–1.5
–2.0
–2.5
INPUT
CL = 0pF
–1
–2
–3
–10
–20
–30
C
L = 10pF
–10
–15
–20
–25
CL = 22pF
CL = 47pF*
INPUT
OUTPUT WHEN PWRA = 0
OUTPUT WHEN PWRA = 1
*WITH 20Ω RESISTOR IN SERIES WITH OUTPUT.
50 100 150 200 250
–100 –50
0
300
350
–100 –50
0
50
100
150
200
250
300
350
TIME (ns)
TIME (ns)
Figure 50. Large Signal Pulse Response for Various Values of Load
Capacitance Using 5V Power Supplies
Figure 47. Large Signal Pulse Response for Both Power Levels
Rev. 0 | Page 15 of 28
AD8336
30
3
10
0
V
V
= 0.7V
= ±12V
PSRR
POS NEG
GAIN
V
V
S
V
V
V
= 0.7V
= 0V
= –0.7V
GAIN
GAIN
GAIN
2
20
10
–10
–20
–30
–40
–50
–60
1
0
0
INPUT
L = 0pF
CL = 10pF*
CL = 22pF*
CL = 47pF*
C
–1
–2
–3
–10
–20
–30
*WITH 20Ω RESISTOR IN SERIES WITH OUTPUT
50 100 150 200 250
–100 –50
0
300
350
100k
1M
FREQUENCY (Hz)
5M
TIME (ns)
Figure 54 PSRR vs. Frequency for Three Values of VGAIN
Figure 51. Large Signal Pulse Response for Various Values of Load
Capacitance Using 12V Power Supplies
40
30
20
10
0
2.5
1.5
0.5
HIGH POWER
LOW POWER
V
V
OUT
–0.5
–1.5
–2.5
GAIN
V
V
V
= ±12V
= ±5V
= ±3V
S
S
S
–65 –45 –25
–5
15
25
45
55
75
95
125
–0.5
0
0.5
TIME (µs)
1.0
1.5
2.0
TEMPERATURE (°C)
Figure 55. IQ vs. Temperature for Three Values of Supply Voltage
and High and Low Power
Figure 52. Gain Response
0.5
0.4
5
4
3
2
1
0
V
= 0.7V
GAIN
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–1
–2
–3
–4
–5
V
V
(V)
(V)
IN
OUT
–9
–6
–3
0
3
6
TIME (µs)
Figure 53. VGA Overdrive Recovery
Rev. 0 | Page 1± of 28
AD8336
TEST CIRCUITS
NETWORK ANALYZER
NETWORK ANALYZER
OUT
IN
OUT
IN
50Ω
50Ω
50Ω
50Ω
AD8336
AD8336
453Ω
4
5
+
453Ω
PrA
1
4
5
+
–
–
49.9Ω
PrA
1
49.9Ω
8
9
12
11
8
9
12
11
301Ω
301Ω
V
GAIN
100Ω
100Ω
Figure 56. Gain vs. VGAIN and Gain Error vs. VGAIN
Figure 59. Group Delay
NETWORK ANALYZER
OUT
IN
50Ω
50Ω
AD8336
4
5
+
PrA
–
453Ω
50Ω
1
453Ω
AD8336
DMM
4
5
+
–
8
9
12
11
+
PrA
1
49.9Ω
301Ω
¯
100Ω
5
8
12
11
OPTIONAL
C
301Ω
LOAD
V
GAIN
100Ω
Figure 57. Frequency Response
Figure 60. Offset Voltage
NETWORK ANALYZER
NETWORK ANALYZER
CONFIGURE TO
MEASURE
Z-CONVERTED S22
OUT
IN
IN
50Ω
50Ω
50Ω
0Ω
AD8336
AD8336
NC
4
5
NC
453Ω
4
5
+
–
+
0Ω
49.9Ω
PrA
1
PrA
1
49.9Ω
–
8
9
12
11
8
9
12
11
301Ω
301Ω
NC
453Ω
NC
100Ω
100Ω
NC = NO CONNECT
NC = NO CONNECT
Figure 61. Output Resistance vs. Frequency
Figure 58. Frequency Response of the Preamp
Rev. 0 | Page 17 of 28
AD8336
OSCILLOSCOPE
PULSE
GENERATOR
SPECTRUM ANALYZER
POWER
SPLITTER
OUT
CH1
CH2
IN
50Ω
50Ω
50Ω
AD8336
OPTIONAL
AD8336
20Ω 453Ω
4
5
+
PrA
–
4
5
+
1
PrA
1
–
49.9Ω
8
9
12 11
8
9
12
11
301Ω
301Ω
0.7V
V
GAIN
100Ω
100Ω
Figure 62. Input Referred Noise and Output Referred Noise
Figure 65. Pulse Response
OSCILLOSCOPE
FUNCTION
GENERATOR GENERATOR SPLITTER
PULSE
POWER
NOISE FIGURE METER
NOISE
SINE
WAVE
SQUARE
WAVE
SOURCE
DRIVE
INPUT
CH1
CH2
50Ω
50Ω
NOISE
SOURCE
0Ω
DIFFERENTIAL
FET PROBE
11
AD8336
AD8336
4
+
0Ω
49.9Ω
(OR ∞)
4
453Ω
+
PrA
PrA
1
NC
–
5
49.9Ω
–
5
8
9
12
11
8
9
12
301Ω
301Ω
V
GAIN
100Ω
100Ω
NC = NO CONNECT
Figure 63. Noise Figure vs. VGAIN
Figure 66. Gain Response
OSCILLOSCOPE
–20dB
SPECTRUM ANALYZER
INPUT
ARBITRARY
WAVEFORM
GENERATOR
R
LOAD
SIGNAL
GENERATOR
CH1
CH2
50Ω
POWER
SPLITTER
50Ω
50Ω
LOW-PASS
FILTER
AD8336
AD8336
4
453Ω
+
4
+
PrA
–
PrA
1
NC
1
49.9Ω
49.9Ω
–
5
5
C
LOAD
8
9
12
11
8
9
12
11
301Ω
301Ω
0.7V
V
GAIN
100Ω
100Ω
NC = NO CONNECT
Figure 64. Harmonic Distortion
Figure 67. VGA Overdrive Recovery
Rev. 0 | Page 18 of 28
AD8336
POWER SUPPLIES
CONNECTED TO
NETWORK ANALYZER
BIAS PORT
NETWORK ANALYZER
DMM
(+I)
BENCH
POWER SUPPLY
OUT
50Ω
IN
13
AD8336
50Ω
4
5
+
BYPASS
PrA
–
1
VPOS OR VNEG
CAPACITORS
REMOVED FOR
MEASUREMENT
AD8336
8
9
12
11
10
4
5
+
PrA
–
1
301Ω
49.9Ω
DIFFERENTIAL
FET PROBE
100Ω
DMM
(–I)
8
9
12
11
301Ω
V
GAIN
100Ω
Figure 71. Power Supply Rejection Ratio
Figure 68. Supply Current
NETWORK ANALYZER
SPECTRUM ANALYZER
OUT
IN
IN
50Ω
50Ω
50Ω
453Ω
AD8336
AD8336
4
+
4
5
+
PrA
–
PrA
1
1
–
5
100Ω
100Ω
49.9Ω
8
9
12 11
301Ω
8
9
12
11
0.7V
301Ω
100Ω
V
GAIN
Figure 69. Frequency Response, Inverting Gain
Figure 72. Input Referred Noise vs. Source Resistance
SPECTRUM ANALYZER
OSCILLOSCOPE
PULSE
GENERATOR
POWER
SPLITTER
IN
OUT
CH1
CH2
50Ω
50Ω
50Ω
AD8336
AD8336
4
+
4
5
+
–
453Ω
PrA
1
PrA
1
–
100Ω
5
100Ω
49.9Ω
8
9
12 11
8
9
12 11
301Ω
301Ω
0.7V
0.7V
100Ω
Figure 70. Pulse Response, Inverting Gain
Figure 73. Short-Circuit Input Noise vs. Frequency
Rev. 0 | Page 19 of 28
AD8336
SPECTRUM
ANALYZER
SIGNAL
GENERATOR
IN
OUT
50Ω
50Ω
OPTIONAL 20dB
ATTENUATOR
22dB
AD8336
453Ω
4
5
+
PrA
1
49.9Ω
–
8
9
12
11
301Ω
V
GAIN
100Ω
Figure 74. IP1dB vs. VGAIN
SPECTRUM
ANALYZER
SIGNAL
GENERATOR
OUT
IN
50Ω
50Ω
–20dB
AD8336 AMPLIFIER
AD8336 DUT
453Ω
0Ω
4
5
+
PrA
–
4
5
+
–
1
PrA
1
49.9Ω
8
9
12
11
8
9
12
11
301Ω
301Ω
0.7V
V
GAIN
100Ω
100Ω
Figure 75. IP1dB vs. VGAIN, High Signal Level Inputs
SPECTRUM ANALYZER
INPUT
50Ω
+22dB –6dB
SIGNAL
COMBINER
–6dB
GENERATOR
453Ω
AD8336 DUT
4
5
+
PrA
1
49.9Ω
+22dB
–6dB
–
SIGNAL
GENERATOR
8
9
12
11
301Ω
V
GAIN
100Ω
Figure 76. IMD and OIP3
Rev. 0 | Page 20 of 28
AD8336
PREAMPLIFIER
THEORY OF OPERATION
The gain of the uncommitted voltage feedback preamplifier is
set with external resistors. The combined preamplifier and VGA
gain is specified in two ranges, between −14 dB to +46 dB and
0 dB to 60 dB. Since the VGA gain is fixed at 34 dB (50×), the
preamp gain is adjusted for gains of 12 dB (4×) and 26 dB (200×).
OVERVIEW
The AD8336 is the first VGA designed for operation over
exceptionally broad ranges of temperature and supply voltage.
Its performance has been characterized from temperatures
extending from −55°C to 125°C, and supply voltages from 3 V
to 12 V. It is ideal for applications requiring dc coupling, large
output voltage swings, very large gain ranges, extreme
temperature variations, or a combination thereof.
With low preamplifier gains between 2× and 4×, it may be
desirable to reduce the high frequency gain with a shunt
capacitor across RFB2, to ameliorate peaking in the frequency
domain (see Figure 77). To maintain stability, the gain of the
preamplifier must be 6 dB (2×) or greater.
The simplified block diagram is shown in Figure 77. The
AD8336 includes a voltage feedback preamplifier, an amplifier
with a fixed gain of 34 dB, a 60 dB attenuator, and various bias
and interface circuitry. The independent voltage feedback op
amp can be used in noninverting and inverting configurations,
and functions as a preamplifier to the variable gain amplifier
(VGA). If desired, the op amp output (PRAO) and VGA input
(VGAI) pins provide for connection of an interstage filter to
eliminate noise and offset. The bandwidth of the AD8336 is dc
to 100 MHz with a gain range of 60 dB (−14 dB to +46 dB.)
Typical of voltage feedback amplifier configurations, the gain-
bandwidth product of the AD8336 is fixed (at 400); thus, the
bandwidth decreases as the gain is increased beyond the nominal
gain value of 4×. For example, if the preamp gain is increased to
20×, the bandwidth reduces by a factor-of-five to about 20 MHz.
The −3 dB bandwidth of the preamplifier with a gain of 4× is
about 150 MHz, and for the 20× gain is about 30 MHz.
The preamp gain diminishes for an amplifier configured for
inverting gain, using the same value of feedback resistors as for
a noninverting amplifier, but the bandwidth remains unchanged.
For example, if the noninverting gain is 4×, the inverting gain is
−3×, but the bandwidth stays the same as in the noninverting
gain of 4×. However, because the output referred noise of the
preamplifier is the same in both cases, the input referred noise
increases as the ratio of the two gain values. For the previous
example, the input referred noise will increase by a factor of 4/3.
For applications that require large supply voltages, a reduction
in power is advantageous. The power reduction pin (PWRA)
permits the power and bandwidth to be reduced by about half
in such applications.
R
FB2
301Ω
*
PRAO
VGAI
12dB
34dB
INPP
INPN
FB1
–60dB TO 0dB
ATTENUATOR
AND
GAIN CONTROL
INTERFACE
VOUT
+
_
+
PrA
–
VGA
4.48kΩ
91.43Ω
R
100Ω
The architecture of the variable gain amplifier (VGA) section
of the AD8336 is based on the Analog Devices, Inc., X-AMP
(exponential amplifier), found in a wide variety of Analog
Devices variable gain amplifiers. This type of VGA combines a
ladder attenuator and interpolator, followed by a fixed-gain
amplifier.
BIAS
PWRA VPOS VNEG
GPOS
GNEG VCOM
*OPTIONAL DEPEAKING CAPACITOR. SEE TEXT.
Figure 77. Simplified Block Diagram
To maintain low noise, the output stages of both the preamplifier
and the VGA are capable of driving relatively small load
resistances. However, at the largest supply voltages, the signal
current may exceed safe operating limits for the amplifiers and
the load current must not exceed 50 mA. With a 12 V supply
and 10 V output voltage at the preamplifier or VGA output,
load resistances as low as 200 Ω are acceptable.
The gain control interface is fully differential, permitting positive
or negative gain slopes. Note that the common-mode voltage of
the gain control inputs increases with increasing supply.
The gain slope is 50 dB/V and the intercept is 16.4 dB when the
nominal preamp gain is 4× (12 dB). The intercept changes with
the preamp gain; for example, when the preamp gain is set to
20× (26 dB) the intercept becomes 30.4 dB.
For power supply voltages ≥ 10 V, the maximum operating
temperature range is derated to +85°C, as the power may exceed
safe limits (see the Absolute Maximum Ratings section).
Pin VGAI is connected to the input of the ladder attenuator.
The ladder ratio is R/2R and the nominal resistance is 320 Ω. To
reduce preamp loading and large-signal dissipation, the input
resistance at Pin VGAI is 1.28 kΩ. Safe current density and
power dissipation levels are maintained even when large dc
signals are applied to the ladder.
Since harmonic distortion products may increase for various
combinations of low impedance loads and high output voltage
swings, it is recommended that the user determine load and
drive conditions empirically.
The tap resistance of the resistors within the R/2R ladder is
640 Ω/3 or 213.3 Ω, the Johnson noise source of the attenuator.
Rev. 0 | Page 21 of 28
AD8336
SETTING THE GAIN
NOISE
The overall gain of the AD8336 is the sum (in dB) or the
product (magnitude) of the preamp gain and the VGA gain.
The preamp gain is calculated as with any op amp, as seen in
the Applications section. It is most convenient to think of the
device gain in exponential terms (that is, in dB) since the VGA
responds linearly-in-dB with changes in control voltage VGAIN at
the gain pins.
The noise of the AD8336 is dependent on the value of the VGA
gain. At maximum VGAIN, the dominant noise source is the
preamp but shifts to the VGA as VGAIN diminishes.
The input referred noise at the highest VGA gain and a preamp
gain of 4×, with RFB1 =100 Ω and RFB2 = 301 Ω, is 3 nV/√Hz, and
determined by the preamp and its gain setting resistors. See
Table 4 for the noise components for the preamp.
The gain equation for the VGA is
Table 4. AD8336 Noise Components for Preamp Gain = 4×
⎡
⎤
50 dB
V
Noise Component
Noise Voltage (nV/√Hz)
VGA Gain (dB) = VG AIN(V) ×
+ 4. 4dB
⎢
⎥
⎦
Op Amp (Gain = 4×) 2.±
⎣
RFB1 = 100 Ω
RFB2 = 301 Ω
VGA
0.9±
0.55
0.77
where VG = VGPOS − VGNEG
The gain and gain range of the VGA are both fixed at 34 dB and
60 dB, respectively; thus, the composite device gain is changed
by adjusting the preamp gain. For a preamp gain of 12 dB (4×),
the composite gain is −14 dB to +46 dB. Thus, the calculation
for the composite gain (in dB) is
Using the listed values, the total noise of the AD8336 is slightly
less than 3 nV/√Hz, referred to the input. Although the output
noise VGA is 3.1 nV/√Hz, the input referred noise is 0.77 nV/√Hz
when divided by the preamplifier gain of 4×
Composite Gain = GPRA + [VG (V) × 49.9 dB/V] + 4.4 dB
At other than maximum gain, the noise of the VGA is determined
from the output noise. The noise in the center of the gain range
is about 150 nV/√Hz. Since the gain of the fixed gain amplifier
that is part of the VGA is 50×, the VGA input referred noise is
approximately 3 nV/√Hz, the same value as the preamp and
VGA combined. This is expected since the input referred noise
is the same at the input of the attenuator at maximum gain.
However, the noise referred to the VGAI pin (the preamp
output) increases by the amount of attenuation through the
ladder network. The noise at any point along the ladder
network is primarily comprised of the ladder resistance noise,
the noise of the input devices, and the feedback resistor network
noise. The ladder network and the input devices are the largest
noise sources.
For example, the midpoint gain when the preamp gain is 12 dB is
12 dB + [0 V× 49.9 dB /V] + 4.4 dB = 16.4 dB
Figure 3 is a plot of gain in dB vs. VGAIN in mV, when the
preamp gain is 12 dB (4×). Note that the computed result
closely matches the plot of actual gain.
In Figure 3, the gain slope flattens at the limits of the VG input.
The gain response is linear-in-dB over the center 80% of the
control range of the device. Figure 78 shows the ideal gain
characteristics for the VGA stage and composite VGA + preamp.
70
GAIN CHARACTERISTICS
COMPOSITE GAIN
60
50
VGA STAGE GAIN
FOR PREAMP GAIN = 26dB
USABLE GAIN RANGE OF
At minimum gain, the output noise increases slightly to about
180 nV/√Hz because of the finite structure of the X-AMP.
40
AD8336
30
OFFSET VOLTAGE
20
Extensive cancellation circuitry included in the variable gain
amplifier section minimizes locally generated offset voltages.
However when operated at very large values of gain, dc voltage
errors at the output can still result from small dc input voltages.
When configured for the nominal gain range of −14 dB to 46 dB,
the maximum gain is 200× and an offset of only 100 μV at the
input generates 20 mV at the output.
10
0
FOR PREAMP GAIN = 12dB
FOR PREAMP GAIN = 6dB
–10
–20
–30
–0.7
–0.5
–0.3
–0.1
0.1
(V)
0.3
0.5
0.7
V
G
Figure 78. Ideal Gain Characteristics of the AD8336
The primary source for dc offset errors is the preamplifier;
ac coupling between the PRAO and VGAI pins is the simplest
solution. In applications where dc coupling is essential, a
compensating current can be injected at the INPN input (Pin 5)
to cancel preamp offset. The direction of the compensating
current depends on the polarity of the offset voltage.
Rev. 0 | Page 22 of 28
AD8336
APPLICATIONS
AMPLIFIER CONFIGURATION
Circuit Configuration for Noninverting Gain
The noninverting configuration is shown in Figure 80. The
preamp gain is described by the classical op amp gain equation
The AD8336 amplifiers can be configured in various options.
In addition to the 60 dB gain range variable gain stage, an
uncommitted voltage gain amplifier is available to the user as a
preamplifier. The preamplifier connections are separate to
enable noninverting or inverting gain configurations or the use
of interstage filtering. The AD8336 can be used as a cascade
connected VGA with preamp input, as a standalone VGA, or as
a standalone preamplifier. This section describes some of the
possible applications.
RFB2
Gain =
+ 1
RFB1
The practical gain limits for this amplifier are 6 dB to 26 dB.
The gain bandwidth product is about 600 MHz, so that at 150
MHz, the maximum achievable gain is 12 dB (4×). The minimum
gain is established internally by fixed loop compensation, and is
6 dB (2×). This amplifier is not designed for unity gain operation.
Table 5 shows the gain bandwidth for the noninverting gain
configuration.
PRAO VGAI
8
9
INPP
INPN
4
5
+
PrA
–
CIRCUIT CONFIGURATION FOR NONINVERTING GAIN
ATTENUATOR
–60dB TO 0dB
34dB
1 VOUT
AD8336
INPP
AD8336
PREAMPLIFIER
4
INPN
5
34dB
–60dB TO 0dB
1
VOUT
R
R
FB1
FB2
100Ω 301Ω
PRAO
GAIN CONTROL
INTERFACE
PWRA
2
BIAS
8
VGAI PWRA VNEG VCOM VPOS
GAIN = 12dB
9
2
10
3
13
+5V
–5V
10
13
VPOS
3
11
12
VNEG
VCOM
GPOS
GNEG
Figure 80. Circuit Configuration for Noninverting Gain
Figure 79. Application Block Diagram
The preamplifier output reliably sources and sinks currents up
to 50 mA. When using 5 V power supplies, the suggested sum
of the output resistor values is 400 Ω total for the optimal trade-
off between distortion and noise. Much of the low gain value
device characterization was performed with resistor values of
301 Ω and 100 Ω, resulting in a preamplifier gain of 12 dB (4×).
With supply voltages between 5 V and 12 V, the sum of the
output resistance should be increased accordingly and a total
resistance of 1 kΩ is recommended. Larger resistance values,
subject to a trade-off in higher noise performance, can be used
if circuit power and load driving is an issue. When considering
the total power dissipation, remember that the input ladder
resistance of the VGA is part of the preamp load.
PREAMPLIFIER
While observing just a few constraints, the uncommitted
voltage feedback preamplifier of the AD8336 can be connected
in a variety of standard high frequency op amp configurations.
The amplifier is optimized for a gain of 4×, (12 dB) and has a
gain bandwidth product of 600 MHz. At a gain of 4×, the
bandwidth is 150 MHz. The preamplifier gain can be adjusted
to a minimum gain of 2×; however, there will be a small peak in
the response at high frequencies. At higher preamplifier gains,
the bandwidth diminishes proportionally in conformance to the
classical voltage gain amplifier GBW relationship.
While setting the overall gain of the AD8336, the user needs to
consider the input referred offset voltage of the preamplifier.
Although the offset of the attenuator and postamplifier are
almost negligible, the preamplifier offset voltage, if uncorrected,
is increased by the combined gain of the preamplifier and
postamplifier. Thus for a maximum gain of 60 dB, an input offset
voltage of only 200 μV results in an error of 200 mV at the output.
Table 5. Gain vs. Bandwidth for Noninverting Preamplifier
Configuration.
Preamp Gain
Preamp BW
(MHz)
Composite
Gain (dB)
Numerical
dB
12
18
24
2±
4×
8×
1±×
20×
150
±0
30
−14 to +4±
−8 to +52
−2 to +58
0 to ±0
25
Rev. 0 | Page 23 of 28
AD8336
USING THE POWER ADJUST FEATURE
Circuit Configuration for Inverting Gain
The AD8336 has the provision to operate at lower power with
a trade-off in bandwidth. The power reduction applies to the
preamp and the VGA sections, and the bandwidth is reduced
equally between them. Reducing the power is particularly useful
when operating with higher supply voltages and lower values of
output loading that would otherwise stress the output amplifiers.
When Pin PWRA is grounded, the amplifiers operate in their
default mode, and the combined 3 dB bandwidth is 80 MHz
with the preamp gain adjusted to 4×. When the voltage on
Pin PWRA is between 1.2 V and 5 V, the power is reduced by
approximately half and the 3 dB bandwidth reduces to
approximately 35 MHz. The voltage at pin PWRA must not
exceed 5 V.
The preamplifier can also be used in an inverting configuration,
as shown in Figure 81.
CIRCUIT CONFIGURATION FOR INVERTING GAIN
AD8336
PREAMPLIFIER
INPP
4
+
34dB
–60dB TO 0dB
1
VOUT
GAIN = 9.6dB INPN
–
5
8
R
R
FB1
100Ω
FB2
301Ω
PRAO
PWRA VNEG VCOM VPOS
9
2
10
3
13
–5V
+5V
Figure 81. Circuit Configuration for Inverting Gain
The same considerations regarding total resistance vs. distortion,
noise, and power as noted in the noninverting case apply, except
that the amplifier can be operated at unity inverting gain. The
signal gain is reduced while the noise gain is the same as for the
noninverting configuration:
DRIVING CAPACITIVE LOADS
The output stages of the AD8336 are stable with capacitive loads
up to 47 pF for a supply voltage of 3 V, and capacitive loads up
to 10 pF for supply voltages up to 8 V. For larger combined
values of load capacitance and/or supply voltage, a 20 Ω series
resistor is recommended for stability.
RFB2
Signal Gain =
RFB1
and
The influence of capacitance and supply voltage are shown in,
Figure 50 and Figure 51, where representative combinations of
load capacitance and supply voltage requiring a 20 Ω resistor
are marked with an asterisk. No resistor is required for the 3 V
plots in Figure 49, while a resistor is required for most of the
12 V plots in Figure 51.
RFB2
Noise Gain =
+ 1
RFB1
Rev. 0 | Page 24 of 28
AD8336
EVALUATION BOARD
An evaluation board, AD8336-EVALZ, is available online for
the AD8336. Figure 82 is a photo of the board.
The board is shipped from the factory, configured for a preamp
gain of 4×. To change the value of the gain of the preamp or the
gain polarity to inverting is a matter of changing component
values, or installing components in alternate locations provided.
All components are standard 0603 size, and the board is designed
for RoHS compliancy. Figure 83 shows the locations of
components provided for changing the amplifier configuration
to inverting gain. Simply install the components shown in red
and remove those in gray.
OPTIONAL CIRCUITRY
The AD8336 features differential inputs for the gain control,
permitting nonzero or floating gain control inputs. In order to
avoid any delay in making the board operational, the gain input
circuit is shipped with Pin GNEG connected to ground via a
0 Ω resistor in location R17. The user can simply adjust the gain
of the device by driving the GPOS test loop with a power supply
or voltage reference. Resistor networks are provided for fixed
gain bias voltages at Pin GNEG and Pin GPOS for common-
mode voltages other than 0 V. If it is desired to drive the gain
control with an active input such as a ramp, SMA connectors
can be installed in the locations GAIN− and GAIN+. Provision
is made for an optional SMA connector at PRVG for monitoring
the preamp output or driving the VGA from an external source.
Remove the 0 Ω resistor at R9 to isolate the preamp from an
external generator.
Figure 82. AD8336 Evaluation Board
BOARD LAYOUT CONSIDERATIONS
The evaluation board uses four layers, with power and ground
planes located between two conductor layers. This arrangement
is highly recommended for customers and several views of the
board are provided as reference for board layout details. When
laying out a printed circuit board for the AD8336, remember to
provide a pad beneath the device to solder the exposed pad of
the matching device. The pad in the board should have at least
five vias in order to provide a thermal path for the chip scale
package. Unlike leaded devices, the thermal pad is the primary
means to remove heat dissipated within the device.
Figure 83. Components for Inverting Gain Operation
Table 6 is a bill of materials for the evaluation board.
Rev. 0 | Page 25 of 28
AD8336
Figure 84. Component Side Copper
Figure 87. Internal Ground Plane
Figure 85. Secondary Side Copper
Figure 88. Internal Power Plane
Figure 86. Component Side Silk Screen
Rev. 0 | Page 2± of 28
AD8336
VPOS
GND1 GND2 GND3 GND4
+
C4
10µF
25V
L2
120nH
(BLK LOOPS IN
4 CORNERS)
R1
0Ω
VOUT
GNEG
GPOS
C3
R15
R14
0.1µF
VOUTL
VP
VOUTD
GAIN–
GAIN+
16
15
14
13
C6
R17
1nF
NC NC NC VPOS
0Ω
1
2
3
4
12
11
10
R16
VOUT
GNEG
GPOS
VNEG
VGAI
4.99kΩ
U1
W1
CR1
5.1V
C8
0.1µF
PWRA
VCOM
INPP
C7
1nF
AD8336
R13
R3
0Ω
R4
0Ω
C5
0.1µF
VIN
9
L1
120nH
VNEG
INPN NC NC PRAO
VIN1
R2
49.9Ω
R6
C2
10µF
25V
R5
5
6
7
8
R11
+
0Ω
R8
301Ω
R9
0Ω
R12
0Ω
PRVG
R7
100Ω
R10
49.9Ω
NC = NO CONNECT
C1
Figure 89. AD8336-EVALZ Schematic Shown as Shipped, Configured for a Noninverting Gain of 4×
Table 6. AD8336 Evaluation Board Bill of Materials
Reference
Designator
Qty Name
Description
Manufacturer
Nichicon
KEMET
Panasonic
Diodes, Inc.
Amphenol
Mfg. Part Number
F931E10±MCCC
C0±03C104K4RSCTU
ECJ-1VB2A102K
DFLZ5V1-7
2
3
1
1
2
4
Capacitor
Tantalum 10 μF, 25 V
0.1 μF, 1± V, 0±03, X7R
1 nF, 50 V, 0±03, X7R
Zener, 5.1 V, 1 W
SMA Fem, RA, PC Mt
Black
C2, C4
C3, C5, C8
C7
CR1
VIN, VOUT
Capacitor
Capacitor
Diode
Connector
Test Loop
901-143-±RFX
TP-104-01-00
GND, GND1,
GND2, GND3
Components Corporation
2
2
±
Test Loop
Inductor
Resistor
Violet
Ferrite Bead
0 Ω, 5%, 0±03
GNEG, GPOS
L1, L2
R1, R3, R4, R9,
R11, R17
Components Corporation
Murata
Panasonic
TP-104-01-07
BLM18BA750SN1D
ERJ-2GE0R00X
1
1
1
1
1
1
1
1
4
Resistor
Resistor
Resistor
Resistor
Test Loop
Test Loop
Header
Integrated Circuit
Rubber Bumper
49.9 Ω 1% 1/1± W 0±03
100 Ω 1% 1/1± W 0±03
301 Ω 1/1± W 1% 0±03
4.99 kΩ 1/1± W 1% 0±03 R1±
Green
Red
0.1”Center
VGA
Foot
R2
R7
R8
Panasonic
Panasonic
Panasonic
Panasonic
Components Corporation
Components Corporation
Molex
Analog Devices
3M
ERJ-3EKF49R9V
ERJ-3EKF1000V
ERJ-3EKF3010V
ERJ-3EKF4991V
TP-104-01-05
TP-104-01-02
22-10-2031
VNEG
VPOS
W1
Z1
AD833±ACPZ
SJ±7A11
NA
Rev. 0 | Page 27 of 28
AD8336
OUTLINE DIMENSIONS
4.00
0.60 MAX
BSC SQ
(BOTTOM VIEW)
0.60 MAX
0.65 BSC
PIN 1
INDICATOR
13
16
1
4
12
PIN 1
INDICATOR
2.25
2.10 SQ
1.95
TOP
VIEW
3.75
BSC SQ
EXPOSED
PAD
0.75
0.60
0.50
9
8
5
0.25 MIN
0.80 MAX
0.65 TYP
12° MAX
1.95 BSC
THE EXPOSED PAD IS NOT CONNECTED
INTERNALLY. FOR INCREASED RELIABILITY
OF THE SOLDER JOINTS AND MAXIMUM
THERMAL CAPABILITY, IT IS RECOMMENDED
THAT THE PADDLE BE SOLDERED TO THE
GROUND PLANE.
0.05 MAX
0.02 NOM
1.00
0.85
0.80
0.35
0.30
0.25
0.20 REF
COPLANARITY
0.08
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
Figure 90. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
4 mm × 4 mm Body, Very Thin Quad
(CP-16-4)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option
CP-1±-4
CP-1±-4
CP-1±-4
CP-1±-4
AD833±ACPZ1
1±-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
1±-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
1±-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
1±-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
Evaluation Board
AD833±ACPZ-R71
AD833±ACPZ-RL1
AD833±ACPZ-WP1
AD833±-EVALZ1
1 Z = Pb-free part.
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06228-0-10/06(0)
Rev. 0 | Page 28 of 28
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