AD8337-EVALZ [ADI]
General-Purpose, Low Cost, DC-Coupled VGA; 通用型,低成本,直流耦合VGA型号: | AD8337-EVALZ |
厂家: | ADI |
描述: | General-Purpose, Low Cost, DC-Coupled VGA |
文件: | 总24页 (文件大小:800K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
General-Purpose, Low Cost,
DC-Coupled VGA
AD8337
FUNCTIONAL BLOCK DIAGRAM
FEATURES
VPOS
Low noise
8
Voltage noise = 2.2 nV/√Hz
AD8337
Current noise = 4.8 pA/√Hz (positive input)
Wide bandwidth (−3 dB) = 280 MHz
Nominal gain range: 0 dB to 24 dB (preamp gain = 6 dB)
Gain scaling: 19.7 dB/V
GAIN CONTROL
INTERFACE
GAIN
7
18dB
1 VOUT
PREAMP
(PRA)
DC-coupled
8 SECTIONS
3
4
2
+
–
INPP
INPN
Single-ended input and output
High speed uncommitted op amp input
Supplies: +5 V, 2.5 V, or 5 V
Low power: 78 mW with 2.5 V supplies
VCOM
5
6
PRAO
VNEG
Figure 1.
APPLICATIONS
Gain trim
PET scanners
High performance AGC systems
I/Q signal processing
Video
Industrial and medical ultrasound
Radar receivers
GENERAL DESCRIPTION
The AD8337 includes an uncommitted operational current-
feedback preamplifier (PrA) that operates in inverting or
noninverting configurations. Using external resistors, the
device can be configured for gains of 6 dB or greater. The
AD8337 is characterized by a noninverting PrA gain of 2× using
two external 100 Ω resistors. The attenuator has a range of
24 dB, and the output amplifier has a fixed gain of 8× (18.06 dB).
The lowest nominal gain range is 0 dB to 24 dB and can
be shifted up or down by adjusting the preamp gain. Multiple
AD8337s can be connected in series for larger gain ranges, and
for interstage filtering to suppress noise and distortion, and for
nulling offset voltages.
The AD8337 is a low noise, single-ended, linear-in-dB, general-
purpose variable gain amplifier (VGA) usable at frequencies
from dc to 100 MHz; the −3 dB bandwidth is 280 MHz.
Excellent bandwidth uniformity across the entire gain range
and low output-referred noise makes the AD8337 ideal for
gain trim applications and for driving high speed analog-to-
digital converters (ADCs).
Excellent dc characteristics combined with high speed make
the AD8337 particularly suited for industrial ultrasound, PET
scanners, and video applications. Dual-supply operation enables
gain control of negative-going pulses such as generated by
photodiodes or photomultiplier tubes.
The operating temperature range is –40°C to +85°C, and it is
available in an 8-lead, 3 mm × 3 mm LFCSP.
The AD8337 uses the popular and versatile X-AMP® architecture,
exclusively from Analog Devices, Inc., with a gain range of 24 dB.
The gain control interface provides precise linear-in-dB scaling
of 19.7 dB/V, referenced to VCOM.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2005-2007 Analog Devices, Inc. All rights reserved.
AD8337
TABLE OF CONTENTS
Gain Control ............................................................................... 18
Output Stage................................................................................ 19
Attenuator.................................................................................... 19
Single-Supply Operation and AC Coupling ........................... 19
Noise ............................................................................................ 19
Applications..................................................................................... 20
Preamplifier Connections ......................................................... 20
Driving Capacitive Loads.......................................................... 20
Gain Control Considerations ................................................... 21
Thermal Considerations............................................................ 22
PSI (Ψ) ......................................................................................... 22
Board Layout............................................................................... 22
Outline Dimensions....................................................................... 24
Ordering Guide .......................................................................... 24
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Test Circuits ..................................................................................... 14
Theory of Operation ...................................................................... 18
Overview...................................................................................... 18
Preamplifier................................................................................. 18
VGA.............................................................................................. 18
REVISION HISTORY
2/07—Rev. A to Rev. B
6/06—Rev. 0 to Rev. A
Changes to Figure 30, Figure 31, and Figure 32 ......................... 11
Changes to Single-Supply Operation and
AC Coupling Section ..................................................................... 19
Moved Noise Section to Page........................................................ 19
Changes to Ordering Guide .......................................................... 24
Updated Format..................................................................Universal
Changes to Table 3.............................................................................6
Changes to Figure 22, Figure 25, and Figure 26......................... 10
Changes to Figure 39 and Figure 40............................................. 13
Changes to Figure 74 and Figure 75............................................. 23
Updated Outline Dimensions....................................................... 25
Changes to Ordering Guide.......................................................... 25
9/05—Revision 0: Initial Version
Rev. B | Page 2 of 24
AD8337
SPECIFICATIONS
VS = 2.5 V, TA = 25°C, PrA Gain = +2, VCOM = GND, f = 10 MHz, CL = 5 pF, RL = 500 Ω, including a 20 Ω snubbing resistor, unless
otherwise specified.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
GENERAL PARAMETERS
–3 dB Small Signal Bandwidth
–3 dB Large Signal Bandwidth
Slew Rate
VOUT = 10 mV p-p
VOUT = 1 V p-p
VOUT = 2 V p-p
VOUT = 1 V p-p
f = 10 MHz
f = 10 MHz
VGAIN = 0.7 V, RS = 50 Ω, unterminated
VGAIN = 0.7 V, RS = 50 Ω, shunt terminated with 50 Ω
VGAIN = 0.7 V (Gain = 24 dB)
VGAIN = −0.7 V (Gain = 0 dB)
DC to 10 MHz
280
100
625
490
2.15
4.8
8.5
14
34
21
MHz
MHz
V/μs
V/μs
nV/√Hz
pA/√Hz
dB
Input Voltage Noise
Input Current Noise
Noise Figure
dB
Output-Referred Noise
nV/√Hz
nV/√Hz
Ω
Output Impedance
Output Signal Range
1
V
RL ≥ 500 Ω, VS = ± 2.5 V, + 5 V
RL ≥ 500 Ω, VS = ± 5 V
VGAIN = 0.7 V (Gain = 24 dB)
VCOM ± 1.3
VCOM ± 3.8
±5
V
Output Offset Voltage
−25
+25
mV
DYNAMIC PERFORMANCE
Harmonic Distortion
HD2
VGAIN = 0 V, VOUT = 1 V p-p
f = 1 MHz
−72
−66
−62
−63
−58
−56
8.2
−9.4
−71
−57
−58
−45
34
dBc
dBc
dBc
dBc
dBc
dBc
dBm
dBm
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
ns
HD3
HD2
HD3
HD2
f = 10 MHz
f = 45 MHz
HD3
Input 1 dB Compression Point
VGAIN = −0.7 V, f = 10 MHz (preamp limited)
VGAIN = +0.7 V, f = 10 MHz (VGA limited)
Two-Tone Intermodulation Distortion (IMD3) VGAIN = 0 V, VOUT = 1 V p-p, f1 = 10 MHz, f2 = 11 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f1 = 45 MHz, f2 = 46 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f1 = 10 MHz, f2 = 11 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f1 = 45 MHz, f2 = 46 MHz
Output Third-Order Intercept
VGAIN = 0 V, VOUT = 1 V p-p, f = 10 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f = 45 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f = 10 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f = 45 MHz
VGAIN = 0.75 V, VIN = 50 mV p-p to 500 mV p-p
1 MHz < f < 100 MHz, full gain range
28
35
26
50
Overload Recovery
Group Delay Variation
1
ns
Rev. B | Page 3 of 24
AD8337
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
VS = 5 V
Harmonic Distortion
HD2
VGAIN = 0 V, VOUT = 1 V p-p
f = 1 MHz
−85
−75
−90
−80
−75
−76
14.5
−1.7
−74
−60
−64
−49
35
dBc
dBc
dBc
dBc
dBc
dBc
dBm
dBm
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
ns
HD3
HD2
HD3
HD2
f = 10 MHz
f = 35 MHz
HD3
Input 1 dB Compression Point
VGAIN = −0.7 V, f = 10 MHz
VGAIN = +0.7 V, f = 10 MHz
Two-Tone Intermodulation Distortion (IMD3) VGAIN = 0 V, VOUT = 1 V p-p, f1 = 10 MHz, f2 = 11 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f1 = 45 MHz, f2 = 46 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f1 = 10 MHz, f2 = 11 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f1 = 45 MHz, f2 = 46 MHz
Output Third-Order Intercept
VGAIN = 0 V, VOUT = 1 V p-p, f = 10 MHz
VGAIN = 0 V, VOUT = 1 V p-p, f = 45 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f = 10 MHz
VGAIN = 0 V, VOUT = 2 V p-p, f = 45 MHz
VGAIN = 0.7 V, VIN = 0.1 V p-p to 1 V p-p
28
36
28
50
Overload Recovery
ACCURACY
Absolute Gain Error
−0.7 V < VGAIN < −0.6 V
−0.6 V < VGAIN < −0.5 V
−0.5 V < VGAIN < +0.5 V
0.5 V < VGAIN < 0.6 V
0.6 V < VGAIN < 0.7 V
0.7 to 3.5
0.35
0.25
0.35
−0.7 to −3.5
dB
−1.25
−1.0
−1.25
+1.25 dB
+1.0 dB
+1.25 dB
dB
GAIN CONTROL INTERFACE
Gain Scaling Factor
Gain Range
−0.6 V < VGAIN < +0.6 V
19.7
24
12.65
dB/V
dB
dB
V
MΩ
μA
ns
Intercept
VGAIN = 0 V
No foldover
Input Voltage (VGAIN) Range
Input Impedance
Bias Current
Response Time
POWER SUPPLY
Supply Voltage
VS = 2.5 V
−VS
+VS
70
0.3
200
−0.7 V < VGAIN < +0.7 V
24 dB gain change
VPOS to VNEG (dual- or single-supply operation)
4.5
5
10
V
Quiescent Current
Power Dissipation
PSRR
Each supply (VPOS and VNEG)
No signal, VPOS to VNEG = 5 V
VGAIN = 0.7 V, f = 1 MHz
10.5
15.5
78
−40
23.5
mA
mW
dB
VS = 5 V
Quiescent Current
Power Dissipation
PSRR
Each supply (VPOS and VNEG)
No signal, VPOS to VNEG = 10 V
VGAIN = 0.7 V, f = 1 MHz
13.5
18.5
185
−40
25.5
mA
mW
dB
Rev. B | Page 4 of 24
AD8337
ABSOLUTE MAXIMUM RATINGS
Table 2.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
Voltage
Supply Voltage (VPOS, VNEG)
Input Voltage (INPx)
GAIN Voltage
Power Dissipation
(Exposed Pad Soldered to PC Board)
±6 V
VPOS, VNEG
VPOS, VNEG
866 mW
Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 60 sec)
–40°C to +85°C
–65°C to +150°C
300°C
ESD CAUTION
Thermal Data—4-Layer JEDEC Board
No Air Flow Exposed Pad Soldered
to PC Board
θJA
θJB
θJC
ΨJT
ΨJB
75.4°C/W
47.5°C/W
17.9°C/W
2.2°C/W
46.2°C/W
Rev. B | Page 5 of 24
AD8337
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
VOUT
VCOM
INPP
1
2
3
4
8
7
6
VPOS
GAIN
VNEG
PRAO
AD8337
TOP VIEW
(Not to Scale)
5
INPN
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic
Description
1
2
VOUT
VCOM
VGA Output.
Common Ground when using Plus and Minus Supply Voltages. For single-supply operation, provide half the
positive supply voltage at Pin VPOS to Pin VCOM.
3
4
5
6
7
8
INPP
Positive Input to Preamplifier.
Negative Input to Preamplifier.
Preamplifier Output.
Negative Supply (−VPOS for Dual-Supply; GND for Single-Supply).
Gain Control Input Centered at VCOM.
Positive Supply.
INPN
PRAO
VNEG
GAIN
VPOS
Rev. B | Page 6 of 24
AD8337
TYPICAL PERFORMANCE CHARACTERISTICS
VS = ±2.5 V, TA = 25°C, RL = 500 Ω, including a 20 Ω snubbing resistor, f = 10 MHz, CL = 2 pF, VIN = 10 mV p-p, noninverting
configuration, unless otherwise noted.
60
50
40
30
20
10
0
30
25
20
15
10
5
500 UNITS
+85°C
+25°C
–40°C
V
V
V
= –0.4V
GAIN
GAIN
GAIN
= 0V
= +0.4V
0
–5
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
GAIN
GAIN ERROR (dB)
Figure 6. Gain Error Histogram for Three Values of VGAIN
Figure 3. Gain vs. VGAIN at Three Temperatures
See Figure 44
50
40
30
20
10
0
2.0
1.5
500 UNITS
+85°C
–0.4V ≤ V
≤ +0.4V
GAIN
+25°C
–40°C
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
19.3 19.4 19.5 19.6 19.7 19.8 19.9 20.0 20.1
GAIN SCALING (dB/V)
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
GAIN
Figure 7. Gain Scaling Histogram
Figure 4. Gain Error vs. VGAIN at Three Temperatures
See Figure 44
50
40
30
20
10
0
2.0
1.5
500 UNITS
f = 1MHz
f = 10MHz
f = 70MHz
f = 100MHz
f = 150MHz
RELATIVE TO BEST FIT
LINE FOR 10MHz
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–800
12.2 12.3 12.4 12.5 12.6 12.7 12.8 12.9 13.0
INTERCEPT (dB)
–600
–400
–200
0
200
400
600
800
V
(mV)
GAIN
Figure 8. Intercept Histogram
Figure 5. Gain Error vs. VGAIN at Five Frequencies
See Figure 44
Rev. B | Page 7 of 24
AD8337
30
25
20
15
10
5
30
25
20
15
10
5
V
= 0V
GAIN
V
= +0.7
GAIN
V
V
= +0.5
= +0.2
GAIN
GAIN
V
= 0
GAIN
V
V
= –0.2
GAIN
GAIN
= –0.5
= –0.7
C
= 47pF
L
C
C
C
= 22pF
= 10pF
= 0pF
L
L
L
0
0
V
GAIN
–5
100k
–5
100k
1M
10M
FREQUENCY (Hz)
100M
500M
1M
10M
100M
500M
FREQUENCY (Hz)
Figure 9. Frequency Response for Various Values of VGAIN
See Figure 45
Figure 12. Frequency Response for Three Values of CL
with a 20 Ω Snubbing Resistor
See Figure 45
20
15
10
5
10
8
V
= +0.7
V
V
= ±2.5V
= ±5V
GAIN
S
S
V
V
= +0.5
= +0.2
GAIN
GAIN
V
= 0
GAIN
6
V
= –0.2
GAIN
0
4
V
= –0.5
= –0.7
GAIN
–5
–10
–15
V
GAIN
2
0
100k
100k
1M
10M
FREQUENCY (Hz)
100M
500M
1M
10M
100M
500M
FREQUENCY (Hz)
Figure 10. Frequency Response for Various Values of VGAIN—Inverting Input
See Figure 58
Figure 13. Frequency Response—Preamp
See Figure 46
30
25
20
15
10
5
V
= 0V
GAIN
25
20
15
10
5
0
C
= 47pF
L
L
L
L
C
C
C
= 22pF
= 10pF
= 0pF
–5
0
–5
100k
–10
1M
1M
10M
100M
500M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 11. Frequency Response for Three Values of CL
See Figure 45
Figure 14. Group Delay vs. Frequency
See Figure 47
Rev. B | Page 8 of 24
AD8337
10
8
40
35
30
25
20
15
+85°C
+25°C
–40°C
V
= ±5V
S
6
4
2
0
–2
–4
–6
–8
–10
V
= ±2.5V
S
+85°C
+25°C
–40°C
–800
–600
–400
–200
0
200
400
600
800
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
V
(mV)
GAIN
GAIN
Figure 18. Output-Referred Noise vs. VGAIN at Three Temperatures
See Figure 50
Figure 15. Offset Voltage vs. VGAIN at Three Temperatures
See Figure 48
80
25
500 UNITS
+85°C
+25°C
–40°C
V
V
V
= –0.4V
GAIN
GAIN
GAIN
70
60
= 0V
20
15
10
5
= +0.4V
50
40
30
20
10
0
0
–800
–15
–10
–5
0
5
10
15
20
25
–600
–400
–200
0
200
400
600
800
OUTPUT OFFSET VOLTAGE (mV)
V
(mV)
GAIN
Figure 16. Output Offset Voltage Histogram for Three Values of VGAIN
Figure 19. Short-Circuit, Input-Referred Noise at Three Temperatures
See Figure 50
1k
7
V
R
= 0.7V
FB2
GAIN
= R
V
V
= ±2.5V
= ±5V
S
S
= 100Ω
FB1
6
5
4
3
2
1
0
100
10
1
PREAMP GAIN = –1
PREAMP GAIN = +2
0.1
1M
10M
FREQUENCY (Hz)
100M
500M
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 17. VGA Output Impedance vs. Frequency
See Figure 49
Figure 20. Short-Circuit, Input-Referred Noise vs. Frequency at Max Gain—
Inverting and Noninverting Preamp Gain = −1 and +2
See Figure 50
Rev. B | Page 9 of 24
AD8337
–40
–50
–60
–70
–80
10
f = 10MHz,
= 0.7V
HD3
HD2
V
GAIN
INPUT REFERRED NOISE
1
R
THERMAL NOISE ALONE
S
0.1
0
5
10
15
20
25
30
35
40
45
50
1
10
100
1k
LOAD CAPACITANCE (pF)
SOURCE RESISTANCE (Ω)
Figure 21. Input-Referred Noise vs. RS
See Figure 61
Figure 24. Harmonic Distortion vs. Load Capacitance
See Figure 52
35
30
25
20
15
10
5
–30
–40
–50
–60
–70
–80
50Ω SOURCE
WITH 50Ω SHUNT
TERMINATION AT INPUT
UNTERMINATED
1MHz
10MHz
35MHz
100MHz
–800
–600
–400
–200
0
200
400
600
800
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
V
(mV)
GAIN
GAIN
Figure 25. HD2 vs. VGAIN at Four Frequencies
See Figure 52
Figure 22. Noise Figure vs. VGAIN
See Figure 51
–30
–40
–50
–60
–70
–80
–40
1MHz
10MHz
35MHz
HD3 V = ±2.5V
V
V
= 1V p-p
S
OUT
HD3 V = ±5V
S
= 0V
GAIN
HD2 V = ±2.5V
S
100MHz
HD2 V = ±5V
S
–50
–60
–70
–80
–800
–600
–400
–200
0
200
400
600
800
0
200 400 600 800 1.0k 1.2k 1.4k 1.6k 1.8k 2.0k
LOAD RESISTANCE (
V
(mV)
GAIN
Ω)
Figure 26. HD3 vs. VGAIN at Four Frequencies
See Figure 52
Figure 23. Harmonic Distortion vs. RLOAD and Supply Voltage
See Figure 52
Rev. B | Page 10 of 24
AD8337
–30
–40
–50
–60
–70
–80
–90
50
40
30
20
10
0
V
V
V
= 2V p-p
= 1V p-p
= 0.5V p-p
OUT
OUT
OUT
LIMITED BY
MAXIMUM PREAMP
OUTPUT SWING
1MHz
10MHz
45MHz
70MHz
100MHz
V
= 1V p-p
OUT
TONES SEPARATED BY 100kHz
–800
–600
–400
–200
0
200
400
600
800
–800 –600 –400 –200
0
200
400
600
800
V
(mV)
V
(mV)
GAIN
GAIN
Figure 27. HD2 vs. VGAIN for Three Levels of Output Voltage
See Figure 52
Figure 30. Output-Referred IP3 (OIP3) vs. VGAIN
at Five Frequencies
See Figure 64
–30
–40
–50
–60
–70
–80
–90
50
40
30
20
10
0
V
V
V
= 2V p-p
= 1V p-p
= 0.5V p-p
OUT
OUT
OUT
LIMITED BY
MAXIMUM PREAMP
OUTPUT SWING
1MHz
10MHz
45MHz
70MHz
V
V
= ±5V
S
= 1V p-p
OUT
100MHz
TONES SEPARATED BY 100kHz
–800
–600
–400
–200
0
200
400
600
800
–800 –600 –400 –200
0
200
400
600 800
V
(mV)
V
(mV)
GAIN
GAIN
Figure 28. HD3 vs. VGAIN for Three Levels of Output Voltage
See Figure 52
Figure 31. Output-Referred IP3 (OIP3) vs. VGAIN, VS = 5 V
at Five Frequencies
See Figure 64
–20
–30
–40
–50
–60
–70
–80
20
15
10
5
V
V
= 1V p-p
= 0V
OUT
V
V
= ±2.5V
= ±5V
S
S
PREAMP LIMITED
GAIN
TONES SEPARATED BY 100kHz
0
–5
–10
–15
V
V
= ±2.5V
= ±5V
S
S
1M
10M
100M
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
FREQUENCY (Hz)
GAIN
Figure 32. Input P1dB (IP1dB) vs. VGAIN
See Figure 63
Figure 29. IMD3 vs. Frequency
See Figure 64
Rev. B | Page 11 of 24
AD8337
80
V
8
800
600
400
200
0
80
C
C
C
C
= 0pF
= 0.7V
L
L
L
L
GAIN
= 10pF
= 22pF
= 47pF
60
40
6
60
4
40
20
2
20
0
0
0
–20
–40
–2
–4
–6
–8
–200
–400
–20
–40
–60
–80
INPUT
INPUT
OUTPUT
OUTPUT
–60
–80
–600
–800
V
V
= ±2.5V
S
= 0.7V
GAIN
–20
–10
0
10
20
30
40
50
60
70
–20
–10
0
10
20
30
40
50
60
70
TIME (ns)
TIME (ns)
Figure 36. Large Signal Pulse Response for Three Capacitive Loads
See Figure 53
Figure 33. Small Signal Pulse Response
See Figure 53
800
600
400
200
0
80
80
60
8
C
C
C
C
= 0pF
V
= 0.7V
L
L
L
L
GAIN
= 10pF
= 22pF
= 47pF
60
6
INPUT
40
40
4
20
20
2
0
0
0
–200
–400
–20
–40
–60
–80
–20
–40
–2
–4
–6
–8
INPUT
OUTPUT
OUTPUT
–10
–600
–800
–60
–80
V
V
= ±5V
S
= 0.7V
GAIN
–20
–10
0
10
20
30
40
50
60
70
–20
0
10
20
30
40
50
60
70
TIME (ns)
TIME (ns)
Figure 37. Large Signal Pulse Response for Three Capacitive Loads, VS = 5 V
See Figure 53
Figure 34. Small Signal Pulse Response—Inverting Feedback
See Figure 59
800
600
400
200
0
80
0.8
0.6
V
= 0.7V
GAIN
60
V
OUT
40
0.4
0.2
20
0
0
–200
–400
–20
–40
–60
–80
–0.2
–0.4
–0.6
–0.8
INPUT
OUTPUT
–600
–800
V
GAIN
–20
–10
0
10
20
30
40
50
60
70
–0.5
0
0.5
1.0
1.5
2.0
TIME (ns)
TIME (µs)
Figure 35. Large Signal Pulse Response
See Figure 53
Figure 38. Gain Response
See Figure 54
Rev. B | Page 12 of 24
AD8337
1.5
1.0
10
0
V
V
(V)
(V)
V
V
V
V
V
V
= +0.7V, V = ±2.5V
S
IN
OUT
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
V
= 0.7V
GAIN
= +0.7V, V = ±5V
S
= 0V, V = ±2.5V
S
= 0V, V = ±5V
S
–10
–20
–30
–40
–50
–60
–70
–80
= –0.7V, V = ±2.5V
S
= –0.7V, V = ±5V
S
0.5
0
–0.5
–1.0
–1.5
–0.3 –0.1 0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
1.7
100k
1M
10M
FREQUENCY (Hz)
100M
TIME (µs)
Figure 39. Preamp Overdrive Recovery
See Figure 55
Figure 42. PSRR vs. Frequency of Negative Supply
See Figure 60
1.5
1.0
24
22
20
18
16
14
12
V
V
(V)
V
= 0.7V
IN
V
V
= ±5V
= ±2.5V
GAIN
S
S
(V)
OUT
0.5
0
–0.5
–1.0
–1.5
–0.3 –0.1 0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
1.7
–50
–30
–10
10
30
50
70
90
TEMPERATURE (°C)
TIME (µs)
Figure 43. Quiescent Supply Current vs. Temperature
See Figure 57
Figure 40. VGA Overdrive Recovery
See Figure 56
10
0
V
V
V
V
V
V
= +0.7V, V = ±2.5V
S
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
= +0.7V, V = ±5V
S
= 0V, V = ±2.5V
S
= 0V, V = ±5V
S
–10
–20
–30
–40
–50
–60
–70
–80
= –0.7V, V = ±2.5V
S
= –0.7V, V = ±5V
S
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 41. PSRR vs. Frequency of Positive Supply
See Figure 60
Rev. B | Page 13 of 24
AD8337
TEST CIRCUITS
NETWORK ANALYZER
NETWORK ANALYZER
OUT
IN
OUT
IN
50Ω
50Ω
50Ω
50Ω
AD8337
AD8337
453Ω
3
4
+
PRA
–
20Ω 453Ω
+
PRA
–
3
4
20Ω
1
1
49.9Ω
49.9Ω
56.2Ω
56.2Ω
5
7
5
7
100Ω
100Ω
V
GAIN
100Ω
100Ω
Figure 47. Group Delay
Figure 44. Gain and Gain Error vs. VGAIN
OSCILLOSCOPE
NETWORK ANALYZER
FUNCTION
GENERATOR
OUT
CH1
CH2
OUT
IN
50Ω
50Ω
50Ω
50Ω
50Ω
V
GAIN
DIFFERENTIAL
FET PROBE
7
453Ω
AD8337
AD8337
453Ω
50Ω
3
4
+
PRA
–
3
20Ω
+
PRA
–
1
49.9Ω
1
4
5
5
7
OPTIONAL
POSITIONS FOR
100Ω
100Ω
C
LOAD
V
GAIN
100Ω
100Ω
Figure 45. Frequency Response
Figure 48. Offset Voltage
NETWORK ANALYZER
NETWORK ANALYZER
CONFIGURE TO
MEASURE Z
CONVERTED S22
IN
OUT
IN
50Ω
50Ω
50Ω
0Ω
AD8337
NC
AD8337
NC
20Ω 453Ω
3
0Ω
3
4
+
PRA
–
+
PRA
1
1
49.9Ω
49.9Ω
4
–
5
7
5
7
100Ω
100Ω
NC
453Ω
NC
100Ω
100Ω
Figure 49. Output Resistance vs. Frequency
Figure 46. Frequency Response—Preamp
Rev. B | Page 14 of 24
AD8337
OSCILLOSCOPE
PULSE
GENERATOR
SPECTRUM ANALYZER
POWER
SPLITTER
OUT
CH1
CH2
IN
50Ω
50Ω
50Ω
0Ω
AD8337
AD8337
3
4
+
20Ω 453Ω
56.2Ω
PRA
1
3
4
+
PRA
–
0Ω
–
1
49.9Ω
49.9Ω
5
7
100Ω
5
7
0.7V
100Ω
100Ω
V
GAIN
100Ω
Figure 53. Pulse Response
Figure 50. Input-Referred and Output-Referred Noise
DUAL
FUNCTION
GENERATOR
OSCILLOSCOPE
POWER
SPLITTER
NOISE FIGURE METER
NOISE
SINE
WAVE
SQUARE
WAVE
CH1
CH2
INPUT
SOURCE
DRIVE
50Ω
50Ω
NOISE
SOURCE
V
GAIN
DIFFERENTIAL
FET PROBE
7
0Ω
AD8337
AD8337
20Ω 453Ω
3
4
+
PRA
–
3
+
0Ω
NC
49.9Ω
(OR ∞)
1
PRA
1
49.9Ω
4
–
5
5
7
100Ω
100Ω
V
100Ω
GAIN
100Ω
Figure 54. Gain Response
Figure 51. Noise Figure vs. VGAIN
FUNCTION
GENERATOR
OSCILLOSCOPE
SPECTRUM ANALYZER
INPUT
R
LOAD
SIGNAL
CH2
OUTPUT
CH1
GENERATOR
50Ω
50Ω
NC
7
LOW
PASS
FILTER
AD8337
AD8337
3
4
+
PRA
–
1
NC
3
49.9Ω
4
20Ω
+
PRA
–
49.9Ω
1
C
LOAD
5
5
7
100Ω
100Ω
100Ω
100Ω
V
GAIN
100Ω
Figure 55. Preamp Overdrive Recovery
Figure 52. Harmonic Distortion
Rev. B | Page 15 of 24
AD8337
FUNCTION
OSCILLOSCOPE
GENERATOR
POWER
SPLITTER
OSCILLOSCOPE
PULSE
GENERATOR
POWER
SPLITTER
OUTPUT
CH1
CH2
OUT
50Ω
50Ω
CH1
CH2
50Ω
50Ω
AD8337
AD8337
3
+
PRA
–
20Ω 453Ω
NC
1
20Ω 453Ω
3
4
+
PRA
–
49.9Ω
4
1
100Ω
56.2Ω
100Ω
5
100Ω
5
7
100Ω
100Ω
0.7V
Figure 56. VGA Overdrive Recovery
Figure 59. Pulse Response—Inverting Feedback
+SUPPLY TO NETWORK
ANALYZER BIAS PORT
NETWORK ANALYZER
BENCH
POWER SUPPLY
DMM
(+I)
OUT
50Ω
IN
50Ω
8
BYPASS
CAPACITORS
REMOVED FOR
MEASUREMENT
AD8337
VPOS
3
4
+
PRA
–
AD8337
DMM
(V)
1
3
4
+
PRA
–
1
DIFFERENTIAL
FET PROBE
49.9Ω
5
7
6
100Ω
5
7
DMM
(–I)
100Ω
100Ω
V
GAIN
100Ω
Figure 57. Supply Current
Figure 60. PSRR
SPECTRUM ANALYZER
NETWORK ANALYZER
IN
OUT
IN
50Ω
50Ω
50Ω
453Ω
AD8337
AD8337
3
4
+
PRA
–
3
4
+
PRA
–
20Ω
1
1
100Ω
100Ω
5
7
5
7
100Ω
100Ω
V
GAIN
V
100Ω
GAIN
Figure 58. Frequency Response—Inverting Feedback
Figure 61. Input-Referred Noise vs. RS
Rev. B | Page 16 of 24
AD8337
NETWORK ANALYZER
POWER SWEEP
SPECTRUM ANALYZER
22dB
OUT
IN
IN
50Ω
50Ω
50Ω
453Ω
AD8337
AD8337
3
+
PRA
–
20Ω
3
4
+
PRA
–
1
1
49.9Ω
4
5
7
5
7
100Ω
100Ω
V
GAIN
0.7V
100Ω
100Ω
Figure 63. IP1dB vs. VGAIN
Figure 62. Short-Circuit Input Noise vs. Frequency
SPECTRUM ANALYZER
INPUT
50Ω
+22dB
+22dB
–6dB
–6dB
–6dB
SIGNAL
GENERATOR
COMBINER
–6dB
AD8337
453Ω
3
4
+
PRA
–
20Ω
1
49.9Ω
SIGNAL
GENERATOR
5
7
100Ω
V
GAIN
100Ω
Figure 64. IMD and OIP3
Rev. B | Page 17 of 24
AD8337
THEORY OF OPERATION
VPOS
8
R
= R
FB2
= 100Ω
FB1
INPP
INPN
+
+
+
3
4
5
PRA
6dB
–
18dB
(8X)
–
ATTENUATOR
–24dB TO 0dB
–
1
VOUT
R
G
749Ω
PRAO
FB2
R
GAIN
INTERFACE
INTERPOLATOR
BIAS
R
FB1
107Ω
2
6
7
VCOM
VNEG
GAIN
Figure 65. Block Diagram
VGA
OVERVIEW
This X-AMP, with its linear-in-dB gain characteristic
architecture, yields the optimum dynamic range for receiver
applications. Referring to Figure 65, the signal path consists
of a −24 dB variable attenuator followed by a fixed gain amplifier
of 18 dB, for a total VGA gain range of −6 dB to +18 dB. With
the preamplifier configured for a gain of 6 dB, the composite
gain range is 0 dB to 24 dB.
The AD8337 is a low noise, single-ended, linear-in-dB, general-
purpose, variable gain amplifier (VGA) usable at frequencies
up to 100 MHz. It is fabricated using a proprietary Analog
Devices dielectrically isolated, complementary bipolar process.
The bandwidth is dc to 280 MHz and features low dc offset
voltage and an ideal nominal gain range of 0 dB to 24 dB.
Requiring about 15.5 mA, the power consumption is only
78 mW from either a single +5 V or a dual ±2.5 V supply.
Figure 65 is the circuit block diagram of the AD8337.
The VGA plus preamp with 6 dB of gain implements the
following exact gain law
PREAMPLIFIER
dB
Gain(dB) = 19.7 ×V
⎡
⎣
⎤
+ ICPT(dB)
⎢
⎥
⎦
GAIN
V
An uncommitted, current-feedback op amp included in the
AD8337 can be used as a preamplifier to buffer the ladder
network attenuator of the X-AMP. As with any op amp, the gain
is established using external resistors, and the preamplifier is
specified with a noninverting gain of 6 dB (2×) and gain resistor
values of 100 Ω. The preamplifier gain can be increased using
larger values of RFB2, trading off bandwidth and offset voltage.
The value of RFB2 should be ≥100 Ω because it and an internal
compensation capacitor determines the 3 dB bandwidth, and
smaller values can compromise preamplifier stability.
where the nominal intercept (ICPT) is 12.65 dB.
The ICPT increases as the gain of the preamp is increased. For
example, if the gain of the preamp is increased by 6 dB, ICPT
increases to 18.65 dB. Although the previous equation shows
the exact gain law as based on statistical data, a quick estimation
of signal levels can be made using the default slope of 20 dB/V
for a particular gain setting. For example, the change in gain for
a VGAIN change of 0.3 V is 6 dB using a slope of 20 dB/V and
5.91 dB using the exact slope of 19.6 dB/V. This is a difference
of only 0.09 dB.
Because the AD8337 is dc-coupled, larger preamp gains increase
the offset voltage. The offset voltage can be compensated by
connecting a resistor between the INPN input and the supply
voltage. If the offset is negative, the resistor value connects to the
negative supply. For ease of adjustment, a trimmer network
can be used.
GAIN CONTROL
The gain control interface provides a high impedance input
and is referenced to VCOM pin (in a single-supply application
to midsupply at [VPOS + VNEG]/2 for optimum swing).
When dual supplies are used, VCOM is connected to ground.
The voltage on the VCOM pin determines the midpoint of the
gain range. For a ground referenced design, the VGAIN range is
from −0.7 V to +0.7 V with the most linear-in-dB section of the
gain control between −0.6 V and +0.6 V. In the center 80% of
the VGAIN range, the gain error is typically less than ±0.2 dB. The
gain control voltage can be increased or decreased to the positive
or negative rails without gain foldover.
For larger gains, the overall noise is reduced if a low value of
RFB1 is selected. For values of RFB1 = 20 Ω and RFB2 = 301 Ω, the
preamp gain is 16× (24.1 dB), and the input-referred noise is
approximately 1.5 nV/√Hz. For this value of gain, the overall
gain range increases by 18 dB; therefore, the gain range is
18 dB to 42 dB.
Rev. B | Page 18 of 24
AD8337
The gain scaling factor (gain slope) is designed for 20 dB/V; this
relatively low slope ensures that noise on the GAIN input is not
unduly amplified. Because a VGA functions as a multiplier, it is
important to make sure that the GAIN input does not inadver-
tently modulate the output signal with unwanted noise. Because
of its high input impedance, a simple low-pass filter can be
added to the GAIN input to filter unwanted noise.
NOISE
The total input-referred voltage and current noise of the positive
input of the preamplifier are about 2.2 nV/√Hz and 4.8 pA/√Hz.
The VGA output-referred noise is about 21 nV/√Hz at low gains.
This result is divided by the VGA fixed gain amplifier gain of 8×
and results in a voltage noise density of 2.6 nV/√Hz referred to
the VGA input. This value includes the noise of the VGA gain
setting resistors as well. If this voltage is again divided by the
preamp gain of 2, the VGA noise referred all the way to the
preamp input is about 1.3 nV/√Hz. From this, it is determined
that the preamplifier, including the 100 Ω gain setting resistors,
contributes about 1.8 nV/√Hz. The two 100 Ω resistors
contribute 1.29 nV/√Hz each at the output of the preamp.
With the gain resistor noise subtracted, the preamplifier noise
is about 1.55 nV/√Hz.
OUTPUT STAGE
The output stage is a Class AB, voltage-feedback, complementary
emitter-follower with a fixed gain of 18 dB, similar to the
preamplifier in speed and bandwidth. Because of the ac-beta
roll-off of the output devices and the inherent reduction in
feedback beyond the −3 dB bandwidth, the impedance looking
into the output pin of the preamp and output stages appears to be
inductive (increasing impedance with increasing frequency).
The high speed output amplifier used in the AD8337 can drive
large currents, but its stability is susceptible to capacitive
loading. A small series resistor mitigates the effects of
capacitive loading (see the Applications section).
Equation 2 shows the calculation that determines the output-
referred noise at maximum gain (24 dB or 16×).
where:
•
•
•
•
•
At is the total gain from preamp input to VGA output.
RS is the source resistance.
ATTENUATOR
The input resistance of the VGA attenuator is nominally 265 Ω.
Assuming the default preamplifier feedback network RFB1 + RFB2
is 200 Ω, the effective preamplifier load is about 114 Ω. The
attenuator is composed of eight 3.01 dB sections for a total
attenuation range of −24.08 dB. Following the attenuator is a
fixed gain amplifier with 8× (18.06 dB) gain. Because of this
relatively low gain, the output offset is kept well below 20 mV
over temperature; the offset is largest at maximum gain when
the preamplifier offset is amplified. The VCOM pin defines the
common-mode reference for the output, as shown in Figure 65.
en − PrA is the input-referred voltage noise of the preamp.
in − PrA is the current noise of the preamp at the INPP pin.
en −
en −
is the voltage noise of RFB1
.
.
R
R
FB1
FB2
•
•
is the voltage noise of RFB2
en − VGA is the input-referred voltage noise of the VGA (low
gain, output-referred noise divided by a fixed gain of 8×).
Assuming RS = 0 Ω, RFB1 = RFB2 = 100 Ω, At = 16×, and AVGA
8×, the noise simplifies to
=
SINGLE-SUPPLY OPERATION AND AC COUPLING
If the AD8337 is to be operated from a single 5 V supply,
the bias supply for VCOM must be a very low impedance
2.5 V reference, especially if dc coupling is used. If the device
is dc-coupled, the VCOM source must be able to handle the
preamplifier and VGA dynamic load currents in addition to
the bias currents.
en − out
=
(1.75×16)2 + 2(1.29×8)2 + (1.9×8)2 = 35 nV Hz (1)
Dividing the result by 16 gives the total input-referred noise
with a short-circuited input as 2.2 nV/√Hz. When the
preamplifier is used in the inverting configuration with the
same RFB1 and RFB2 = 100 Ω as previously noted, en − out does not
change. However, because the gain dropped by 6 dB, the input-
referred noise increases by a factor of 2 to about 4.4 nV/√Hz.
The reason for this increase is that the noise gain to the output of
the noise generators stays the same, yet the preamp in the
inverting configuration has a gain of −1 compared to the +2 in
the noninverting configuration; this increases the input-referred
noise by 2.
When ac coupling the preamplifier input, a bias network and
bypass capacitor must be connected to the opposite polarity
input pin. The bias generator for Pin VCOM must provide the
dynamic current to the preamplifier feedback network and the
VGA attenuator. For many single 5 V applications, a reference,
such as the ADR391, and a good op amp provide an adequate
VCOM source if a 2.5 V supply is unavailable.
R
2
2
2
×R ) +(e
S
2
2
2
FB2
FB1
e
=
(R × A ) +(e
× A ) +(i
×
× A
VGA
)
+(e
× A
)
+(e
× A
n − VGA VGA
)
n − R
n − out
t
t
FB2
S
n − PrA
n − PrA
n − R
FB1
VGA
R
(2)
Rev. B | Page 19 of 24
AD8337
APPLICATIONS
PREAMPLIFIER CONNECTIONS
Noninverting Gain Configuration
DRIVING CAPACITIVE LOADS
Because of the large bandwidth of the AD8337, stray
capacitance at the output pin can induce peaking in the
frequency response as the gain of the amplifier begins to roll off.
Figure 68 shows peaking with two values of load capacitance
using 2.5 V supplies and VGAIN = 0 V.
The AD8337 preamplifier is an uncommitted, current-feedback
op amp that is stable for values of RFB2 ≥ 100 Ω. See Figure 66
for the noninverting feedback connections.
PREAMPLIFIER
INPP
25
V
= 0V
GAIN
3
4
5
+
C
C
C
= 0pF
= 10pF
= 22pF
L
L
L
R
INPN
G
20
15
10
5
–
NO SNUBBING RESISTOR
PRAO
FB2
R
R
FB1
Figure 66. AD8337 Preamplifier Configured for Noninverting Gain
Two surface-mount resistors establish the preamplifier gain.
Equal values of 100 Ω configure the preamplifier for a 6 dB gain
and the device for a default gain range of 0 dB to 24 dB.
0
–5
100k
1M
10M
100M
500M
FREQUENCY (Hz)
For preamp gains ≥2, select a value of RFB2 ≥ 100 Ω and
RFB1 ≤ 100 Ω. Higher values of RFB2 reduce the bandwidth and
increase the offset voltage, but smaller values compromise
stability. If RFB1 ≤ 100 Ω, the gain increases and the input-
referred noise decreases.
Figure 68. Peaking in the Frequency Response for Two Values of Output
Capacitance with 2.5 V Supplies and No Snubbing Resistor
25
V
= 0V
= 0pF
= 10pF
= 22pF
GAIN
C
C
C
L
L
L
20
15
10
5
WITH 20Ω SNUBBING RESISTOR
Inverting Gain Configuration
For applications requiring polarity inversion of negative pulses, or
for waveforms that require current sinking, the preamplifier can
be configured as an inverting gain amplifier. When configured
with bipolar supplies, the preamplifier amplifies positive or
negative input voltages with no level shifting of the common-
mode input voltage required. Figure 67 shows the AD8337
configured for inverting gain operation.
0
Because the AD8337 is a very high frequency device, stability
issues can occur unless the circuit board on which it is used is
carefully laid out. The stability of the preamp is affected by
parasitic capacitance around the INPN pin. Position the pre-
amp gain resistors, RFB1 and RFB2, as close as possible to Pin 4,
INPN, to minimize stray capacitance.
–5
100k
1M
10M
FREQUENCY (Hz)
100M
500M
Figure 69. Frequency Response for Two Values of Output Capacitance
with a 20 Ω Snubbing Resistor
PREAMPLIFIER
INPP
3
4
5
+
R
INPN
FB1
–
PRAO
R
FB2
Figure 67. The AD8337 Preamplifier Configured for Inverting Gain
Rev. B | Page 20 of 24
AD8337
800
600
80
In the time domain, stray capacitance at the output pin can
induce overshoot on the edges of transient signals, as seen in
Figure 70 and Figure 72. The amplitude of the overshoot is
also a function of the slewing of the transient (not shown).
The transition time of the input pulses used for Figure 70
and Figure 72 was set deliberately high at 300 ps to demonstrate
the fast response time of the amplifier. Signals with longer
transition times generate less overshoot.
V
= ±5V
S
60
400
200
40
20
0
0
–200
–20
–40
–60
INPUT
800
80
–400 OUTPUT
–600
C
C
C
= 0pF
= 10pF
= 22pF
L
L
L
600
60
WITH 20Ω SNUBBING RESISTOR
400
200
40
–800
–80
80
–20 –10
0
10
20
30
40
50
60
70
TIME (ns)
20
C
C
C
= 0pF
= 10pF
= 22pF
L
L
L
Figure 73. Pulse Response for Two Values of Output Capacitance
with 5 V Supplies and a 20 Ω Snubbing Resistor
0
–200
–400
–600
–800
0
NO SNUBBING RESISTOR
–20
–40
–60
–80
The effects of stray output capacitance are mitigated with a
small value snubbing resistor, RSNUB, placed in series with, and
as near as possible to, the output pin. Figure 69, Figure 71, and
Figure 73 show the improvement in dynamic performance with
a 20 ꢀ snubbing resistor. RSNUB reduces the gain slightly by the
ratio of RLOAD/(RSNUB + RLOAD), a very small loss when used with
high impedance loads, such as ADCs. For other loads, alternate
values of RSNUB can be determined empirically. The data for the
curves in the Typical Performance Characteristics section of this
data sheet are derived using a 20 Ω snubbing resistor.
INPUT
OUTPUT
–20 –10
0
10
20
30
40
50
60
70
80
TIME (ns)
Figure 70. Pulse Response for Two Values of Output Capacitance
with 2.5 V Supplies and No Snubbing Resistor
800
80
600
60
The best way to avoid the effects of stray capacitance is to
exercise care in PC board layout. Locate the passive components
or devices connected to the AD8337 output pins as close as
possible to the package.
400
200
40
20
0
0
Although a nonissue, the preamplifier output is also sensitive
to load capacitance. However, the series connection of RFB1
and RFB2 is typically the only load connected to the preamplifier.
If overshoot appears, it can be mitigated in the same way as the
VGA output, by inserting a snubbing resistor.
–200
–20
–40
–60
–80
INPUT
–400 OUTPUT
–600
C
C
C
= 0pF
= 10pF
= 22pF
L
L
L
WITH 20Ω SNUBBING RESISTOR
–800
–20 –10
0
10
20
30
40
50
60
70
80
GAIN CONTROL CONSIDERATIONS
TIME (ns)
Figure 71. Pulse Response for Two Values of Output Capacitance
with 2.5 V Supplies and a 20 Ω Snubbing Resistor
In typical applications, voltages applied to the GAIN input are dc
or relatively low frequency signals. The high input impedance of
the AD8337 enables several devices to be connected in parallel.
This is useful for arrays of VGAs, such as those used for calibra-
tion adjustments.
800
80
V
= ±5V
S
600
60
400
200
40
Under dc or slowly changing ramp conditions, the gain tracks
the gain control voltage as shown in Figure 3. However, it is
often necessary to consider other effects influenced by the
VGAIN input.
20
0
–200
–400
–600
–800
0
–20
–40
–60
–80
INPUT
OUTPUT
C
= 0pF
L
C = 10pF
L
C
= 22pF
L
WITH NO SNUBBING RESISTOR
–20 –10
0
10
20
30
40
50
60
70
80
TIME (ns)
Figure 72. Large Signal Pulse Response for Two Values of Output
Capacitance with 5 V Supplies and No Snubbing Resistor
Rev. B | Page 21 of 24
AD8337
The offset voltage effect of the AD8337, as with all VGAs, can
appear as a complex waveform when observed across the range
of VGAIN voltage. Generated by multiple sources, each device has
a unique VOS profile while the GAIN input is swept through its
voltage range. The offset voltage profile seen in Figure 15 is a
typical example. If the VGAIN input voltage is modulated, the
output is the product of the VGAIN and the dc profile of the offset
voltage, and it can be observed on a scope as a small ac signal
as shown in Figure 74. In Figure 74, the signal applied to the
Under certain circumstances, the product of VGAIN and the
offset profile plus spikes is a coherent spurious signal within
the signal band of interest and indistinguishable from desired
signals. In general, the slower the ramp applied to the GAIN
pin, the smaller the spikes are. In most applications, these
effects are benign and not an issue.
THERMAL CONSIDERATIONS
The thermal performance of LFCSPs, such as the AD8337,
departs significantly from that of leaded devices such as the
larger TSSOP or QFSP. In larger packages, heat is conducted
away from the die by the path provided by the bond wires and
the device leads. In LFCSPs, the heat transfer mechanisms are
surface-to-air radiation from the top and side surfaces of the
package and conduction through the metal solder pad on the
mounting surface of the device.
VGAIN input is a 1 kHz ramp, and the output voltage signal is
slightly less than 4 mV p-p.
10
V
= ±2.5V
INPUT
OUTPUT
S
8
6
4
2
θJC is the traditional thermal metric found in the data sheets
of integrated circuits. Heat transfer away from the die is a 3-
dimensional dynamic, and the path is through the bond wires,
leads, and the six surfaces of the package. Because of the small
size of LFCSPs, the θJC is not measured conventionally; instead, it
is calculated using thermodynamic rules.
0
–2
–4
–6
–8
–10
The θJC value of the AD8837 listed in Table 2 assumes that the
tab is soldered to the board and that there are three additional
ground layers beneath the device connected by at least four vias.
For a device with an unsoldered pad, the θJC nearly doubles,
becoming 138°C/W.
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
GAIN
Figure 74. Offset Voltage vs. VGAIN for a 1 kHz Ramp
The profile of the waveform shown in Figure 74 is consistent
over a wide range of signals from dc to about 20 kHz. Above
20 kHz, secondary artifacts can be generated due to the effects
of minor internal circuit tolerances, as seen in Figure 75. These
artifacts are caused by settling and time constants of the inter-
polator circuit and appear at the output as the voltage spikes
seen in Figure 75.
PSI (Ψ)
Table 2 lists a subset of the classic theta specification, ΨJT
(Psi junction to top). θJC is the metric of heat transfer from
the die to the case, involving the six outside surfaces of the
package. Ψ(XY) is a subset of the theta value and the thermal
gradient from the junction (die) to each of the six surfaces.
Ψ can be different for each of the surfaces, but since the top of
the package is actually a fraction of a millimeter from the die,
the surface temperature of the package is very close to the die
temperature. The die temperature is calculated as the product
of the power dissipation and ΨJT. Since the top surface tempera-
ture and power dissipation are easily measured, it follows that the
die temperature is easily calculated. For example, for a dissipation
of 180 mW and a ΨJT of 5.3°C/W, the die temperature is slightly
less than 1°C higher than the surface temperature.
10
V
= ±2.5V
INPUT
S
8
6
OUTPUT
4
SPIKE
2
0
–2
–4
–6
–8
–10
SPIKE
BOARD LAYOUT
Because the AD8337 is a high frequency device, board layout
is critical. It is very important to have a good ground plane
connection to the VCOM pin. Coupling through the ground
plane, from the output to the input, can cause peaking at higher
frequencies.
–800
–600
–400
–200
0
200
400
600
800
V
(mV)
GAIN
Figure 75. VOS Profile for a 50 kHz Ramp
Rev. B | Page 22 of 24
AD8337
GND1 GND2 GND3 GND4
+V
–V
S
S
C2
10µF
+
+
C1
10µF
RVO1
VOUT
TP1
453Ω
L2
120nH
L1
120nH
C3
0.1µF
1
2
3
4
8
7
6
5
VOUT
VCOM
VPOS
GAIN
RVO3
0Ω
GAIN
U1
CG
1nF
R1
49.9Ω
AD8337
J1
INPP
INPN
VNEG
PRAO
R4
0Ω
IN
C4
0.1µF
R2
49.9Ω
RFB2
100Ω
RPO2
453Ω
R5
PRAO
RFB1
100Ω
Figure 76. Evaluation Board Schematic—Noninverting Configuration
Figure 77. Evaluation Board—Component Side Copper
Figure 78. Evaluation Board—Wiring Side Copper
Rev. B | Page 23 of 24
AD8337
OUTLINE DIMENSIONS
0.50
0.40
0.30
3.00
BSC SQ
0.60 MAX
8
PIN 1
INDICATOR
1
PIN 1
INDICATOR
1.89
1.74
1.59
2.75
BSC SQ
TOP
VIEW
1.50
REF
EXPOSED
PAD
0.50
BSC
(BOTTOM VIEW)
4
5
1.60
1.45
1.30
0.70 MAX
0.65TYP
12° MAX
0.90 MAX
0.85 NOM
EXPOSED PAD IS NOT CONNECTED INTERNALLY.
FOR INCREASED RELIABILITY OF THE SOLDER
JOINTS AND MAXIMUM THERMAL CAPABILITY IT
IS RECOMMENDED THAT THE PAD BE SOLDERED
TO THE GROUND PLANE.
0.05 MAX
0.01 NOM
SEATING
PLANE
0.30
0.23
0.18
0.20 REF
Figure 79. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-8-2)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option Branding
AD8337BCPZ-R21
AD8337BCPZ-REEL1
AD8337BCPZ-REEL71
AD8337BCPZ-WP1
AD8337-EVALZ1
AD8337-EVAL-INV
AD8337-EVAL-SS
8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
Evaluation Board with Noninverting Gain Configuration
Evaluation Board with Inverting Gain Configuration
Evaluation Board with Single-Supply Operation
CP-8-2
CP-8-2
CP-8-2
CP-8-2
HVB
HVB
HVB
HVB
1 Z = Pb-free part.
©2005-2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05575-0-2/07(B)
Rev. B | Page 24 of 24
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