AD8620AR-REEL7 [ADI]
Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifier; 精密，极低噪声，低输入偏置电流，宽带宽JFET运算放大器
| 型号： | AD8620AR-REEL7 |
| 厂家： | 
ADI |
| 描述： | Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifier |
| 文件： | 总20页 (文件大小：400K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Precision, Very Low Noise,
Low Input Bias Current, Wide Bandwidth
JFET Operational Amplifier
AD8610/AD8620
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
Low Noise 6 nV/√Hz
Low Offset Voltage: 100 V Max
Low Input Bias Current 10 pA Max
Fast Settling: 600 ns to 0.01%
Low Distortion
8-Lead MSOP and SOIC
(RM-8 and R-8 Suffixes)
1
8
NULL
؊IN
؉IN
V؊
NC
V؉
OUT
NULL
AD8610
Unity Gain Stable
4
5
No Phase Reversal
Dual-Supply Operation: ؎5 V to ؎13 V
NC = NO CONNECT
8-Lead SOIC
(R-8 Suffix)
APPLICATIONS
Photodiode Amplifier
ATE
1
8
OUTA
؊INA
؉INA
V؊
V؉
OUTB
؊INB
؉INB
Instrumentation
AD8620
Sensors and Controls
High Performance Filters
Fast Precision Integrators
High Performance Audio
4
5
GENERAL DESCRIPTION
AD8610/AD8620 is an ideal amplifier for driving high performance
A/D inputs and buffering D/A converter outputs.
The AD8610/AD8620 is a very high precision JFET input amplifier
featuring ultralow offset voltage and drift, very low input voltage
and current noise, very low input bias current, and wide bandwidth.
Unlike many JFET amplifiers, the AD8610/AD8620 input bias
current is low over the entire operating temperature range. The
AD8610/AD8620 is stable with capacitive loads of over 1000 pF
in noninverting unity gain; much larger capacitive loads can be
driven easily at higher noise gains. The AD8610/AD8620 swings to
within 1.2 V of the supplies even with a 1 kΩ load, maximizing
dynamic range even with limited supply voltages. Outputs slew at
50 V/µs in either inverting or noninverting gain configurations, and
settle to 0.01% accuracy in less than 600 ns. Combined with the
high input impedance, great precision, and very high output drive, the
Applications for the AD8610/AD8620 include electronic instru-
ments; ATE amplification, buffering, and integrator circuits;
CAT/MRI/ultrasound medical instrumentation; instrumentation
quality photodiode amplification; fast precision filters (including
PLL filters); and high quality audio.
The AD8610/AD8620 is fully specified over the extended
industrial (–40°C to +125°C) temperature range. The AD8610
is available in the narrow 8-lead SOIC and the tiny MSOP8
surface-mount packages. The AD8620 is available in the narrow
8-lead SOIC package. MSOP8 packaged devices are available
only in tape and reel.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
(@ V = ؎5.0 V, VCM = 0 V, TA = 25؇C, unless otherwise noted.)
AD8610/AD8620–SPECIFICATIONS
S
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage (AD8610B)
VOS
VOS
VOS
45
80
45
80
85
90
150
+2
+130
+1.5
+1
100
200
150
300
250
350
850
+10
+250
+2.5
+10
+75
+150
+3
µV
–40°C < TA < +125°C
–40°C < TA < +125°C
µV
Offset Voltage (AD8620B)
µV
µV
Offset Voltage (AD8610A/AD8620A)
µV
+25°C < TA < 125°C
–40°C < TA < +125°C
µV
µV
Input Bias Current
Input Offset Current
IB
–10
–250
–2.5
–10
–75
–150
–2
pA
–40°C < TA < +85°C
–40°C < TA < +125°C
pA
nA
pA
pA
pA
V
IOS
–40°C < TA < +85°C
–40°C < TA < +125°C
+20
+40
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift (AD8610B)
Offset Voltage Drift (AD8620B)
Offset Voltage Drift (AD8610A/AD8620A)
CMRR
AVO
∆VOS/∆T
∆VOS/∆T
∆VOS/∆T
VCM = –2.5 V to +1.5 V
RL = 1 kΩ, VO = –3 V to +3 V
–40°C < TA < +125°C
–40°C < TA < +125°C
–40°C < TA < +125°C
90
100
95
dB
180
0.5
0.5
0.8
V/mV
µV/°C
µV/°C
µV/°C
1
1.5
3.5
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
VOH
VOL
IOUT
RL = 1 kΩ, –40°C < TA < +125°C
RL = 1 kΩ, –40°C < TA < +125°C
3.8
100
40
4
–4
30
V
V
mA
–3.8
Output Current
VOUT
>
2 V
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 5 V to 13 V
VO = 0 V
–40°C < TA < +125°C
110
2.5
3.0
dB
mA
mA
3.0
3.5
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time
SR
GBP
tS
RL = 2 kΩ
50
25
350
V/µs
MHz
ns
AV = +1, 4 V Step, to 0.01%
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Input Capacitance
Differential
Common-Mode
Channel Separation
f = 10 kHz
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
1.8
6
5
µV p-p
nV/
√
Hz
fA/√
Hz
CIN
8
15
pF
pF
CS
137
120
dB
dB
f = 300 kHz
Specifications subject to change without notice.
–2–
REV. D
AD8610/AD8620
ELECTRICAL SPECIFICATIONS (@ VS = ؎13 V, VCM = 0 V, TA = 25؇C, unless otherwise noted.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage (AD8610B)
VOS
VOS
VOS
45
80
45
80
85
90
150
+3
+130
100
200
150
300
250
350
850
+10
+250
+3.5
+10
+75
+150
+10.5
µV
–40°C < TA < +125°C
–40°C < TA < +125°C
µV
Offset Voltage (AD8620B)
µV
µV
Offset Voltage (AD8610A/AD8620A)
µV
+25°C < TA < 125°C
–40°C < TA < +125°C
µV
µV
Input Bias Current
Input Offset Current
IB
–10
pA
–40°C < TA < +85°C
–40°C < TA < +125°C
–250
–3.5
–10
pA
nA
pA
pA
pA
V
dB
V/mV
µV/°C
µV/°C
µV/°C
IOS
+1.5
+20
+40
–40°C < TA < +85°C
–40°C < TA < +125°C
–75
–150
–10.5
90
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift (AD8610B)
Offset Voltage Drift (AD8620B)
CMRR
AVO
∆VOS/∆T
∆VOS/∆T
VCM = –10 V to +10 V
RL = 1 kΩ, VO = –10 V to +10 V
–40°C < TA < +125°C
–40°C < TA < +125°C
–40°C < TA < +125°C
110
200
0.5
0.5
0.8
100
1
1.5
3.5
Offset Voltage Drift (AD8610A/AD8620A) ∆VOS/∆T
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Current
VOH
VOL
IOUT
ISC
RL = 1 kΩ, –40°C < TA < +125°C
RL = 1 kΩ, –40°C < TA < +125°C
VOUT > 10 V
+11.75 +11.84
V
V
mA
mA
–11.84 –11.75
45
65
Short Circuit Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 5 V to 13 V
VO = 0 V
–40°C < TA < +125°C
100
40
110
3.0
3.5
dB
mA
mA
3.5
4.0
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time
SR
GBP
tS
RL = 2 kΩ
60
25
600
V/µs
MHz
ns
AV = 1, 10 V Step, to 0.01%
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Input Capacitance
Differential
Common-Mode
Channel Separation
f = 10 kHz
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
1.8
6
5
µV p-p
nV/
√
Hz
fA/√
Hz
CIN
8
15
pF
pF
CS
137
120
dB
dB
f = 300 kHz
Specifications subject to change without notice.
REV. D
–3–
AD8610/AD8620
ABSOLUTE MAXIMUM RATINGS*
Package Type
JA*
Unit
JC
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27.3 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS–– to VS+
Differential Input Voltage . . . . . . . . . . . . . . . Supply Voltage
Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite
Storage Temperature Range
8-Lead MSOP (RM)
8-Lead SOIC (RN)
190
158
44
43
°C/W
°C/W
*θJA is specified for worst-case conditions; i.e., θJA is specified for a device
soldered in circuit board for surface-mount packages.
R, RM Packages . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
AD8610/AD8620 . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
Junction Temperature Range
R, RM Packages . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 10 sec) . . . . . . . . 300°C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option
Model
Branding
AD8610AR
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
RN-8
RN-8
RN-8
AD8610AR-REEL
AD8610AR-REEL7
AD8610ARM-REEL
AD8610ARM-R2
AD8610ARZ*
AD8610ARZ-REEL*
AD8610ARZ-REEL7* –40°C to +125°C 8-Lead SOIC
AD8610BR
AD8610BR-REEL
AD8610BR-REEL7
AD8610BRZ*
AD8610BRZ-REEL*
AD8610BRZ-REEL7* –40°C to +125°C 8-Lead SOIC
AD8620AR
–40°C to +125°C 8-Lead MSOP RM-8
B0A
B0A
–40°C to +125°C 8-Lead MSOP RM-8
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
RN-8
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
–40°C to +125°C 8-Lead SOIC
AD8620AR-REEL
AD8620AR-REEL7
AD8620BR
AD8620BR-REEL
AD8620BR-REEL7
*Pb-free part
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD8610/AD8620 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
–4–
REV. D
Typical Performance Characteristics–AD8610/AD8620
14
12
10
8
600
18
16
14
12
10
8
V
= ؎5V
S
V
= ؎13V
V
= ؎13V
S
S
400
200
0
6
؊200
؊400
6
4
4
2
2
؊600
0
0
25
85
125
؊40
؊250 ؊150
INPUT OFFSETVOLTAGE – V
؊50
50
150
250
؊250 ؊150
؊50
50
150
250
TEMPERATURE – ؇C
INPUT OFFSETVOLTAGE – V
TPC 1. Input Offset Voltage at 13 V
TPC 2. Input Offset Voltage vs.
TPC 3. Input Offset Voltage at 5 V
Temperature at 13 V (300 Amplifiers)
3.6
600
14
V = ؎13V
S
V
S
= ؎5V OR ؎13V
V
= ؎5V
S
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
12
10
8
400
200
0
6
–200
–400
–600
4
2
0
–40
25
85
125
0
5
10
؊10
؊5
COMMON-MODEVOLTAGE –V
0
0.2
0.6
1.0
1.4
– V/؇C
1.8
2.2
2.6
TEMPERATURE – ؇C
T V
C OS
TPC 4. Input Offset Voltage vs.
Temperature at 5 V (300 Amplifiers)
TPC 5. Input Offset Voltage Drift
TPC 6. Input Bias Current vs.
Common-Mode Voltage
3.05
3.0
2.5
2.0
1.5
1.0
0.5
0
2.65
2.60
2.55
2.50
2.45
2.40
2.35
2.30
V
= ؎13V
V
= ؎5V
S
S
2.95
2.85
2.75
2.65
2.55
0
1
2
3
4
5
6
7
8
9
10 11 12 13
25
85
125
؊40
25
85
125
؊40
SUPPLYVOLTAGE – ؎V
TEMPERATURE – ؇C
TEMPERATURE – ؇C
TPC 8. Supply Current vs.
Temperature at 13 V
TPC 7. Supply Current vs.
Supply Voltage
TPC 9. Supply Current vs.
Temperature at 5 V
REV. D
–5–
AD8610/AD8620
1.8
4.25
4.20
4.15
4.10
4.05
4.00
3.95
؊3.95
؊4.00
؊4.05
؊4.10
؊4.15
؊4.20
؊4.25
؊4.30
V
R
= ؎5V
= 1k⍀
S
V
= ؎13V
V
R
= ؎5V
= 1k⍀
S
S
1.6
L
L
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
25
85
125
100
1k
10k
100k
1M
10M 100M
؊40
25
85
125
؊40
TEMPERATURE – ؇C
TEMPERATURE – ؇C
RESISTANCE LOAD –⍀
TPC 12. Output Voltage Low vs.
Temperature at 5 V
TPC 10. Output Voltage to
Supply Rail vs. Load
TPC 11. Output Voltage High vs.
Temperature at 5 V
120
100
80
12.05
12.00
11.95
270
225
180
135
90
؊11.80
؊11.85
؊11.90
؊11.95
؊12.00
؊12.05
V
R
= ؎13V
= 1k⍀
V
R
= ؎13V
= 1k⍀
S
S
V
R
= ؎13V
= 1k⍀
S
L
L
L
MARKER AT 27MHz
M
= 69.5
= 20pF
C
60
L
40
20
45
11.90
0
0
؊20
؊40
؊60
؊80
؊45
؊90
؊135
؊180
11.85
11.80
25
85
125
؊40
10
1
100 200
25
85
125
؊40
TEMPERATURE – ؇C
FREQUENCY – MHz
TEMPERATURE – ؇C
TPC 13. Output Voltage High
vs. Temperature at 13 V
TPC 15. Open-Loop Gain
and Phase vs. Frequency
TPC 14. Output Voltage Low vs.
Temperature at 13 V
60
190
180
170
160
150
140
130
120
110
100
260
V
R
C
= ؎13V
= 2k⍀
= 20pF
S
V
V
R
= ؎13V
= ؎10V
= 1k⍀
S
V
V
R
= ؎5V
= ؎3V
= 1k⍀
S
L
L
240
220
O
O
40
20
L
L
G = 100
G = 10
G = 1
200
180
0
160
140
120
100
؊20
؊40
25
85
125
25
85
125
؊40
؊40
1k
10k
100k
1M
10M
100M
TEMPERATURE – ؇C
FREQUENCY – Hz
TEMPERATURE – ؇C
TPC 16. Closed-Loop Gain vs.
Frequency
TPC 17. AVO vs. Temperature at 13 V
TPC 18. AVO vs. Temperature at 5 V
–6–
REV. D
AD8610/AD8620
160
140
120
160
140
122
121
V
S
= ؎13V
V = ؎5V
S
120
100
80
60
40
20
0
100
80
60
40
20
0
+PSRR
120
119
118
117
116
+PSRR
–PSRR
–PSRR
–20
–40
–20
–40
100
1k
10k
100k
1M
10M
60M
100
1k
10k
100k
1M
10M 60M
؊40
125
25
85
FREQUENCY – Hz
FREQUENCY – Hz
TEMPERATURE – ؇C
TPC 19. PSRR vs. Frequency at 13 V
TPC 21. PSRR vs. Temperature
TPC 20. PSRR vs. Frequency at 5 V
140
V
= ؎13V
= 300mV p-p
= ؊100
= 10k⍀
= 0pF
S
V
S
= ؎13V
V
= ؎13V
= ؊300mV p-p
= ؊100
S
V
IN
120
100
80
V
IN
A
R
C
V
L
L
A
R
V
L
= 10k⍀
V
IN
0V
0V
0V
0V
V
60
IN
V
OUT
40
CH = 5V/DIV
2
V
OUT
20
0
CH = 5V/DIV
2
10
100
1k
10k 100k 1M 10M 60M
TIME – 4s/DIV
TIME – 4s/DIV
FREQUENCY – Hz
TPC 22. CMRR vs. Frequency
TPC 24. Negative Overvoltage
Recovery
TPC 23. Positive Overvoltage Recovery
100
1,000
V = ؎13V
S
V
SY
= ؎13V
V
V
= ؎13V
p-p = 1.8V
S
90
80
70
60
50
40
30
20
10
0
IN
100
10
1
GAIN = 1
GAIN = 10
GAIN = 100
TIME – 1s/DIV
1
10
100
1k
10k
100k
1M
1k
10k
100k
1M
10M
100M
FREQUENCY – Hz
FREQUENCY – Hz
TPC 25. 0.1 Hz to 10 Hz Input Voltage
Noise
TPC 26. Input Voltage Noise vs.
Frequency
TPC 27. ZOUT vs. Frequency
REV. D
–7–
AD8610/AD8620
100
90
80
70
60
50
40
40
35
30
25
20
15
10
5
3000
2500
2000
1500
1000
500
V
= ؎5V
V
S
= ؎13V
S
R
L
= 2k⍀
V
IN
= 100mV p-p
GAIN = 1
GAIN = 10
+OS
؊OS
30
20
10
0
GAIN = 100
0
0
0
25
85
125
1
10
100
CAPACITANCE – pF
1k
10k
1k
10k
100k
1M
10M
100M
TEMPERATURE – ؇C
FREQUENCY – Hz
TPC 29. Input Bias Current vs.
Temperature
TPC 28. ZOUT vs. Frequency
TPC 30. Small Signal Overshoot vs.
Load Capacitance
40
35
30
25
20
15
10
5
V
= ؎13V
= ؎14V
= +1
S
V
R
= ؎5V
= 2k⍀
= 100mV
S
V
IN
L
A
V
V
IN
FREQ = 0.5kHz
V
IN
+OS
؊OS
V
= ؎13V
p-p = 20V
= +1
= 2k⍀
= 20pF
V
OUT
S
V
IN
A
R
C
V
L
L
0
TIME – 400s/DIV
1
10
100
CAPACITANCE – pF
1k
10k
TIME – 1s/DIV
TPC 32. No Phase Reversal
TPC 33. Large Signal Response at
G = +1
TPC 31. Small Signal Overshoot vs.
Load Capacitance
V
= ؎13V
p-p = 20V
= +1
= 2k⍀
= 20pF
S
V
V
A
R
C
= ؎13V
p-p = 20V
= ؊1
= 2k⍀
= 20pF
V
V
A
R
C
= ؎13V
p-p = 20V
= +1
= 2k⍀
= 20pF
S
S
V
IN
IN
IN
A
R
C
V
L
L
V
L
L
V
L
L
TIME – 400ns/DIV
TIME – 400ns/DIV
TIME – 1s/DIV
TPC 35. –SR at G = +1
TPC 34. +SR at G = +1
TPC 36. Large Signal Response at G = –1
–8–
REV. D
AD8610/AD8620
V
= ؎13V
p-p = 20V
= ؊1
S
V
IN
A
V
R
L
= 2k⍀
SR = 50V/s
= 20pF
C
L
V
= ؎13V
p-p = 20V
= ؊1
S
V
IN
A
V
R
L
= 2k⍀
SR = 55V/s
= 20pF
C
L
TIME – 400ns/DIV
TIME – 400ns/DIV
TPC 37. +SR at G = –1
TPC 38. –SR at G = –1
CS(dB) = 20 log (V
3
/10
؋
V )
IN
138
136
134
132
130
128
126
124
122
120
OUT
R1
+13V
20k⍀
R2
U1
V+
V–
V+
+
6
7
V
2k⍀
IN
20V p-p
2
V–
5
0
0
2k⍀
2k⍀
–
R4
U2
0
–13V
0
0
Figure 1. Channel Separation Test Circuit
FUNCTIONAL DESCRIPTION
The AD8610/AD8620 is manufactured on Analog Devices, Inc.’s
proprietary XFCB (eXtra Fast Complementary Bipolar) process.
XFCB is fully dielectrically isolated (DI) and used in conjunc-
tion with N-channel JFET technology and trimmable thin-film
resistors to create the world’s most precise JFET input amplifier.
Dielectrically isolated NPN and PNP transistors fabricated on
XFCB have FT greater than 3 GHz. Low TC thin film resistors
enable very accurate offset voltage and offset voltage tempco
trimming. These process breakthroughs allowed Analog Devices’
world class IC designers to create an amplifier with faster slew
rate and more than 50% higher bandwidth at half of the current
consumed by its closest competition. The AD8610 is uncondi-
tionally stable in all gains, even with capacitive loads well in
excess of 1 nF. The AD8610B achieves less than 100 µV of offset
and 1 µV/°C of offset drift, numbers usually associated with very
high precision bipolar input amplifiers. The AD8610 is offered in
the tiny 8-lead MSOP as well as narrow 8-lead SOIC surface-
mount packages and is fully specified with supply voltages from
5 V to 13 V. The very wide specified temperature range, up to
125°C, guarantees superior operation in systems with little or no
active cooling.
50
100
300
0
150
200
250
350
FREQUENCY – kHz
Figure 2. AD8620 Channel Separation Graph
Power Consumption
A major advantage of the AD8610/AD8620 in new designs is
the saving of power. Lower power consumption of the AD8610
makes it much more attractive for portable instrumentation and
for high-density systems, simplifying thermal management, and
reducing power supply performance requirements. Compare the
power consumption of the AD8610/AD8620 versus the OPA627
in Figure 3.
8
7
OPA627
6
5
4
The unique input architecture of the AD8610 features extremely
low input bias currents and very low input offset voltage. Low
power consumption minimizes the die temperature and maintains
the very low input bias current. Unlike many competitive JFET
amplifiers, the AD8610/AD8620 input bias currents are low even
at elevated temperatures. Typical bias currents are less than 200 pA
at 85°C. The gate current of a JFET doubles every 10°C resulting
in a similar increase in input bias current over temperature.
Special care should be given to the PC board layout to minimize
leakage currents between PCB traces. Improper layout and
board handling generates leakage current that exceeds the bias
current of the AD8610/AD8620.
3
AD8610
2
–75
–50
–25
0
25
50
75
100
125
TEMPERATURE – ؇C
Figure 3. Supply Current vs. Temperature
REV. D
–9–
AD8610/AD8620
Driving Large Capacitive Loads
The AD8610 has excellent capacitive load driving capability and
can safely drive up to 10 nF when operating with 5 V supply.
Figures 4 and 5 compare the AD8610/AD8620 against the OPA627
in the noninverting gain configuration driving a 10 kΩ resistor and
10,000 pF capacitor placed in parallel on its output, with a square
wave input set to a frequency of 200 kHz. The AD8610 has much
less ringing than the OPA627 with heavy capacitive loads.
+5V
7
3
2
V
IN
= 50mV
4
2F
–5V
2k⍀
2k⍀
Figure 6. Capacitive Load Drive Test Circuit
V
R
C
= ؎5V
= 10k⍀
= 10,000pF
S
L
L
V
R
C
= ؎5V
= 10k⍀
= 2F
S
L
L
TIME – 2s/DIV
TIME – 20s/DIV
Figure 4. OPA627 Driving CL = 10,000 pF
Figure 7. OPA627 Capacitive Load Drive, AV = +2
V
R
C
= ؎5V
S
L
L
V
R
C
= ؎5V
= 10k⍀
= 2F
S
= 10k⍀
= 10,000pF
L
L
TIME – 2s/DIV
TIME – 20s/DIV
Figure 5. AD8610/AD8620 Driving CL = 10,000 pF
Figure 8. AD8610/AD8620 Capacitive Load Drive, AV = +2
The AD8610/AD8620 can drive much larger capacitances without
any external compensation. Although the AD8610/AD8620 is stable
with very large capacitive loads, remember that this capacitive
loading will limit the bandwidth of the amplifier. Heavy capacitive
loads will also increase the amount of overshoot and ringing at the
output. Figures 7 and 8 show the AD8610/AD8620 and the OPA627
in a noninverting gain of +2 driving 2 µF of capacitance load. The
ringing on the OPA627 is much larger in magnitude and continues
more than 10 times longer than the AD8610.
Slew Rate (Unity Gain Inverting vs. Noninverting)
Amplifiers generally have a faster slew rate in an inverting unity
gain configuration due to the absence of the differential input
capacitance. Figures 9 through 12 show the performance of the
AD8610 configured in a gain of –1 compared to the OPA627.
The AD8610 slew rate is more symmetrical, and both the positive
and negative transitions are much cleaner than in the OPA627.
–10–
REV. D
AD8610/AD8620
V
R
= ؎13V
= 2k⍀
V
R
= ؎13V
= 2k⍀
S
S
L
L
G = –1
G = –1
SR = 56V/s
SR = 54V/s
TIME – 400ns/DIV
TIME – 400ns/DIV
Figure 12. (–SR) of OPA627 in Unity Gain of –1
Figure 9. (+SR) of AD8610/AD8620 in Unity Gain of –1
The AD8610 has a very fast slew rate of 60 V/µs even when config-
ured in a noninverting gain of +1. This is the toughest condition to
impose on any amplifier since the input common-mode capacitance
of the amplifier generally makes its SR appear worse. The slew
rate of an amplifier varies according to the voltage difference
between its two inputs. To observe the maximum SR as specified
in the AD8610 data sheet, a difference voltage of about 2 V between
the inputs must be ensured. This will be required for virtually any
JFET op amp so that one side of the op amp input circuit is com-
pletely off, maximizing the current available to charge and discharge
the internal compensation capacitance. Lower differential
drive voltages will produce lower slew rate readings. A JFET-
input op amp with a slew rate of 60 V/µs at unity gain with
VIN = 10 V might slew at 20 V/µs if it is operated at a gain of
+100 with VIN = 100 mV.
V
R
= ؎13V
= 2k⍀
S
L
G = –1
SR = 42.1V/s
TIME – 400ns/DIV
The slew rate of the AD8610/AD8620 is double that of the OPA627
when configured in a unity gain of +1 (see Figures 13 and 14).
Figure 10. (+SR) of OPA627 in Unity Gain of –1
V
R
= ؎13V
= 2k⍀
S
V
R
= ؎13V
= 2k⍀
L
S
G = –1
L
G = +1
SR = 54V/s
SR = 85V/s
TIME – 400ns/DIV
TIME – 400ns/DIV
Figure 11. (–SR) of AD8610/AD8620 in Unity Gain of –1
Figure 13. (+SR) of AD8610/AD8620 in Unity Gain of +1
REV. D
–11–
AD8610/AD8620
diodes greatly interfere with many application circuits such as
precision rectifiers and comparators. The AD8610 is free from
these limitations.
V
R
= ؎13V
= 2k⍀
S
L
G = +1
+13V
3
7
6
V1
2
SR = 23V/s
4
AD8610
14V
–13V
0
Figure 16. Unity Gain Follower
No Phase Reversal
Many amplifiers misbehave when one or both of the inputs are
forced beyond the input common-mode voltage range. Phase
reversal is typified by the transfer function of the amplifier,
effectively reversing its transfer polarity. In some cases, this can
cause lockup and even equipment damage in servo systems, and
may cause permanent damage or nonrecoverable parameter
shifts to the amplifier itself. Many amplifiers feature compensation
circuitry to combat these effects, but some are only effective for
the inverting input. The AD8610/AD8620 is designed to prevent
phase reversal when one or both inputs are forced beyond their
input common-mode voltage range.
TIME – 400ns/DIV
Figure 14. (+SR) of OPA627 in Unity Gain of +1
The slew rate of an amplifier determines the maximum frequency
at which it can respond to a large signal input. This frequency
(known as full-power bandwidth, or FPBW) can be calculated
from the equation:
SR
FPBW =
2π ×V
(
)
PEAK
for a given distortion (e.g., 1%).
V
IN
CH = 20.8V
1
p-p
0V
CH = 19.4V
2
p-p
V
OUT
0V
0
TIME – 400s/DIV
Figure 17. No Phase Reversal
THD Readings vs. Common-Mode Voltage
Total harmonic distortion of the AD8610/AD8620 is well below
0.0006% with any load down to 600 Ω. The AD8610/AD8620
outperforms the OPA627 for distortion, especially at frequen-
cies above 20 kHz.
TIME – 400ns/DIV
Figure 15. AD8610 FPBW
Input Overvoltage Protection
When the input of an amplifier is driven below VEE or above VCC
by more than one VBE, large currents will flow from the substrate
through the negative supply (V–) or the positive supply (V+),
respectively, to the input pins, which can destroy the device. If the
input source can deliver larger currents than the maximum forward
current of the diode (>5 mA), a series resistor can be added to
protect the inputs. With its very low input bias and offset current, a
large series resistor can be placed in front of the AD8610 inputs to
limit current to below damaging levels. Series resistance of 10 kΩ
will generate less than 25 µV of offset. This 10 kΩ will allow input
voltages more than 5 V beyond either power supply. Thermal noise
generated by the resistor will add 7.5 nV/√Hz to the noise of the
AD8610. For the AD8610/AD8620, differential voltages equal to
the supply voltage will not cause any problem (see Figure 15).
In this context, it should also be noted that the high breakdown
voltage of the input FETs eliminates the need to include clamp
diodes between the inputs of the amplifier, a practice that is
mandatory on many precision op amps. Unfortunately, clamp
0.1
V
= ؎13V
= 5V rms
SY
V
IN
BW = 80kHz
0.01
OPA627
AD8610
0.001
0.0001
10
100
1k
10k
80k
FREQUENCY – Hz
Figure 18. AD8610 vs. OPA627 THD + Noise @ VCM = 0 V
REV. D
–12–
AD8610/AD8620
0.1
1.2k
1.0k
800
600
400
200
0
V
R
= ؎13V
= 600⍀
SY
L
2V rms
0.01
4V rms
6V rms
OPA627
0.001
10
100
1k
FREQUENCY – Hz
10k 20k
0.001
0.01
0.1
1
10
ERROR BAND – %
Figure 21. OPA627 Settling Time vs. Error Band
Figure 19. THD + Noise vs. Frequency
The AD8610/AD8620 maintains this fast settling when loaded
with large capacitive loads as shown in Figure 22.
Noise vs. Common-Mode Voltage
AD8610 noise density varies only 10% over the input range as
shown in Table I.
3.0
ERROR BAND ؎0.01%
Table I. Noise vs. Common-Mode Voltage
2.5
2.0
1.5
1.0
0.5
0.0
VCM at F = 1 kHz (V)
Noise Reading (nV/√Hz)
–10
–5
0
+5
+10
7.21
6.89
6.73
6.41
7.21
Settling Time
The AD8610 has a very fast settling time, even to a very tight error
band, as can be seen from Figure 20. The AD8610 is configured
in an inverting gain of +1 with 2 kΩ input and feedback resistors.
The output is monitored with a 10 ×, 10 M, 11.2 pF scope probe.
0
500
1000
– pF
1500
2000
C
L
Figure 22. AD8610 Settling Time vs. Load Capacitance
1.2k
1.0k
800
600
400
3.0
ERROR BAND ؎0.01%
2.5
2.0
1.5
1.0
0.5
0.0
200
0
0.01
0.1
1
10
0.001
ERROR BAND – %
0
500
1000
– pF
1500
2000
Figure 20. AD8610 Settling Time vs. Error Band
C
L
Figure 23. OPA627 Settling Time vs. Load Capacitance
Output Current Capability
The AD8610 can drive very heavy loads due to its high output
current. It is capable of sourcing or sinking 45 mA at 10 V output.
The short circuit current is quite high and the part is capable of
sinking about 95 mA and sourcing over 60 mA while operating with
REV. D
–13–
AD8610/AD8620
supplies of 5 V. Figures 24 and 25 compare the load current
versus output voltage of AD8610/AD8620 and OPA627.
Programmable Gain Amplifier (PGA)
The combination of low noise, low input bias current, low input
offset voltage, and low temperature drift make the AD8610 a
perfect solution for programmable gain amplifiers. PGAs are often
used immediately after sensors to increase the dynamic range of
the measurement circuit. Historically, the large ON resistance of
switches, combined with the large IB currents of amplifiers,
created a large dc offset in PGAs. Recent and improved monolithic
switches and amplifiers completely remove these problems. A PGA
discrete circuit is shown in Figure 27. In Figure 27, when the 10 pA
bias current of the AD8610 is dropped across the (<5 Ω) RON of
the switch, it results in a negligible offset error.
10
1
V
EE
V
CC
When high precision resistors are used, as in the circuit of Figure 27,
the error introduced by the PGA is within the 1/2 LSB requirement
for a 16-bit system.
0.1
0.00001
+5V
0.0001
0.001
0.01
0.1
1
LOAD CURRENT – A
Figure 24. AD8610 Dropout from 13 V vs. Load Current
V
IN
100⍀
10
AD8610
V
OUT
U10
5
10k⍀
V
CC
5pF
–5V
V
EE
+5V +5V
1
12
13
V
L
V
DD
1k⍀
S1
D1
3
2
G = 1
1
16
9
IN1
IN2
IN3
IN4
10k⍀
ADG452
S2 14
G
Y0
Y1
Y2
Y3
G = 10
0.1
0.00001
1k⍀
100⍀
11⍀
D2 15
S3 11
A
B
0.0001
0.001
LOAD CURRENT – A
0.01
0.1
1
A0
A1
74HC139
G = 100
Figure 25. OPA627 Dropout from 15 V vs. Load Current
D3 10
Although operating conditions imposed on the AD8610 ( 13 V)
are less favorable than the OPA627 ( 15 V), it can be seen that the
AD8610 has much better drive capability (lower headroom to the
supply) for a given load current.
S4
6
8
G = 1000
D4
7
V
SS
GND
5
4
Operating with Supplies Greater than 13 V
–5V
The AD8610 maximum operating voltage is specified at 13 V.
When 13 V is not readily available, an inexpensive LDO can
provide 12 V from a nominal 15 V supply.
Figure 27. High Precision PGA
1. Room temperature error calculation due to RON and IB:
Input Offset Voltage Adjustment
∆VOS = IB × RON = 2pA× 5 Ω = 10pV
Total Offset = AD8610(Offset) + ∆VOS
Total Offset = AD8610(Offset _Trimmed) + ∆VOS
Total Offset = 5 µV+10pV ≅ 5 µV
Offset of AD8610 is very small and normally does not require
additional offset adjustment. However, the offset adjust pins can
be used as shown in Figure 26 to further reduce the dc offset. By
using resistors in the range of 50 kΩ, offset trim range is 3.3 mV.
+V
S
2. Full temperature error calculation due to RON and IB:
7
2
3
∆VOS
(
@
85°C) = IB (
@
85°C) × RON
(@ 85°C) =
6
V
OUT
AD8610
250 pA × 15 Ω = 3.75 nV
1
3. Temperature coefficient of switch and AD8610/AD8620
combined is essentially the same as the TCVOS of the AD8610:
5
R1
4
∆VOS /∆T(total) = ∆VOS /∆T(AD8610) + ∆VOS /∆T(IB × RON
∆VOS /∆T(total) = 0.5 µ V/ °C+ 0.06 nV/ °C ≅ 0.5 µ V/ °C
)
–V
S
Figure 26. Offset Voltage Nulling Circuit
–14–
REV. D
AD8610/AD8620
In active filter applications using operational amplifiers, the
dc accuracy of the amplifier is critical to optimal filter performance.
The amplifier’s offset voltage and bias current contribute to output
error. Input offset voltage is passed by the filter, and may be
amplified to produce excessive output offset. For low frequency
applications requiring large value input resistors, bias and offset
currents flowing through these resistors will also generate an
offset voltage.
High Speed Instrumentation Amplifier (IN AMP)
The three op amp instrumentation amplifiers shown in Figure 28
can provide a range of gains from unity up to 1,000 or higher. The
instrumentation amplifier configuration features high common-
mode rejection, balanced differential inputs, and stable, accurately
defined gain. Low input bias currents and fast settling are achieved
with the JFET input AD8610/AD8620. Most instrumentation
amplifiers cannot match the high frequency performance of this
circuit. The circuit bandwidth is 25 MHz at a gain of 1, and close
to 5 MHz at a gain of 10. Settling time for the entire circuit is
550 ns to 0.01% for a 10 V step (gain = 10). Note that the resistors
around the input pins need to be small enough in value so that
the RC time constant they form in combination with stray circuit
capacitance does not reduce circuit bandwidth.
At higher frequencies, an amplifier’s dynamic response must be
carefully considered. In this case, slew rate, bandwidth, and open-
loop gain play a major role in amplifier selection. The slew rate
must be both fast and symmetrical to minimize distortion. The
amplifier’s bandwidth, in conjunction with the filter’s gain, will
dictate the frequency response of the filter. The use of a high perfor-
mance amplifier such as the AD8610/AD8620 will minimize both
dc and ac errors in all active filter applications.
V+
V
IN1
Second-Order Low-Pass Filter
Figure 29 shows the AD8610 configured as a second-order
Butterworth low-pass filter. With the values as shown, the corner
frequency of the filter will be 1 MHz. The wide bandwidth of
the AD8610/AD8620 allows a corner frequency up to tens of
megaHertz. The following equations can be used for component
selection:
1/2 AD8620
U1
V–
C5
10pF
V+
R1 = R2 = User Selected Typical Values:10 kΩ −100 kΩ
(
)
R1 1k⍀
1.414
C1 =
C2 =
V
OUT
R4 2k⍀
2π f
R1
(
)( CUTOFF )(
)
C4
15pF
R7
2k⍀
AD8610
U2
0.707
R6
2k⍀
2π
f
R1
(
)( CUTOFF )(
)
RG
V–
R8 2k⍀
where C1 and C2 are in farads.
R5 2k⍀
C1
22pF
C3
15pF
V
IN2
1/2 AD8620
+13V
U
1
V
IN
R2 1k⍀
5
V
OUT
R2
10k⍀
R1
10k⍀
AD8610
C2
10pF
U1
C2
11pF
Figure 28. High Speed Instrumentation Amplifier
High Speed Filters
–13V
The four most popular configurations are Butterworth, Elliptical,
Bessel, and Chebyshev. Each type has a response that is optimized
for a given characteristic as shown in Table II.
Figure 29. Second-Order Low-Pass Filter
Table II. Filter Types
Type
Sensitivity
Overshoot
Phase
Nonlinear
Linear
Amplitude (Pass Band)
Butterworth
Chebyshev
Elliptical
Moderate
Good
Best
Good
Moderate
Poor
Max Flat
Equal Ripple
Equal Ripple
Bessel (Thompson)
Poor
Best
REV. D
–15–
AD8610/AD8620
High Speed, Low Noise Differential Driver
U2
3
2
The AD8620 is a perfect candidate as a low noise differential
driver for many popular ADCs. There are also other applications,
such as balanced lines, that require differential drivers. The circuit
of Figure 30 is a unique line driver widely used in industrial applica-
tions. With 13 V supplies, the line driver can deliver a differential
signal of 23 V p-p into a 1 kΩ load. The high slew rate and wide
bandwidth of the AD8620 combine to yield a full power bandwidth
of 145 kHz while the low noise front end produces a referred-to-
input noise voltage spectral density of 6 nV/√Hz. The design is a
transformerless, balanced transmission system where output
common-mode rejection of noise is of paramount importance.
Like the transformer-based design, either output can be shorted
to ground for unbalanced line driver applications without changing
the circuit gain of 1. This allows the design to be easily set to
noninverting, inverting, or differential operation.
V+
V–
V
1
O
1
R4 1k⍀
R5
R10
1k⍀
50⍀
R8 1k⍀
R13
1k⍀
1/2 OF AD8620
3
2
V+
V–
6
R6
10k⍀
R1
1k⍀
R12
1k⍀
AD8610
0
R7
1k⍀
R9 1k⍀
5
V+
7
R3 1k⍀
1/2 OF AD8620
R2
R11
50⍀
V
2
O
V–
6
U3
1k⍀
V
2 – V 1 =V
O
O
IN
0
Figure 30. Differential Driver
–16–
REV. D
AD8610/AD8620
OUTLINE DIMENSIONS
8-Lead Mini Small Outline Package [MSOP]
(RM-8)
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions shown in millimeters
Dimensions shown in millimeters and (inches)
3.00
BSC
5.00 (0.1968)
4.80 (0.1890)
8
5
4
8
1
5
4
4.90
BSC
3.00
BSC
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
1
PIN 1
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
0.65 BSC
؋
45؇ 1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
1.10 MAX
0.15
0.00
8؇
0.80
0.60
0.40
0.51 (0.0201)
0.31 (0.0122)
0؇ 1.27 (0.0500)
8؇
0؇
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
0.38
0.22
0.23
0.08
SEATING
PLANE
0.40 (0.0157)
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-187AA
REV. D
–17–
AD8610/AD8620
Revision History
Location
Page
2/04—Data Sheet changed from REV. C to REV. D.
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10/02—Data Sheet changed from REV. B to REV. C.
Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Edits to Figure 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5/02—Data Sheet changed from REV. A to REV. B.
Addition of part number AD8620 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Addition of 8-Lead SOIC (R-8 Suffix) Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Additions to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Change to ELECTRICAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Additions to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Replace TPC 29 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Add Channel Separation Test Circuit Figure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Add Channel Separation Graph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Changes to Figure 26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Addition of High-Speed, Low Noise Differential Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Addition of Figure 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
–18–
REV. D
–19–
–20–
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