AD8644ARZ-REEL7 [ADI]

Single and Quad 18 V Operational Amplifiers; 单路和四路18 V运算放大器
AD8644ARZ-REEL7
型号: AD8644ARZ-REEL7
厂家: ADI    ADI
描述:

Single and Quad 18 V Operational Amplifiers
单路和四路18 V运算放大器

运算放大器
文件: 总16页 (文件大小:341K)
中文:  中文翻译
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Single and Quad 18 V  
Operational Amplifiers  
AD8614/AD8644  
PIN CONFIGURATIONS  
FEATURES  
Unity-gain bandwidth: 5.5 MHz  
Low voltage offset: 1.0 mV  
Slew rate: 7.5 V/μs  
Single-supply operation: 5 V to 18 V  
High output current: 70 mA  
Low supply current: 800 μA/amplifier  
Stable with large capacitive loads  
Rail-to-rail inputs and outputs  
OUT A  
V–  
1
2
3
5
V+  
AD8614  
TOP VIEW  
(Not to Scale)  
+IN  
4
–IN  
Figure 1. 5-Lead SOT-23  
(RJ-5)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
OUT A  
–IN A  
+IN A  
V+  
OUT D  
–IN D  
+IN D  
V–  
APPLICATIONS  
LCD gamma and VCOM drivers  
Modems  
Portable instrumentation  
Direct access arrangement  
AD8644  
TOP VIEW  
(Not to Scale)  
+IN B  
–IN B  
OUT B  
+IN C  
–IN C  
OUT C  
8
GENERAL DESCRIPTION  
Figure 2. 14-Lead TSSOP  
(RU-14)  
The AD8614 (single) and AD8644 (quad) are single-supply,  
5.5 MHz bandwidth, rail-to-rail amplifiers optimized for LCD  
monitor applications.  
OUT A  
–IN A  
+IN A  
V+  
1
2
3
4
5
6
7
14 OUT D  
13 –IN D  
12 +IN D  
11 V–  
They are processed using the Analog Devices, Inc. high voltage,  
extra fast complementary bipolar (HV XFCB) process. This  
proprietary process includes trench-isolated transistors that  
lower internal parasitic capacitance, which improves gain  
bandwidth, phase margin, and capacitive load drive. The low  
supply current of 800 μA (typical) per amplifier is critical for  
portable or densely packed designs. In addition, the rail-to-rail  
output swing provides greater dynamic range and control than  
standard video amplifiers provide.  
AD8644  
TOP VIEW  
(Not to Scale)  
+IN B  
–IN B  
OUT B  
10 +IN C  
9
8
–IN C  
OUT C  
Figure 3. 14-Lead Narrow Body SOIC  
(R-14)  
These products operate from supplies of 5 V to as high as 18 V.  
The unique combination of an output drive of 70 mA, high  
slew rates, and high capacitive drive capability makes the  
AD8614/AD8644 an ideal choice for LCD applications.  
The AD8614 and AD8644 are specified over the temperature  
range of –20°C to +85°C. They are available in 5-lead SOT-23,  
14-lead TSSOP, and 14-lead SOIC surface-mount packages in  
tape and reel.  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©1999–2007 Analog Devices, Inc. All rights reserved.  
 
AD8614/AD8644  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Output Short-Circuit Protection.................................................9  
Input Overvoltage Protection................................................... 10  
Output Phase Reversal............................................................... 10  
Power Dissipation....................................................................... 10  
Unused Amplifiers ..................................................................... 10  
Capacitive Load Drive ............................................................... 11  
Direct Access Arrangement ...................................................... 11  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Pin Configurations ........................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Electrical Characteristics............................................................. 3  
Absolute Maximum Ratings............................................................ 4  
Thermal Resistance ...................................................................... 4  
ESD Caution.................................................................................. 4  
Typical Performance Characteristics ............................................. 5  
Theory of Operation ........................................................................ 9  
A One-Chip Headphone/Microphone Preamplifier  
Solution........................................................................................ 11  
Outline Dimensions....................................................................... 13  
Ordering Guide .......................................................................... 14  
REVISION HISTORY  
9/07—Rev. A to Rev B  
Change to Current Noise Density in Table 1 ................................ 3  
12/06—Rev. 0 to Rev. A  
Updated Format..................................................................Universal  
Deleted SPICE Model Availability Section.................................. 12  
Updated Outline Dimensions....................................................... 13  
Changes to Ordering Guide .......................................................... 14  
10/99—Revision 0: Initial Version  
Rev. B | Page 2 of 16  
 
AD8614/AD8644  
SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS  
5 V ≤ VS ≤ 18 V, VCM = VS/2, TA = 25°C, unless otherwise noted.1  
Table 1.  
Parameter  
Symbol  
Conditions  
Min  
Typ  
1.0  
80  
5
Max  
Unit  
INPUT CHARACTERISTICS  
Offset Voltage  
VOS  
IB  
2.5  
3
mV  
mV  
nA  
nA  
nA  
nA  
V
−20°C ≤ TA ≤ +85°C  
−20°C ≤ TA ≤ +85°C  
−20°C ≤ TA ≤ +85°C  
Input Bias Current  
400  
500  
100  
200  
VS  
Input Offset Current  
IOS  
Input Voltage Range  
Common-Mode Rejection Ratio  
Voltage Gain  
0
60  
10  
CMRR  
AVO  
VCM = 0 V to VS  
VOUT = 0.5 V to VS – 0.5 V, RL = 10 kΩ  
75  
150  
dB  
V/mV  
OUTPUT CHARACTERISTICS  
Output Voltage High  
Output Voltage Low  
VOH  
VOL  
ISC  
ILOAD = 10 mA  
ILOAD = 10 mA  
VS − 0.15  
V
65  
70  
150  
mV  
mA  
mA  
Output Short-Circuit Current  
35  
30  
−20°C ≤ TA ≤ +85°C  
VS = ±2.25 V to ±±.25 V  
−20°C ≤ TA ≤ +85°C  
CL = 200 pF  
POWER SUPPLY  
Power Supply Rejection Ratio  
Supply Current/Amplifier  
PSRR  
ISY  
80  
110  
0.8  
dB  
mA  
mA  
1.1  
1.5  
DYNAMIC PERFORMANCE  
Slew Rate  
Gain Bandwidth Product  
Phase Margin  
SR  
7.5  
5.5  
65  
3
V/μs  
MHz  
Degrees  
μs  
GBP  
Φo  
tS  
Settling Time  
0.01%, 10 V step  
NOISE PERFORMANCE  
Voltage Noise Density  
en  
en  
in  
f = 1 kHz  
f = 10 kHz  
f = 10 kHz  
12  
11  
1
nV/√Hz  
nV/√Hz  
pA/√Hz  
Current Noise Density  
1 All typical values are for VS = 18 V.  
Rev. B | Page 3 of 16  
 
AD8614/AD8644  
ABSOLUTE MAXIMUM RATINGS  
Table 2.  
THERMAL RESISTANCE  
θJA is specified for the worst-case conditions, that is, a device  
soldered in a circuit board for surface-mount packages.  
Parameter  
Rating  
Supply Voltage  
20 V  
Input Voltage  
GND to VS  
Table 3. Thermal Resistance  
Package Type  
5-Lead SOT-23 (RJ)  
14-Lead TSSOP (RU)  
14-Lead SOIC (R)  
Storage Temperature Range  
Operating Temperature Range  
Junction Temperature Range  
−65°C to +150°C  
−20°C to +85°C  
−65°C to +150°C  
θJA  
θJC  
140  
35  
Unit  
°C/W  
°C/W  
°C/W  
230  
180  
120  
Lead Temperature Range (Soldering, 60 sec) 300°C  
56  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
ESD CAUTION  
Rev. B | Page 4 of 16  
 
AD8614/AD8644  
TYPICAL PERFORMANCE CHARACTERISTICS  
50  
7.5  
6.5  
V
= 18V  
= 2kΩ  
= 25°C  
V
= 5V  
S
S
R
R
C
A
= 2kΩ  
= 200pF  
= 1  
45  
40  
35  
30  
25  
20  
15  
10  
5
L
L
L
T
A
V
A
5.5  
T
= 25°C  
4.5  
3.5  
2.5  
1.5  
0.5  
+OS  
–OS  
–0.5  
–1.5  
–2.5  
0
10  
100  
1k  
10k  
TIME (1µs/DIV)  
CAPACITANCE (pF)  
Figure 7. Large Signal Transient Response, VS = 5 V  
Figure 4. Small Signal Overshoot vs. Load Capacitance  
12  
29  
25  
21  
17  
13  
9
V
= 18V  
= 2kΩ  
= 200pF  
= 1  
S
R
C
A
L
L
8
4
V
A
T
= 25°C  
0.1%  
0.01%  
0
5
–4  
–8  
–12  
1
0.1%  
0.01%  
–3  
–7  
–11  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
TIME (1µs/DIV)  
SETTLING TIME (µs)  
Figure 8. Large Signal Transient Response, VS = 18 V  
Figure 5. Output Swing vs. Settling Time  
80  
60  
40  
20  
0
45  
90  
5V V 18V  
S
R
C
T
= 1MΩ  
= 40pF  
= 25°C  
135  
180  
L
L
V
S
A
2
V
= 5V V 18V  
S
S
R
C
A
= 2kΩ  
= 200pF  
= 1  
L
L
V
A
T
= 25°C  
TIME (500ns/DIV)  
1k  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
Figure 9. Small Signal Transient Response  
Figure 6. Open-Loop Gain and Phase Shift vs. Frequency  
Rev. B | Page 5 of 16  
 
AD8614/AD8644  
10k  
400  
300  
5V V 18V  
V
= ±9V  
S
S
T
= 25°C  
A
200  
100  
0
1k  
100  
–100  
–200  
SINK  
10  
1
SOURCE  
–300  
–400  
0.001  
0.01  
0.1  
1
10  
100  
–9  
–7  
–5  
–3  
–1  
0
1
3
5
7
9
LOAD CURRENT (mA)  
COMMON-MODE VOLTAGE (V)  
Figure 10. Output Voltage to Supply Rail vs. Load Current  
Figure 13. Input Bias Current vs. Common-Mode Voltage, VS = 9 V  
1000  
900  
800  
700  
600  
500  
400  
300  
200  
100  
0
180  
2.5V V 9V  
T
= 25°C  
S
A
T
= 25°C  
A
160  
140  
120  
100  
80  
60  
40  
20  
0
0
1
2
3
4
5
6
7
8
9
10  
–2.0 –1.5 –1.0 –0.5  
0
0.5  
1.0  
1.5  
2.0  
SUPPLY VOLTAGE (±V)  
INPUT OFFSET VOLTAGE (mV)  
Figure 11. Supply Current vs. Supply Voltage  
Figure 14. Input Offset Voltage Distribution  
400  
300  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
V
= ±2.5V  
S
V
= 18V  
S
200  
100  
0
–100  
–200  
–300  
–400  
V
= 5V  
S
–2.5  
–1.5  
–0.5  
0.5  
1.5  
2.5  
–35  
–15  
5
25  
45  
65  
85  
COMMON-MODE VOLTAGE (V)  
TEMPERATURE (°C)  
Figure 12. Input Bias Current vs. Common-Mode Voltage, VS = 2.5 V  
Figure 15. Supply Current vs. Temperature  
Rev. B | Page 6 of 16  
AD8614/AD8644  
6
5
4
3
2
1
0
5V V 18V  
S
T
= 25°C  
A
40  
20  
0
V
A
R
= 5V  
S
= 1  
VCL  
= 2kΩ  
= 25°C  
L
T
A
1k  
10k  
100k  
1M  
10M  
100M  
100  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 16. Maximum Output Swing vs. Frequency, VS = 5 V  
Figure 19. Closed-Loop Gain vs. Frequency  
20  
18  
140  
120  
100  
80  
5V V 18V  
S
T
= 25°C  
A
V
A
R
= 18V  
S
16  
14  
12  
10  
8
= 1  
VCL  
= 2kΩ  
= 25°C  
L
T
A
60  
6
40  
4
20  
2
0
100  
0
100  
1k  
10k  
100k  
1M  
10M  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 17. Maximum Output Swing vs. Frequency, VS = 18 V  
Figure 20. Common-Mode Rejection vs. Frequency  
300  
100  
80  
60  
40  
20  
0
V
T
= 18V  
= 25°C  
5V V 18V  
S
S
T
= 25°C  
A
A
240  
180  
120  
60  
PSRR+  
PSRR–  
A
= 1  
V
A
= 10  
V
A
= 100  
V
0
1k  
10k  
100k  
FREQUENCY (Hz)  
1M  
10M  
100  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
Figure 18. Closed-Loop Output Impedance vs. Frequency  
Figure 21. Power Supply Rejection vs. Frequency  
Rev. B | Page 7 of 16  
AD8614/AD8644  
100  
10  
1
9
8
7
6
5
4
3
2
V
T
= 18V  
= 25°C  
S
A
SR+  
SR–  
A
R
C
= 1  
V
L
= 2kΩ  
= 200pF  
= 25°C  
1
0
L
T
A
0
2
4
6
8
10  
12  
14  
16  
18  
20  
10  
100  
FREQUENCY (Hz)  
1k  
10k  
SUPPLY VOLTAGE (V)  
Figure 22. Slew Rate vs. Supply Voltage  
Figure 24. Voltage Noise Density vs. Frequency, VS = 18 V  
100  
10  
1
V
T
= 5V  
= 25°C  
S
A
10  
100  
FREQUENCY (Hz)  
1k  
10k  
Figure 23. Voltage Noise Density vs. Frequency, VS = 5 V  
Rev. B | Page 8 of 16  
AD8614/AD8644  
THEORY OF OPERATION  
The AD8614/AD8644 are processed using Analog Devices high  
voltage, extra fast complementary bipolar (HV XFCB) process.  
This process includes trench-isolated transistors that lower  
parasitic capacitance.  
OUTPUT SHORT-CIRCUIT PROTECTION  
To achieve a wide bandwidth and high slew rate, the output of  
the AD8614/AD8644 is not short-circuit protected. Shorting  
the output directly to ground or to a supply rail can destroy the  
device. The typical maximum safe output current is 70 mA.  
Figure 26 shows a simplified schematic of the AD8614/AD8644.  
The input stage is rail-to-rail, consisting of two complementary  
differential pairs, one NPN pair and one PNP pair. The input  
stage is protected against avalanche breakdown by two back-to-  
back diodes. Each input has a 1.5 kΩ resistor that limits input  
current during overvoltage events and furnishes phase reversal  
protection if the inputs are exceeded. The two differential pairs  
are connected to a double-folded cascode. This is the stage in  
the amplifier with the most gain. The double-folded cascode  
differentially feeds the output stage circuitry. Two complemen-  
tary common emitter transistors are used as the output stage.  
This allows the output to swing to within 125 mV from each rail  
with a 10 mA load. The gain of the output stage, and thus the  
open-loop gain of the op amp, depends on the load resistance.  
In applications where some output current protection is needed,  
but not at the expense of reduced output voltage headroom, a  
low value resistor in series with the output can be used. This is  
shown in Figure 25. The resistor is connected within the  
feedback loop of the amplifier so that if VOUT is shorted to  
ground and VIN swings up to 18 V, the output current does not  
exceed 70 mA.  
For 18 V single-supply applications, resistors less than 261 Ω are  
not recommended.  
18V  
V
IN  
261  
V
OUT  
AD86x4  
The AD8614/AD8644 have no built-in short-circuit protection.  
The short-circuit limit is a function of high current roll-off of  
the output stage transistors and the voltage drop over the  
resistor shown on the schematic at the output stage. The voltage  
over this resistor is clamped to one diode during short-circuit  
voltage events.  
Figure 25. Output Short-Circuit Protection  
V
CC  
– 1.5k  
1.5k+  
V
OUT  
V
V
CC  
CC  
V
EE  
Figure 26. Simplified Schematic  
Rev. B | Page ± of 16  
 
 
 
AD8614/AD8644  
To calculate the internal junction temperature of the  
AD8614/AD8644, the following formula can be used:  
INPUT OVERVOLTAGE PROTECTION  
As with any semiconductor device, whenever the condition  
exists for the input to exceed either supply voltage, attention  
needs to be paid to the input overvoltage characteristic. As an  
overvoltage occurs, the amplifier can be damaged, depending  
on the voltage level and the magnitude of the fault current.  
When the input voltage exceeds either supply by more than  
0.6 V, internal pin junctions energize, allowing current to flow  
from the input to the supplies. Observing Figure 26, the  
AD8614/AD8644 have 1.5 kΩ resistors in series with each  
input, which helps to limit the current. This input current is not  
inherently damaging to the device as long as it is limited to  
5 mA or less. If the voltage is large enough to cause more than  
5 mA of current to flow, an external series resistor should be  
added. The size of this resistor is calculated by dividing the  
maximum overvoltage by 5 mA and subtracting the internal  
1.5 kΩ resistor. For example, if the input voltage could reach 100 V,  
the external resistor should be (100 V ÷ 5 mA) – 1.5 kΩ = 18.5 kΩ.  
This resistance should be placed in series with either or both  
inputs if they are subjected to the overvoltages.  
TJ = PDISS × θJA + TA  
where:  
TJ is the AD8614/AD8644 junction temperature.  
P
DISS is the AD8614/AD8644 power dissipation.  
θJA is the AD8614/AD8644 junction-to-ambient package thermal  
resistance.  
TA is the ambient temperature of the circuit.  
The power dissipated by the device can be calculated as:  
P
DISS = ILOAD × (VS VOUT  
where:  
LOAD is the AD8614/AD8644 output load current.  
VS is the AD8614/AD8644 supply voltage.  
OUT is the AD8614/AD8644 output voltage.  
)
I
V
Figure 27 provides a convenient way to determine if the device  
is being overheated. The maximum safe power dissipation can  
be found graphically, based on the package type and the ambient  
temperature around the package. By using the previous equation, it  
is a simple matter to see if PDISS exceeds the devices power derating  
curve. To ensure proper operation, it is important to observe the  
recommended derating curves shown in Figure 27.  
1.5  
OUTPUT PHASE REVERSAL  
The AD8614/AD8644 are immune to phase reversal as long as  
the input voltage is limited to within the supply rails. Although  
the device’s output does not change phase, large currents due to  
input overvoltage can result, damaging the device. In applica-  
tions where the possibility of an input voltage exceeding the  
supply voltage exists, overvoltage protection should be used, as  
described in the previous section.  
14-LEAD SOIC PACKAGE  
θ
= 120°C/W  
JA  
1.0  
0.5  
0
14-LEAD TSSOP PACKAGE  
= 180°C/W  
POWER DISSIPATION  
θ
JA  
The maximum power that can be safely dissipated by the  
AD8614/AD8644 is limited by the associated rise in junction  
temperature. The maximum safe junction temperature is 150°C,  
and should not be exceeded or device performance could suffer.  
If this maximum is momentarily exceeded, proper circuit  
operation is restored as soon as the die temperature is reduced.  
Leaving the device in an overheated condition for an extended  
period can result in permanent damage to the device.  
5-LEAD SOT-23 PACKAGE  
= 230°C/W  
θ
JA  
–35  
–15  
5
25  
45  
65  
85  
AMBIENT TEMPERATURE (°C)  
Figure 27. Maximum Power Dissipation vs. Temperature  
(5-Lead and 14-Lead Package Types)  
UNUSED AMPLIFIERS  
It is recommended that any unused amplifiers in the quad  
package be configured as a unity-gain follower with a 1 kΩ  
feedback resistor connected from the inverting input to the  
output, and the noninverting input tied to the ground plane.  
Rev. B | Page 10 of 16  
 
 
AD8614/AD8644  
P1  
Tx GAIN  
ADJUST  
CAPACITIVE LOAD DRIVE  
R2  
9.09k  
The AD8614/AD8644 exhibit excellent capacitive load driving  
capabilities. Although the device is stable with large capacitive  
loads, there is a decrease in amplifier bandwidth as the  
capacitive load increases.  
C1  
0.1µF  
TRANSMIT  
TxA  
R1  
10kΩ  
TO TELEPHONE  
LINE  
2kΩ  
R3  
360Ω  
2
1
1:1  
A1  
3
R5  
10kΩ  
6.2V  
6.2V  
Z
O
600Ω  
When driving heavy capacitive loads directly from the  
AD8614/AD8644 output, a snubber network can be used to  
improve the transient response. This network consists of a  
series R-C connected from the amplifiers output to ground,  
placing it in parallel with the capacitive load. The configuration  
is shown in Figure 28. Although this network does not increase  
the bandwidth of the amplifier, it does significantly reduce the  
amount of overshoot.  
5V DC  
T1  
R6  
MIDCOM  
671-8005  
6
5
10kΩ  
R7  
10kΩ  
7
A2  
R8  
10kΩ  
10µF  
R9  
R10  
10kΩ  
10kΩ  
P2  
Rx GAIN  
ADJUST  
RECEIVE  
RxA  
2
3
R13  
R14  
10k14.3kΩ  
R11  
10kΩ  
1
A3  
2kΩ  
C2  
0.1µF  
6
R12  
10kΩ  
7
5V  
A4  
5
A1, A2 = 1/2 AD8644  
A3, A4 = 1/2 AD8644  
Figure 29. A Single-Supply Direct Access Arrangement for Modems  
V
OUT  
AD86x4  
A ONE-CHIP HEADPHONE/MICROPHONE  
PREAMPLIFIER SOLUTION  
C
V
R
L
IN  
X
C
X
Because of its high output current performance, the AD8644  
makes an excellent amplifier for driving an audio output jack in  
a computer application. Figure 30 shows how the AD8644 can  
be interfaced with an ac codec to drive headphones or speakers.  
5V  
Figure 28. Snubber Network Compensation for Capacitive Loads  
The optimum values for the snubber network should be  
determined empirically based on the size of the capacitive load.  
Table 4 shows a few sample snubber network values for a given  
load capacitance.  
5V  
25  
28  
AV  
DD1  
C1  
100µF  
+
R3  
20  
10  
2
3
VREFOUT  
Table 4. Snubber Networks for Large Capacitive Loads  
U1-A  
5
1
Load Capacitance (CL)  
Snubber Network (RX, CX)  
4
35  
R1  
2kΩ  
LINE_OUT_L  
0.47 nF  
4.7 nF  
47 nF  
300 Ω, 0.1 μF  
30 Ω, 1 μF  
5 Ω, 10 μF  
AD1881A  
(AC'97)  
DIRECT ACCESS ARRANGEMENT  
6
C2  
100µF  
+
R4  
20Ω  
Figure 29 shows a schematic for a 5 V single-supply transmit/  
receive telephone line interface for 600 Ω transmission systems. It  
allows full duplex transmission of signals on a transformer-  
coupled 600 Ω line. Amplifier A1 provides gain that can be  
adjusted to meet the modem’s output drive requirements. Both  
A1 and A2 are configured to apply the largest possible differential  
signal to the transformer. The largest signal available on a single  
5 V supply is approximately 4.0 V p-p into a 600 Ω transmission  
system. Amplifier A3 is configured as a difference amplifier to  
extract the receive information from the transmission line for  
amplification by A4. A3 also prevents the transmit signal from  
interfering with the receive signal. The gain of A4 can be adjusted  
in the same manner as A1 to meet the modem input signal  
requirements. Standard resistor values permit the use of single  
in-line package (SIP) format resistor arrays. Couple this with  
the AD8644 14-lead SOIC or TSSOP package and this circuit  
can offer a compact solution.  
36  
26  
LINE_OUT_R  
7
8
U1-B  
AV  
SS1  
9
R2  
2kΩ  
U1 = AD8644  
NOTES  
1. ADDITIONAL PINS OMITTED FOR CLARITY.  
Figure 30. A PC-99-Compliant Headphone/Line Out Amplifier  
Rev. B | Page 11 of 16  
 
 
 
 
 
AD8614/AD8644  
If gain is required from the output amplifier, four additional  
resistors should be added as shown in Figure 31.  
current from the headphones and create a high-pass filter with a  
corner frequency of  
5V  
1
R6  
f3 dB  
=
20k  
2πC1  
(
R4 + RL  
)
25  
AV  
AV  
DD1  
DD2  
5V  
10  
38  
35  
where RL is the resistance of the headphones.  
C1  
100µF  
+
R3  
20Ω  
LINE_OUT_L  
2
3
R5  
10kΩ  
The remaining two amplifiers can be used as low voltage  
microphone preamplifiers. A single AD8614 can be used as a  
standalone microphone preamplifier. Figure 32 shows this  
implementation.  
U1-A  
1
4
R1  
2kΩ  
5
27  
VREF  
10k  
5V  
A
= 20dB  
2.2kΩ  
V
6
AD1881A  
(AC'97)  
1µF  
1kΩ  
C2  
100µF  
+
+
R4  
20Ω  
7
R5  
10kΩ  
21  
MIC1  
U1-B  
9
MIC 1  
36  
26  
R2  
2kΩ  
LINE_OUT_R  
8
AV  
SS1  
10kΩ  
5V  
2.2kΩ  
AD1881A  
(AC'97)  
R6  
20kΩ  
U1 = AD8644  
A
= 20dB  
V
1µF  
1kΩ  
+
R6  
A
=
= +6dB WITH VALUES SHOWN  
V
R5  
22  
27  
MIC2  
NOTES  
MIC 2  
1. ADDITIONAL PINS OMITTED FOR CLARITY.  
Figure 31. A PC-99-Compliant Headphone/Speaker Amplifier with Gain  
VREF  
The gain of the AD8644 can be set as  
Figure 32. Microphone Preamplifier  
R6  
AV =  
R5  
Input coupling capacitors are not required for either circuit as  
the reference voltage is supplied from the AD1881A.  
The resistors R4 and R5 help protect the AD8644 output in case  
the output jack or headphone wires are accidentally shorted to  
ground. The output coupling capacitors C1 and C2 block dc  
Rev. B | Page 12 of 16  
 
 
AD8614/AD8644  
OUTLINE DIMENSIONS  
5.10  
5.00  
4.90  
2.90 BSC  
5
1
4
3
14  
8
7
2.80 BSC  
1.60 BSC  
4.50  
4.40  
4.30  
2
6.40  
BSC  
PIN 1  
0.95 BSC  
1
1.90  
BSC  
1.30  
1.15  
0.90  
PIN 1  
0.65  
BSC  
1.05  
1.00  
0.80  
0.20  
0.09  
1.45 MAX  
1.20  
MAX  
0.22  
0.08  
0.75  
0.60  
0.45  
8°  
0°  
0.15  
0.05  
10°  
5°  
0°  
0.30  
0.19  
SEATING  
PLANE  
0.15 MAX  
COPLANARITY  
0.10  
0.50  
0.30  
0.60  
0.45  
0.30  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1  
COMPLIANT TO JEDEC STANDARDS MO-178-AA  
Figure 33. 5-Lead Small Outline Transistor Package [SOT-23]  
Figure 34. 14-Lead Thin Shrink Small Outline Package [TSSOP]  
(RU-14)  
(RJ-5)  
Dimensions shown in millimeters  
Dimensions shown in millimeters  
8.75 (0.3445)  
8.55 (0.3366)  
8
7
14  
1
6.20 (0.2441)  
5.80 (0.2283)  
4.00 (0.1575)  
3.80 (0.1496)  
1.27 (0.0500)  
0.50 (0.0197)  
45°  
BSC  
0.25 (0.0098)  
1.75 (0.0689)  
1.35 (0.0531)  
0.25 (0.0098)  
0.10 (0.0039)  
8°  
0°  
COPLANARITY  
0.10  
SEATING  
PLANE  
1.27 (0.0500)  
0.40 (0.0157)  
0.51 (0.0201)  
0.31 (0.0122)  
0.25 (0.0098)  
0.17 (0.0067)  
COMPLIANT TO JEDEC STANDARDS MS-012-AB  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 35. 14-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body  
(R-14)  
Dimensions shown in millimeters and (inches)  
Rev. B | Page 13 of 16  
 
AD8614/AD8644  
ORDERING GUIDE  
Model  
Temperature Range  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
–20°C to +85°C  
Package Description  
5-Lead SOT-23  
5-Lead SOT-23  
5-Lead SOT-23  
5-Lead SOT-23  
5-Lead SOT-23  
14-Lead SOIC_N  
14-Lead SOIC_N  
14-Lead SOIC_N  
14-Lead SOIC_N  
14-Lead SOIC_N  
14-Lead SOIC_N  
14-Lead TSSOP  
14-Lead TSSOP  
14-Lead TSSOP  
14-Lead TSSOP  
Package Option  
RJ-5  
RJ-5  
RJ-5  
RJ-5  
RJ-5  
R-14  
R-14  
R-14  
R-14  
R-14  
R-14  
RU-14  
RU-14  
RU-14  
RU-14  
Branding  
A6A  
A6A  
A6A  
A0Z  
AD8614ART-R2  
AD8614ART-REEL  
AD8614ART-REEL7  
AD8614ARTZ-REEL1  
AD8614ARTZ-REEL71  
AD8644AR  
AD8644AR-REEL  
AD8644AR-REEL7  
AD8644ARZ1  
AD8644ARZ-REEL1  
AD8644ARZ-REEL71  
AD8644ARU  
AD8644ARU-REEL  
AD8644ARUZ1  
AD8644ARUZ-REEL1  
A0Z  
1 Z = RoHS Compliant Part.  
Rev. B | Page 14 of 16  
 
 
AD8614/AD8644  
NOTES  
Rev. B | Page 15 of 16  
AD8614/AD8644  
NOTES  
©1999–2007 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D06485-0-9/07(B)  
Rev. B | Page 16 of 16  

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