ADA4938-1YCPZ-RL [ADI]
Ultra-Low Distortion Differential ADC Driver; 超低失真差分ADC驱动器
| 型号： | ADA4938-1YCPZ-RL |
| 厂家： | 
ADI |
| 描述： | Ultra-Low Distortion Differential ADC Driver |
| 文件： | 总9页 (文件大小：288K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ultra-Low Distortion
Differential ADC Driver
Preliminary Technical Data
ADA4938-1
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Extremely low harmonic distortion
−108 dBc HD2 @ 10 MHz
−79 dBc HD2 @ 70 MHz
−125 dBc HD3 @ 10 MHz
−87 dBc HD3 @ 70 MHz
Low input voltage noise: 2.2 nV/√Hz
High speed
−3 dB bandwidth of 1.5 GHz, G = 1
Slew rate: 4700 V/μs
0.1 dB gain flatness to 125 MHz
Fast settling to 0.01% in 8.5 ns
Fast overdrive recovery of 4 ns
1 mV typical offset voltage
Externally adjustable gain
Differential to differential or single-ended to differential
operation
Adjustable output common-mode voltage
Wide Supply Voltage Range: +5 V & 5 V
Pb-free 3 mm x 3 mm LFCSP package
Figure 1.
APPLICATIONS
ADC drivers
Single-ended-to-differential converters
IF and baseband gain blocks
Differential buffers
Line drivers
GENERAL DESCRIPTION
The ADA4938-1 is a low noise, ultra-low distortion, high speed
differential amplifier. It is an ideal choice for driving high
performance ADCs with resolutions up to 16 bits from dc to 70
MHz. The output common mode voltage is adjustable over a
wide range, allowing the ADA4938-1 to match the input of the
ADC. The internal common mode feedback loop also provides
exceptional output balance as well as suppression of even-order
harmonic distortion products.
The ADA4938-1 is fabricated using ADI’s proprietary third
generation high-voltage XFCB process, enabling it to achieve
very low levels of distortion with input voltage noise of only 2.2
nV/√Hz. The low dc offset and excellent dynamic performance
of the ADA4938-1 make it well suited for a wide variety of data
acquisition and signal processing and applications.
The ADA4938-1 is available in a Pb-free, 3 mm x 3mm lead
frame chip scale package (LFCSP). It is specified to operate
over the extended industrial temperature range of −40°C to
+85°C.
Full differential and single-ended to differential gain
configurations are easily realized with the ADA4938-1. A
simple external feedback network of four resistors determines
the amplifier’s closed-loop gain.
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
ADA4938-1
Preliminary Technical Data
TABLE OF CONTENTS
Features .............................................................................................. 1
Single Supply Operation...............................................................5
Absolute Maximum Ratings ............................................................7
Thermal Resistance.......................................................................7
ESD Caution...................................................................................7
Pin Configuration and Function Descriptions..............................8
Outline Dimensions..........................................................................9
Ordering Guide .............................................................................9
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply Operation................................................................ 3
REVISION HISTORY
12/06—Revision PrA: Initial Version
Rev. PrA | Page 2 of 9
Preliminary Technical Data
ADA4938-1
SPECIFICATIONS
DUAL SUPPLY OPERATION
At 25 °C, +VS = 5 V, −VS = −5 V, VOCM = 0 V, RG = RF = 200 Ω, G = +1, RL, dm = 1 kꢀ, unless otherwise noted. All specifications refer to
single-ended input and differential outputs, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max Unit
±±IN TO ±OꢀT PERFORMANCE
±YNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Bandwidth for 0.1 dB Flatness
Large Signal Bandwidth
VOꢀT = 0.5 V p-p, ±ifferential Input
VOꢀT = 2 V p-p, ±ifferential Input
VOꢀT = 2 V p-p, ±ifferential Input
VOꢀT = 4 V p-p, ±ifferential Input
VOꢀT = 2 V p-p
1500
125
1300
800
4700
8.5
MHz
MHz
MHz
MHz
V/μs
ns
Slew Rate
Settling Time
0.01%, VOꢀT = 2 Vp-p
Overdrive Recovery Time
NOISE/HARMONIC PERFORMANCE1
Second Harmonic
VIN = 5 V to 0 V step, G = +2
4
ns
VOꢀT = 2 V p-p, 10 MHz
VOꢀT = 2 V p-p, 70 MHz
VOꢀT = 2 V p-p, 10 MHz
VOꢀT = 2 V p-p, 70 MHz
70 MHz
−108
−79
−125
−87
dBc
dBc
dBc
dBc
dBc
dBm
Third Harmonic
IM±
IP3
70 MHz
Voltage Noise (RTI)
Noise Figure
Input Current Noise
INPꢀT CHARACTERISTICS
Offset Voltage
2.2
12
2
nV/√Hz
dB
pA/√Hz
G = +2
VOS, dm = VOꢀT, dm/2; V±IN+ = V±IN− = 0 V
TMIN to TMAX variation
1
±4
3.5
−0.01
6
3
1
mV
μV/°C
μA
μA/°C
MΩ
MΩ
pF
Input Bias Current
Input Resistance
TMIN to TMAX variation
±ifferential
Common mode
Input Capacitance
Input Common-Mode Voltage
CMRR
−4.7 to 3.4
−77
V
dB
∆VOꢀT, dm/∆VIN, cm; ∆VIN, cm = ±1 V
OꢀTPꢀT CHARACTERISTICS
Output Voltage Swing
Output Current
Output Balance Error
VOCM to ±OꢀT PERFORMANCE
VOCM ±YNAMIC PERFORMANCE
−3 dB Bandwidth
Maximum ∆VOꢀT; single-ended output
∆VOꢀT, cm/∆VOꢀT, dm; ∆VOꢀT, dm = 1 V; 10 MHz
1
4
V
mA
dB
95
−66
400
1700
7.5
MHz
V/μs
Slew Rate
INPꢀT VOLTAGE NOISE (RTI)
VOCM INPꢀT CHARACTERISTICS
Input Voltage Range
Input Resistance
Input Offset Voltage
Input Bias Current
VOCM CMRR
nV/√Hz
−3.8
3.8
3.5
V
200
1
0.5
−75
1
kΩ
mV
μA
dB
V/V
VOS, cm = VOꢀT, cm; V±IN+ = V±IN– = 0 V
∆VOꢀT, dm/∆VOCM; ∆VOCM = ±1 V
∆VOꢀT, cm/∆VOCM; ∆VOCM = ±1 V
Gain
POWER SꢀPPLY
Rev. PrA | Page 3 of 9
ADA4938-1
Preliminary Technical Data
Parameter
Conditions
Min
Typ
Max Unit
Operating Range
Quiescent Current
4.5
12
V
40
40
< 1
−90
mA
μA/°C
mA
dB
TMIN to TMAX variation
Powered down
∆VOꢀT, dm/∆VS; ∆VS = ±1 V
Power Supply Rejection Ratio
P±
POWER ±OWN (
)
P±
Powered down
Enabled
≤ 1
≥ 2
1
V
Input Voltage
V
μs
ns
Turn-Off Time
Turn-On Time
200
P±
Bias Current
Enabled
±isabled
P±
P±
40
μA
μA
°C
= 5 V
= 0 V
200
OPERATING TEMPERATꢀRE RANGE
−40
+85
Rev. PrA | Page 4 of 9
Preliminary Technical Data
ADA4938-1
SINGLE SUPPLY OPERATION
At 25 °C, +VS = 5 V, -VS = 0 V, VOCM = 2.5 V, RG = RF = 200 Ω, G = +1, RL, dm = 1 kꢀ, unless otherwise noted. All specifications refer to
single-ended input and differential output, unless otherwise noted.
Table 2.
Parameter
Conditions
Min
Typ
Max Unit
±±IN TO ±OꢀT PERFORMANCE
±YNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Bandwidth for 0.1 dB Flatness
Large Signal Bandwidth
Slew Rate
VOꢀT = 0.5 V p-p, ±ifferential Input
VOꢀT = 2 V p-p, ±ifferential Input
VOꢀT = 2 V p-p, ±ifferential Input
VOꢀT = 2 V p-p
1500
125
1100
3900
8.1
MHz
MHz
MHz
V/μs
ns
Settling Time
0.01%, VOꢀT = 2 V p-p
Overdrive Recovery Time
NOISE/HARMONIC PERFORMANCE
Second Harmonic
VIN = 2.5 V to 0 V step, G = +2
4
ns
VOꢀT = 2 V p-p, 10 MHz
VOꢀT = 2 V p-p, 70 MHz
VOꢀT = 2 V p-p, 10 MHz
VOꢀT = 2 V p-p, 70 MHz
70 MHz
−115
−87
−110
−79
dBc
dBc
dBc
dBc
dBc
dBm
Third Harmonic
IM±
IP3
70 MHz
Voltage Noise (RTI)
Noise Figure
Input Current Noise
INPꢀT CHARACTERISTICS
Offset Voltage
2.2
12
2
nV/√Hz
dB
pA/√Hz
G = +2
VOS, dm = VOꢀT, dm/2; V±IN+ = V±IN− = VOCM = 2.5 V
TMIN to TMAX variation
1
±4
3.5
−0.01
6
3
1
mV
μV/°C
μA
μA/°C
MΩ
MΩ
pF
Input Bias Current
Input Resistance
TMIN to TMAX variation
±ifferential
Common mode
Input Capacitance
Input Common-Mode Voltage
CMRR
0.3 to 3.4
−77
V
dB
∆VOꢀT, dm/∆VIN, cm; ∆VIN, cm = ±1 V
OꢀTPꢀT CHARACTERISTICS
Output Voltage Swing
Output Current
Output Balance Error
VOCM TO ±OꢀT PERFORMANCE
VOCM ±YNAMIC PERFORMANCE
−3 dB Bandwidth
Maximum ∆VOꢀT; single-ended output
∆VOꢀT, cm/∆VOꢀT, dm; ∆VOꢀT, dm = 1 V
1.1
3.9
V
mA
dB
95
−66
400
MHz
Slew Rate
V = 0.5 V
1700
V/μs
INPꢀT VOLTAGE NOISE (RTI)
VOCM INPꢀT CHARACTERISTICS
Input Voltage Range
Input Resistance
Input Offset Voltage
Input Bias Current
VOCM CMRR
nV/√Hz
1.2
4.5
3.8
V
200
1
0.5
−75
1
kΩ
mV
μA
dB
V/V
VOS, cm = VOꢀT, cm; V±IN+ = V±IN– = VOCM = 2.5 V
∆VOꢀT, dm/∆VOCM; ∆VOCM = ±1 V
∆VOꢀT, cm/∆VOCM; ∆VOCM = ±1 V
Gain
POWER SꢀPPLY
Operating Range
12
V
Quiescent Current
36
40
mA
μA/°C
TMIN to TMAX variation
Rev. PrA | Page 5 of 9
ADA4938-1
Preliminary Technical Data
Parameter
Conditions
Min
Typ
< 1
−90
Max Unit
Powered down
∆VOꢀT, dm/∆VS; ∆VS = ±1 V
mA
dB
Power Supply Rejection Ratio
P±
POWER ±OWN (
)
P±
Powered down
Enabled
≤ 1
≥ 2
1
V
Input Voltage
V
μs
ns
Turn-Off Time
Turn-On Time
P± Bias Current
Enabled
200
P±
P±
20
μA
μA
= 5 V
±isabled
−120
= 0 V
OPERATING TEMPERATꢀRE RANGE
−40
+85
°C
Rev. PrA | Page 6 of 9
Preliminary Technical Data
ADA4938-1
ABSOLUTE MAXIMUM RATINGS
The power dissipated in the package (PD) is the sum of the
Table 3.
Parameter
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the
voltage between the supply pins (VS) times the quiescent
current (IS). The power dissipated due to the load drive depends
upon the particular application. The power due to load drive is
calculated by multiplying the load current by the associated
voltage drop across the device. RMS voltages and currents must
be used in these calculations.
Rating
Supply Voltage
Power ±issipation
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
TB±
See Figure 2
−65°C to +125°C
−40°C to +85°C
300°C
150°C
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package
leads/exposed pad from metal traces, through-holes, ground,
and power planes reduces the θJA.
Stresses above those listed under Absolute Maximum
Rating may cause permanent damage to the device. This is
a stress rating only; functional operation of the device at
these or any other conditions above those indicated in the
operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Figure 2 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 16-lead LFCSP
(TBD °C/W) on a JEDEC standard 4-layer board.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions; that is, θJA is
specified for a device (including exposed pad) soldered to
the circuit board.
Table 4. Thermal Resistance
Package Type
θJA
Unit
16-Lead LFCSP (Exposed Pad)
TB±
°C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4938-1
package is limited by the associated rise in junction
temperature (TJ) on the die. At approximately 150°C, which
is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature
limit can change the stresses that the package exerts on the
die, permanently shifting the parametric performance of
the ADA4938-1. Exceeding a junction temperature of 150°C
for an extended period can result in changes in the silicon
devices, potentially causing failure.
Figure 2. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. PrA | Page 7 of 9
ADA4938-1
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
N
IDIATR
12 PD
FB-OUT
1
+IN 2
-IN 3
11 -OUT
10 +OUT
9 VOCM
TOP VIEW
FB+OUT
4
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
3
4
FB-OꢀT
+IN
−IN
FB+OꢀT
+VS
VOCM
+OꢀT
−OꢀT
P±
Negative output feedback pin
Positive input summing node
Negative input summing node
Positive output feedback pin
Positive supply voltage
Output common mode voltage
Positive output
5 to 8
9
10
11
12
Negative output
Power-down pin
13 to 16
−VS
Negative supply voltage
Rev. PrA | Page 8 of 9
Preliminary Technical Data
OUTLINE DIMENSIONS
ADA4938-1
0.50
0.40
0.30
3.00
BSC SQ
0.60 MAX
PIN 1
INDICATO
R
*
1.65
13
12
16
0.45
1
1.50 SQ
1.35
PIN 1
INDICATOR
2.75
BSC SQ
TOP
VIEW
EXPOSED
PAD
9 (BOTTOM VIEW)
4
8
5
0.50
BSC
0.25 MIN
1.50 REF
0.80 MAX
12° MAX
0.65 TYP
0.90
0.85
0.80
0.05 MAX
0.02 NOM
SEATING
PLANE
0.30
0.23
0.18
0.20 REF
*
COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2
EXCEPT FOR EXPOSED PAD DIMENSION.
Figure 4. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body
(CP-16-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Ordering Quantity Temperature Range
Package Description
Package Option
Branding
A±A4938-1YCPZ-R2 5,000
A±A4938-1YCPZ-RL 1,500
A±A4938-1YCPZ-R7 250
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
16-Lead 3 mm × 3 mm LFCSP CP-16 -3
16-Lead 3 mm × 3 mm LFCSP CP-16 -3
16-Lead 3 mm × 3 mm LFCSP CP-16 -3
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
PR06592-0-12/06(PrA)
Rev. PrA | Page 9 of 9
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