ADD8701 [ADI]
12-Channel Gamma Buffers with VCOM Buffer; 12通道伽玛缓冲器,具有VCOM缓冲器型号: | ADD8701 |
厂家: | ADI |
描述: | 12-Channel Gamma Buffers with VCOM Buffer |
文件: | 总8页 (文件大小:266K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
12-Channel Gamma Buffers
with VCOM Buffer
ADD8701
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Single-Supply Operation: 7 V to 16 V
Dual-Supply Operation: ꢀ3.5 V to ꢀ8 V
Supply Current: 13 mA Max
Upper/Lower Buffers Swing to VDD/GND
Continuous Output Current: 10 mA
VCOM Peak Output Current: 250 mA
Offset Voltage: 15 mV Max
Slew Rate: 6 V/ꢁs
Fast Settling Time with Large C-Load
32 31 30 26 28 27 26 25
V
1
2
3
4
5
6
7
8
24
23
22
21
20
DD
GND
VCOM IN
V
DD
IN12
IN11
IN10
V6
V5
V4
APPLICATIONS
TFT LCD Panels
IN9
IN8
IN7
19 V3
18 V2
17 V1
9
10 11 12 13 14 15 16
GENERAL DESCRIPTION
The ADD8701 is a low cost, 12-channel buffer amplifier and
VCOM driver that operates from a single supply. The part is
designed for high resolution TFT LCD panels, and is built on
an advanced, high voltage, CBCMOS process.
The ADD8701 is specified over the –40ºC to +85ºC tempera-
ture range and is available in a 32-lead lead frame chip scale
package (LFCSP).
The buffers have high slew rate, 10 mA continuous output current,
and high capacitive load drive capability. The VCOM buffer has
increased drive of 35 mA and can drive large capacitive loads. The
ADD8701 offers wide supply range and offset voltages below 15 mV.
All inputs and outputs incorporate internal ESD protection
circuits.
V
DD
V12
PANEL
TIMING
CONTROLLER
TIMING AND CONTROL
GAMMA
REFERENCE
VOLTAGES
SCAN DRIVER CONTROL
RESISTOR
LADDER
SOURCE DRIVER
SOURCE DRIVER
NO. 2
SOURCE DRIVER
ADD8701
NO. 1
NO. 8
384
384
384
R
G
B
VCOM OUT
V1
TFT COLOR PANEL
SCAN
DRIVERS
768
1024
؋
768 GND
VCOM IN
V
DD
Figure 1. Typical SVGA TFT-LCD Application
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
ADD8701–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (7 V ≤ VDD ≤ 16 V, TA = 25°C, unless otherwise specified.)
Parameter
Symbol
Condition
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Bias Current
VOS
∆VOS/∆T
IB
4
5
0.5
15
mV
µV/°C
µA
µA
V
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +85°C
1.1
1.5
VDD + 0.5
Input Voltage Range
Input Impedance
Input Capacitance
–0.5
ZIN
CIN
400
1
kΩ
pF
OUTPUT CHARACTERISTICS
Output Voltage High (V11, V12)
VOUT
IL = 100 µA
15.995
15.9
V
V
V
V
VDD = 16 V, IL = 5 mA
–40°C ≤ TA ≤ +85°C
15.85
15.75
6.75
V
DD = 7 V, IL = 5 mA
6.85
–40°C ≤ TA ≤ +85°C
IL = 5 mA, VDD = 16 V
IL = 5 mA, VDD = 7 V
IL = 100 µA
VDD = 16 V, IL = 5 mA
–40°C ≤ TA ≤ +85°C
VDD = 7 V, IL = 5 mA
–40°C ≤ TA ≤ +85°C
6.65
V
V
V
mV
mV
mV
mV
mV
mA
mA
Output Swing (V3 to V10)
Output Swing (V3 to V10)
Output Voltage Low (V1, V2)
VOUT
VOUT
VOUT
14.6
5.6
5
85
150
250
300
400
140
Continuous Output Current
Peak Output Current
IOUT
IPK
10
150
VDD = 16 V
VCOM CHARACTERISTICS
Continuous Output Current
Peak Output Current
IOUT
IPK
35
250
mA
mA
VDD = 16 V
TRANSFER CHARACTERISTICS
Gain
AVCL
NL
RL = 2 kΩ
0.995
0.995
0.9985 1.005
0.9980 1.005
V/V
V/V
–40°C ≤ TA ≤ +85°C
RL = 10 kΩ
Gain Linearity
VO = 0.5 to (VDD – 0.5 V)
0.01
%
V
SUPPLY CHARACTERISTICS
Supply Voltage
VDD
7
16
Power Supply Rejection Ratio
PSRR
VDD = 6 V to 17 V
–40°C ≤ TA ≤ +85°C
No Load
70
90
10
dB
mA
mA
Supply Current
ISYS
13
15
–40°C ≤ TA ≤ +85°C
DYNAMIC PERFORMANCE
Slew Rate
Bandwidth
Settling Time to 0.1% (Buffers)
Settling Time to 0.1% (VCOM)
Phase Margin
SR
BW
tS
tS
fo
RL = 10 kΩ, CL = 200 pF
4
6
V/µs
MHz
µs
µs
Degrees
dB
–3 dB, RL = 10 kΩ, CL = 200 pF
1 V, RL = 10 kΩ, CL = 200 pF
1 V, RL = 10 kΩ, CL = 200 pF
RL = 10 kΩ, CL = 200 pF
4.5
1.1
0.7
55
75
Channel Separation
NOISE PERFORMANCE
Voltage Noise Density
en
en
in
f = 1 kHz
f = 10 kHz
f = 10 kHz
26
25
0.8
nV/√Hz
nV/√Hz
pA/√Hz
Current Noise Density
Specifications subject to change without notice.
–2–
REV. 0
ADD8701
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage (VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
PIN CONFIGURATION
)
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to VDD + 0.5 V
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
ESD Tolerance (HBM) . . . . . . . . . . . . . . . . . . . . . . . 1,000 V
V
1
24 GND
23 V
PIN 1
DD
INDICATOR
VCOM IN 2
IN12 3
IN11 4
IN10 5
IN9 6
DD
22 V6
21 V5
20 V4
19 V3
18 V2
17 V1
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ADD8701
TOP VIEW
IN8 7
IN7 8
1
2
Package Type
ꢂJA
ꢃJB
Unit
32-Lead LFCSP (CP)
35
13
°C/W
PIN FUNCTION DESCRIPTION
NOTES
1θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered
in circuit board for surface-mount packages.
Pin No.
1, 15, 23
2
Mnemonic
VDD
Description
Power (+)
2ψJB is applied for calculating the junction temperature by reference to the board
temperature.
VCOM IN
IN12–IN1
GND
VCOM Buffer Input
Gamma Buffer Inputs
Power (–)
ORDERING GUIDE
3–14
16, 24, 31
17–22, 25–30
32
Model
Temperature
Range
Package
Description
Package
Option
V1–V12
Gamma Buffer Outputs
VCOM Buffer Output
VCOM OUT
ADD8701ACP –40°C to +85°C 32-Lead LFCSP CP-32
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADD8701 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. 0
–3–
ADD8701–Typical Performance Characteristics
1,400
1,200
1,000
800
7,000
6,000
5,000
4,000
3,000
2,000
1,000
0
20
15
7V <V < 16V
DD
7V <V < 16V
DD
T
= 25ꢄC
A
7V <V
< 16V
DD
10
VCOM
5
BUFFER 1
0
600
–5
BUFFER 12
400
–10
–15
–20
200
0
–40
25
TEMPERATURE –ꢄC
85
–7 –5 –3 –1
1
3
5
7
9
5
10
15
20
25
30
35
40
TCVOS – ꢁV/ꢄC
INPUT OFFSETVOLTAGE – mV
TPC 3. Input Offset Voltage
vs. Temperature
TPC 1. Input Offset Voltage Distribution
TPC 2. TCVOS Distribution
0
8
8
6
VCOM AND BUFFERS 1TO 9
V
= ꢀ8V
V
= ꢀ8V
DD
DD
–100
–200
–300
–400
–500
–600
–700
–800
–900
6
4
BUFFERS 10TO 12
VCOM, BUFFERS 1TO 9
4
2
2
V
DD
= 16V
0
0
V
DD
= 7V
–2
–4
–6
–8
–10
–2
–4
–6
–8
–10
–40
25
TEMPERATURE –ꢄC
85
–8
–6
–4
–2
0
2
4
6
8
–8
–6
–4
–2
0
2
4
6
8
COMMON-MODEVOLTAGE – V
COMMON-MODEVOLTAGE – V
TPC 4. Offset Voltage vs.
Common-Mode Voltage
TPC 5. Offset Voltage vs.
Common-Mode Voltage
TPC 6. Input Bias Current vs.
Temperature
350
100
10
100
10
BUFFERS 10TO 12
V
= 16V
DD
V
= 16V
DD
BUFFERS 1, 2
BUFFERS 3TO 9
300
250
200
150
100
50
SOURCE
SOURCE
V
= 7V
DD
1
1
V
= 16V
DD
SINK
0.1
0.1
SINK
0.01
0.01
0
0.001
0.001
0.01
0.1
1
10
100
–40
25
TEMPERATURE –ꢄC
85
0.01
0.1
1
10
100
LOAD CURRENT – mA
LOAD CURRENT – mA
TPC 7. Input Bias Current vs.
Temperature
TPC 8. Output Voltage to
Supply Rail vs. Load Current
TPC 9. Output Voltage to
Supply Rail vs. Load Current
–4–
REV. 0
ADD8701
100
10
100
10
10
1
V
= 16V
V
= 16V
V
= 16V
DD
DD
DD
BUFFERS 11, 12
VCOM
BUFFER 10
SOURCE
SINK
SINK
1
0.1
1
SOURCE
SINK
0.1
0.01
0.001
0.0001
0.1
SOURCE
0.01
0.001
0.01
0.001
0.01
0.1
1
10
100
0.01
0.1
1
10
100
0.01
0.1
1
10
100
LOAD CURRENT – mA
LOAD CURRENT – mA
LOAD CURRENT – mA
TPC 11. Output Voltage to
Supply Rail vs. Load Current
TPC 10. Output Voltage to
Supply Rail vs. Load Current
TPC 12. Output Voltage to
Supply Rail vs. Load Current
12
10
8
12
10
8
20
10
V
= 16V
V
CM
= 1/2V
DD
DD
V
= 16V
DD
VCOM AND BUFFERS 1TO 9
V
= 7V
DD
10kꢅ
2kꢅ
0
1kꢅ
560ꢅ
6
6
–10
–20
–30
4
4
150ꢅ
2
2
0
0
–40
25
TEMPERATURE –ꢄC
85
1M
10M
30M
0
4
8
12
16
100k
SUPPLYVOLTAGE –V
FREQUENCY – Hz
TPC 14. Supply Current vs.
Temperature
TPC15. FrequencyResponse
vs. Resistive Loading
TPC 13. Supply Current vs.
Supply Voltage
80
60
20
10
20
10
ALL CHANNELS
8V
V = 16V
DD
VCOM, BUFFERS 1TO 9
V
= 16V
DD
V
=
DD
BUFFERS 10TO 12
T
A
= +25ꢄC
40
100pF
50pF
0
20
10kꢅ
2kꢅ
1kꢅ
0
0
–10
–20
–30
–40
–50
–20
–40
–60
–80
–100
–120
540pF
1040pF
560ꢅ
–10
–20
–30
PSRR
150ꢅ
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
1M
10M
30M
100k
1M
FREQUENCY – Hz
10M
30M
100k
FREQUENCY – Hz
TPC18. FrequencyResponse
vs. Capacitive Loading
TPC16. FrequencyResponse
vs. Resistive Loading
TPC 17. Power Supply Rejection
Ratio vs. Frequency
REV. 0
–5–
ADD8701
20
180
160
140
120
100
80
180
160
140
120
100
80
V
R
= 7V
= 2kꢅ
CHANNELS 11 AND 12
DD
V
R
= 16V
= 2kꢅ
DD
V
DD
= 16V
CHANNEL 11
CHANNEL 3
L
BUFFERS 10TO 12
L
10
0
100pF
50pF
CHANNELS 3TO 9
VCOM
VCOM
–10
–20
–30
–40
–50
CHANNELS 1 AND 2
CHANNEL 1
540pF
1040pF
60
60
40
40
1M
FREQUENCY – Hz
10M
30M
100k
0
200
400
600
800 1,000 1,200
0
200
400
600
800 1,000 1,200
CAPACITIVE LOAD – pF
CAPACITIVE LOAD – pF
TPC 19. Frequency Response
vs. Capacitive Loading
TPC 20. Input-Output Phase
Shift vs. Capacitive Load
TPC 21. Input-Output Phase
Shift vs. Capacitive Load
16
14
12
10
8
V
DD
= 16V
V
R
C
= 16V
DD
= 33ꢅ
NULL
= 100pF
L
VCOM SLEW RATE FALLING
VCOM SLEW RATE RISING
6
4
7V <V < 16V
DD
R
SERIES = 33ꢅ
= 0.1ꢁF
OUT
2
C
LOAD
0
–40
25
85
TIME – 2ꢁs/DIV
TIME – 20ꢁs/DIV
TEMPERATURE –ꢄC
TPC 22. Large-Signal Transient
Response
TPC 24. Small Signal Transient
Response
TPC 23. Slew Rate vs. Temperature
100
90
80
70
60
50
40
30
20
10
0
12
V
=
=
= 2kꢅ
= 25ꢄC
8V
50mV
DD
VCOM
DD
V
IN
V
= 8V
R
T
8
4
R
C
= 5kꢅ
= 100pF
L
L
L
A
+t (0.1%)
S
R
NULL
= 33ꢅ
–OS
T = 25ꢄC
A
+OS
0
–4
–8
–12
–t (0.1%)
S
10
100
1k
10k
400
600
800
1,000
1,200
1,400
CAPACITIVE LOAD – pF
TIME – 40ꢁs/DIV
SETTLINGTIME – ns
TPC 25. Small-Signal Overshoot
vs. Capacitive Load
TPC 26. Settling Time vs. Step Size
TPC 27. No Phase Reversal
–6–
REV. 0
ADD8701
70
60
70
60
V
= 16V
V
= 16V
DD
DD
VCOM AND BUFFERS 1TO 9
MARKER SET @ 10kHz
MARKER READING = 25.7nV/ Hz
BUFFERS 10TO 12
MARKER SET @ 10kHz
MARKER READING = 36.6nV/ Hz
50
40
30
20
50
40
30
20
10
0
10
0
–10
–10
0
5
10
15
20
25
0
5
10
15
20
25
FREQUENCY – Hz
FREQUENCY – Hz
TPC28. VoltageNoiseDensity
vs. Frequency
TPC29. VoltageNoiseDensity
vs. Frequency
APPLICATIONS
LCD Gamma Reference Buffers
GMA
A12
A11
A10
A9
In high resolution TFT-LCD displays, gamma correction must
be performed to correct the nonlinearity in the LCD panel’s
transmission characteristics. A typical TFT-LCD panel consisting
of 256 grayscale levels takes an 8-bit digital word to select an
appropriate gamma reference voltage. An 8-bit source driver may
use 12 analog voltages that match the characteristic gamma curve
for optimum panel picture quality. The ADD8701 is specifically
designed to generate analog reference voltages to meet the gamma
characteristics of an LCD panel used by the source driver. The
gamma reference buffers offer 10 mA drive capability.
GMA
GMA
GMA
GMA
GMA
GMA
GMA
GMA
GMA
GMA
The ADD8701 is designed to meet the rail-to-rail capability
needed by the application and yet offers a low cost-per-channel
solution. The design maximizes the die area by offering channels
to swing to the positive and negative rails. It is imperative that
the channels swinging close to the supply rail be used for the
positive gamma references and that the channels swinging close
to GND be used for the negative gamma references. See Figure 2
for an example of the application circuit.
A8
A7
LCD VCOM Buffer
The output of the VCOM buffer is designed to control the voltage
on the back plate of the LCD display. The buffer must be capable
of sinking and sourcing capacitive pulse current. The amplifier
stability is designed for high load capacitance. A high quality
ceramic capacitor is recommended to supply short duration current
pulses at the output. The VCOM buffer of the ADD8701 can
handle up to 35 mA of continuous output current and can drive
up to 1,000 nF of pure capacitive load.
A6
A5
A4
Unused Buffers
Inputs of any unused buffer should be tied to the ground plane.
A3
A2
GMA
A1
ADD8701
LCD SOURCE DRIVER
Figure 2. Application Circuit
REV. 0
–7–
ADD8701
OUTLINE DIMENSIONS
32-Lead Lead Frame Chip Scale Package [LFCSP]
(CP-32)
Dimensions shown in millimeters
5.00
BSC SQ
0.60 MAX
PIN 1
0.60 MAX
INDICATOR
25
24
32
1
PIN 1
INDICATOR
0.50
BSC
3.25
3.10
2.95
4.75
BSC SQ
TOP
VIEW
BOTTOM
VIEW
SQ
0.50
0.40
0.30
17
16
8
9
3.50
REF
0.80 MAX
0.65 NOM
12ꢄ MAX
0.05 MAX
0.02 NOM
1.00
0.90
0.80
0.30
0.23
0.18
COPLANARITY
0.08
0.20 REF
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2
–8–
REV. 0
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