ADG4613BRUZ-REEL7 [ADI]

Power-Off Protection ±5 V, 12 V, Quad SPST Switches with 5 Ω On Resistance; 断电保护功能±5 V, 12 V ,四通道SPST 5 I开关©通电阻
ADG4613BRUZ-REEL7
型号: ADG4613BRUZ-REEL7
厂家: ADI    ADI
描述:

Power-Off Protection ±5 V, 12 V, Quad SPST Switches with 5 Ω On Resistance
断电保护功能±5 V, 12 V ,四通道SPST 5 I开关©通电阻

复用器 开关 复用器或开关 信号电路 光电二极管 输出元件
文件: 总24页 (文件大小:393K)
中文:  中文翻译
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Power-Off Protection ± ± ꢀV ꢁ+1 ꢀV ꢂQua  
SPST Switches with ± Ω On Resistunce  
ADG46+1/ADG46+3  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
S1  
Power-off protection  
S1  
IN1  
IN2  
IN3  
IN4  
IN1  
IN2  
IN3  
IN4  
Switch guaranteed off with no power supplies present  
Inputs are high impedance with no power  
Switch turns off when input > VDD + VT  
Overvoltage protection up to 16 V  
PSS robust  
Negative signal capability passes signals down to −5.5 V  
6.1 Ω maximum on resistance  
1.4 Ω on-resistance flatness  
D1  
S2  
D1  
S2  
D2  
S3  
D2  
S3  
ADG4612  
ADG4613  
D3  
S4  
D3  
S4  
3 V to 5.5 V dual supply  
D4  
D4  
3 V to 12 V single supply  
3 V logic compatible inputs  
SWITCHES SHOWN FOR A LOGIC 1 INPUT.  
Figure 1.  
Rail-to-rail operation  
16-lead TSSOP and 16-lead 3 mm × 3 mm LFCSP  
The low on resistance of these switches make them ideal  
solutions for data acquisition and gain switching applications  
where low on resistance and distortion is critical. The on-  
resistance profile is very flat over the full analog input range  
ensuring excellent linearity and low distortion when switching  
audio signals.  
APPLICATIONS  
Hot swap applications  
Data acquisition systems  
Battery-powered systems  
Automatic test equipment  
Communication systems  
Relay replacement  
PRODUCT HIGHLIGHTS  
1. Power-Off Protection On Both S and D Pins.  
2. PSS Robustness.  
GENERAL DESCRIPTION  
The ADG4612/ADG4613 contain four independent single-  
pole/single-throw (SPST) switches. The ADG4612 switches are  
turned on with Logic 1 on the appropriate control input. The  
ADG4613 has two switches with digital control logic similar to  
that of the ADG4612; the logic is inverted on the other two  
switches. Each switch conducts equally well in both directions  
when on, and each switch has an input signal range that extends  
to the supplies. The ADG4613 exhibits break-before-make  
switching action for use in multiplexer applications.  
3. Overvoltage Protection up to 16 V.  
4. 5.2 Ω On Resistance.  
5. 16-Lead TSSOP and 3 mm × 3 mm LFCSP Packages.  
When no power supplies are present, the switch remains in the  
off condition, and the switch inputs are high impedance inputs,  
ensuring that no current flows, which can damage the switch or  
downstream circuitry. This is very useful in applications where  
analog signals may be present at the switch inputs before power  
is applied or where the user has no control over the power supply  
sequence.  
In the off condition, signal levels up to 16 V are blocked. Also,  
when the analog input signal levels exceed VDD by VT, the switch  
turns off.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2010 Analog Devices, Inc. All rights reserved.  
 
 
 
 
ADG46+1/ADG46+3  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Thermal Resistance.......................................................................9  
ESD Caution...................................................................................9  
Pin Configurations and Function Descriptions......................... 10  
Typical Performance Characteristics ........................................... 11  
Test Circuits..................................................................................... 14  
Terminology.................................................................................... 16  
Theory of Operation ...................................................................... 17  
Bipolar Operation and Single-Supply Operation................... 18  
Applications Information.............................................................. 19  
Outline Dimensions....................................................................... 21  
Ordering Guide .......................................................................... 22  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Functional Block Diagram .............................................................. 1  
Product Highlights ........................................................................... 1  
Specifications..................................................................................... 3  
5 V Dual Supply............................................................................ 3  
12 V Single Supply........................................................................ 5  
5 V Single Supply.......................................................................... 7  
Continuous Current Per Channel, Sx or Dx............................. 8  
Power Supply Operation.............................................................. 8  
Absolute Maximum Ratings............................................................ 9  
REVISION HISTORY  
10/10—Revision 0: Initial Version  
Rev. 0 | Page 2 of 24  
ADG4612/ADG4613  
SPECIFICATIONS  
5 V DUAL SUPPLY  
VDD = +5 V ꢀ0%, VSS = −5 V ꢀ0%, GND = 0 V, unless otherwise noted.  
Table 1.  
Parameter  
25°C  
−40°C to +85°C Unit  
Test Conditions/Comments  
ANALOG SWITCH  
Analog Signal Range (Normal Mode)  
−5.5 V to VDD  
7.6  
V
VDD to VSS = 16 V maximum  
VS = 4.5 V, IS = −10 mA; see Figure 22  
VDD = +4.5 V, VSS = −4.5 V  
On Resistance (RON  
)
5.2  
6.1  
0.05  
Ω typ  
Ω max  
Ω typ  
On-Resistance Match Between Channels  
(∆RON  
VS = 4.5 V, IS = −10 mA  
)
0.15  
1.4  
1.75  
0.18  
2.2  
Ω max  
Ω typ  
Ω max  
On-Resistance Flatness (RFLAT (ON)  
)
VS = 4.5 V, IS = −10 mA  
LEAKAGE CURRENTS (NORMAL MODE)  
Source Off Leakage, IS (Off)  
VDD = +5.5 V, VSS = −5.5 V  
5
nA typ  
VS = 4.5 V, VD = 
ט
4.5 V; see Figure 23  
10  
5
300  
300  
700  
nA max  
nA typ  
nA max  
nA typ  
nA max  
Drain Off Leakage, ID (Off)  
VS = 4.5 V, VD = 
ט
4.5 V; see Figure 23  
10  
10  
16  
Channel On Leakage, ID (On), IS (On)  
VS = VD = 4.5 V; see Figure 24  
LEAKAGE CURRENTS (ISOLATION MODE)  
Source Off Leakage, IS (Off)  
0.03  
0.1  
μA typ  
μA max  
VDD = 0 V or floating, VSS = 0 V or floating, GND = 0 V  
VS = −5.5 V, VD = +10.5 V; or VS = +10.5 V, VD = −5.5 V;  
see Figure 23  
VDD = +5.5 V, VSS = −5.5 V or 0 V  
VS = −5.5 V, VD = +10.5 V; or VS = +10.5 V, VD = −5.5 V;  
see Figure 23  
2.5  
30  
8
22  
μA typ  
μAmax  
Drain Off Leakage, ID (Off)  
0.03  
0.1  
μA typ  
μA max  
VDD = 0 V or floating, VSS = 0 V or floating, GND = 0 V  
VS = −5.5 V, VD = +10.5 V; or VS = +10.5 V, VD = −5.5 V;  
see Figure 23  
VDD = +5.5 V, VSS = −5.5 V or 0 V  
VS = −5.5 V, VD = +10.5 V; or VS = +10.5 V, VD = −5.5 V;  
see Figure 23  
2.5  
30  
8
22  
μA typ  
μA max  
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current, IINL  
2.0  
0.8  
V min  
V max  
μA typ  
μA max  
μA typ  
μA max  
kΩ typ  
pF typ  
0.015  
0.1  
13  
16  
400  
4
VIN = VGND  
VIN = VDD  
0.15  
18  
Input Current, IINH  
Logic Pull-Down Resistance, RPD  
Digital Input Capacitance, CIN  
DYNAMIC CHARACTERISTICS1  
tON  
73  
ns typ  
ns max  
ns typ  
ns max  
RL = 300 Ω, CL = 35 pF  
VS = 3 V; see Figure 25  
RL = 300 Ω, CL = 35 pF  
VS = 3 V; see Figure 25  
125  
100  
125  
149  
149  
tOFF  
Rev. 0 | Page 3 of 24  
 
ADG4612/ADG4613  
Parameter  
25°C  
−40°C to +85°C Unit  
Test Conditions/Comments  
RL = 50 Ω, CL = 35 pF  
VS1 = VS2 = 3 V; see Figure 26  
VS = 2 V to 8 V, RL = 300 Ω, CL = 35 pF  
VS = 2 V to 8 V, RL = 300 Ω, CL = 35 pF  
Break-Before-Make Time Delay, tD  
(ADG4613 Only)  
Fault Response Time  
Fault Recovery Time  
Threshold Voltage, VT  
Charge Injection  
Off Isolation  
20  
ns typ  
3
ns min  
ns typ  
μs typ  
V typ  
295  
1.2  
1.8  
225  
−54  
−71  
0.13  
pC typ  
dB typ  
dB typ  
% typ  
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 27  
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28  
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29  
RL = 110 Ω, 6 V p-p, f = 20 Hz to 20 kHz;  
see Figure 31  
Channel-to-Channel Crosstalk  
Total Harmonic Distortion + Noise, THD + N  
Insertion Loss  
−3 dB Bandwidth  
CS (Off)  
−0.5  
293  
13  
13  
50  
dB typ  
RL = 50 Ω, CL = 5 pF; f = 1 MHz; see Figure 30  
MHz typ RL = 50 Ω, CL = 5 pF; see Figure 30  
pF typ  
pF typ  
pF typ  
VS = 0 V, f = 1 MHz  
VS = 0 V, f = 1 MHz  
VS = 0 V, f = 1 MHz  
CD (Off)  
CD (On), CS (On)  
POWER REQUIREMENTS  
Normal Mode  
IDD  
Digital inputs = 0 V or VDD  
VDD = +5.5 V, VSS = −5.5 V  
90  
140  
27  
μA typ  
μA max  
μA typ  
μA max  
165  
58  
ISS  
VDD = +5.5 V, VSS = −5.5 V  
50  
Isolation Mode  
IDD  
VDD = +5.5 V, VSS = −5.5 V or floating  
Digital inputs = 0 V or 5.5 V  
VS = −5.5 V or +10.5 V  
VDD = 0 V or floating, VSS = −5.5 V  
Digital inputs = 0 V or 5.5 V  
VS = −5.5 V or +10.5 V  
90  
140  
μA typ  
μA max  
165  
6
ISS  
0.1  
0.2  
μA typ  
μA max  
1 Guaranteed by design; not subject to production test.  
Rev. 0 | Page 4 of 24  
 
ADG46+1/ADG46+3  
12 V SINGLE SUPPLY  
VDD = 12 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.  
Table 2.  
Parameter  
25°C  
−40°C to +85°C Unit  
Test Conditions/Comments  
ANALOG SWITCH  
Analog Signal Range  
On-Resistance (RON)  
−5.5 V to VDD  
6.4  
V
VDD to VSS = 16 V maximum  
VS = 0 V to +10 V, IS = −10 mA; see Figure 22  
VDD = 10.8 V, VSS = 0 V  
4.5  
5.1  
0.05  
Ω typ  
Ω max  
Ω typ  
On-Resistance Match Between Channels  
(∆RON)  
VS = 0 V to +10 V, IS = −10 mA  
0.15  
1
1.25  
0.18  
1.6  
Ω max  
Ω typ  
Ω max  
On-Resistance Flatness (RFLAT (ON)  
)
VS = 0 V to +10 V, IS = −10 mA  
LEAKAGE CURRENTS  
Normal Mode  
VDD = 13.2 V, VSS = 0 V  
Source Off Leakage, IS (Off)  
±3  
±10  
±3  
±10  
±±  
±11  
nA typ  
nA max  
nA typ  
nA max  
nA typ  
nA max  
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23  
±200  
±200  
±300  
Drain Off Leakage, ID (Off)  
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23  
VS = VD = 1 V or 10 V; Figure 24  
Channel On Leakage, ID (On), IS (On)  
Isolation Mode  
Source Off Leakage, IS (Off)  
±0.05  
μA typ  
VDD = 0 V or floating, VSS = 0 V or floating,  
GND = 0 V  
±0.3  
±10  
±3  
μA max  
μA typ  
VS = 1 V/16 V, VD = 16 V/1 V; see Figure 23  
VDD = 13.2 V, VSS = 0 V, VS = 16 V/1 V, VD = 1 V/16 V;  
see Figure 23  
±28  
±0.05  
±38  
μA max  
μA typ  
Drain Off Leakage, ID (Off)  
VDD = 0 V or floating, VSS = 0 V or floating,  
GND = 0 V VS = 1 V/16 V, VD = 16 V/1 V;  
see Figure 23  
±0.3  
±10  
±3  
μA max  
μA typ  
VDD = 13.2 V, VSS = 0 V  
VS = 16 V/1 V, VD = 1 V/16 V; see Figure 23  
±28  
±38  
μA max  
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current, IINL  
2.0  
0.8  
V min  
V max  
±0.015  
±0.1  
±13  
±16  
±34  
±40  
400  
4
μA typ  
μA max  
μA typ  
μA max  
μA typ  
μA max  
kΩ typ  
pF typ  
VIN = VGND  
VIN = 5 V  
VIN = VDD  
±0.15  
±18  
Input Current, IINH  
Input Current, IINH  
±42  
Logic Pull-Down Resistance, RPD  
Digital Input Capacitance, CIN  
DYNAMIC CHARACTERISTICS1  
tON  
46  
±3  
±0  
91  
ns typ  
ns max  
ns typ  
ns max  
RL = 300 Ω, CL = 35 pF  
VS = 8 V; see Figure 25  
RL = 300 Ω, CL = 35 pF  
VS = 8 V; see Figure 25  
90  
tOFF  
103  
Rev. 0 | Page 5 of 24  
 
ADG46+1/ADG46+3  
Parameter  
25°C  
−40°C to +85°C Unit  
Test Conditions/Comments  
RL = 50 Ω, CL = 35 pF  
VS1 = VS2 = 8 V; see Figure 26  
VS = 9 V to 15 V, RL = 300 Ω, CL = 35 pF  
VS = 9 V to 15 V, RL = 300 Ω, CL = 35 pF  
Break-Before-Make Time Delay, tD  
(ADG4613 Only)  
Fault Response Time  
Fault Recovery Time  
Threshold Voltage, VT  
Charge Injection  
Off Isolation  
1±  
ns typ  
11  
ns min  
ns typ  
μs typ  
V typ  
250  
1.4  
1.8  
292  
−56  
−±4  
0.26  
pC typ  
dB typ  
dB typ  
% typ  
VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 2±  
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 28  
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29  
RL = 110 Ω, 6 V p-p, f = 20 Hz to 20 kHz; see  
Figure 31  
Channel-to-Channel Crosstalk  
Total Harmonic Distortion + Noise, THD + N  
Insertion Loss  
−3 dB Bandwidth  
CS (Off)  
−0.2±  
250  
11.5  
11.5  
48  
dB typ  
MHz typ  
pF typ  
pF typ  
pF typ  
RL = 50 Ω, CL = 5 pF; f = 1 MHz; see Figure 30  
RL = 50 Ω, CL = 5 pF; see Figure 30  
VS = 0 V, f = 1 MHz  
VS = 0 V, f = 1 MHz  
VS = 0 V, f = 1 MHz  
CD (Off)  
CD (On), CS (On)  
POWER REQUIREMENTS  
Normal Mode  
IDD  
VDD = 13.2 V, VSS = 0 V  
Digital inputs = 0 V or VDD  
90  
μA typ  
μA max  
μA typ  
μA max  
140  
600  
660  
165  
900  
IDD  
Digital inputs = 5 V  
Isolation Mode  
IDD  
VDD = 13.2 V, VSS = 0 V or floating  
VS = 16 V or 1 V  
90  
μA typ  
140  
165  
μA max  
Digital inputs = 0 V or VDD  
1 Guaranteed by design, not subject to production test.  
Rev. 0 | Page 6 of 24  
 
ADG46+1/ADG46+3  
5 V SINGLE SUPPLY  
VDD = 5 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.  
Table 3.  
Parameter  
25°C  
−40°C to +85°C  
Unit  
Test Conditions/Comments  
ANALOG SWITCH  
Analog Signal Range  
On-Resistance (RON)  
−5.5 V to VDD  
V
VDD to VSS = 16 V maximum  
VS = 0 V to +4.5 V, IS = −10 mA; see Figure 22  
VDD = 4.5 V, VSS = 0 V,  
12.5  
14.±  
0.15  
0.5  
6.2  
8
Ω typ  
Ω max  
Ω typ  
Ω max  
Ω typ  
Ω max  
1±  
On-Resistance Match Between Channels (∆RON)  
VS = 0 V to +4.5 V, IS = −10 mA  
0.6  
8.9  
On-Resistance Flatness (RFLAT (ON)  
)
VS = 0 V to +4.5 V, IS = −10 mA  
LEAKAGE CURRENTS  
Normal Mode  
VDD = 5.5 V, VSS = 0 V  
Source Off Leakage, IS (Off)  
±0.8  
±3  
±0.8  
±3  
±2  
±5  
nA typ  
nA max  
nA typ  
nA max  
nA typ  
nA max  
VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 23  
±80  
Drain Off Leakage, ID (Off)  
VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 23  
VS = VD = 1 V or 4.5 V; see Figure 24  
±80  
Channel On Leakage, ID (On), IS (On)  
±120  
Isolation Mode  
Source Off Leakage, IS (Off)  
±0.05  
μA typ  
VDD = 0 V or floating, VSS = 0 V or floating,  
GND = 0 V  
±0.15  
±10  
±28  
±3  
μA max VS = 1 V/16 V, VD = 16 V/1 V; see Figure 23  
μA typ VDD = 5.5 V, VSS = 0 V  
μA max VS = 1 V/16 V, VD = 16 V/1 V ; Figure 23  
±38  
Drain Off Leakage, ID (Off)  
±0.05  
μA typ  
VDD = 0 V or floating, VSS = 0 V or floating,  
GND = 0 V  
±0.15  
±10  
±3  
μA max VS = 1 V/16 V, VD = 16 V/1 V; see Figure 23  
μA typ VDD = 5.5 V, VSS = 0 V  
±28  
±38  
μA max VS = 1 V/16 V, VD = 16 V/1 V ; see Figure 23  
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current, IINL  
2.0  
0.8  
V min  
V max  
±0.015  
±0.1  
±13  
±16  
400  
4
μA typ  
μA max  
μA typ  
μA max  
kΩ typ  
pF typ  
VIN = VGND  
VIN = VDD  
±0.15  
±18  
Input Current, IINH  
Logic Pull-Down Resistance, RPD  
Digital Input Capacitance, CIN  
DYNAMIC CHARACTERISTICS1  
tON  
116  
190  
8±  
120  
±0  
ns typ  
ns max  
ns typ  
ns max  
ns typ  
ns min  
ns typ  
μs typ  
V typ  
RL = 300 Ω, CL = 35 pF  
VS = 3 V; see Figure 25  
RL = 300 Ω, CL = 35 pF  
VS = 3 V; see Figure 25  
226  
136  
32  
tOFF  
Break-Before-Make Time Delay, tD  
(ADG4613 Only)  
Fault Response Time  
Fault Recovery Time  
Threshold Voltage, VT  
Charge Injection  
RL = 50 Ω, CL = 35 pF  
VS1 = VS2 = 3 V; see Figure 26  
VS = 2 V to 8 V, RL = 300 Ω, CL = 35 pF  
VS = 2 V to 8 V, RL = 300 Ω, CL = 35 pF  
240  
1.2  
1.8  
±5  
pC typ  
dB typ  
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 2±  
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 28  
Off Isolation  
−54  
Rev. 0 | Page ± of 24  
 
ADG46+1/ADG46+3  
Parameter  
25°C  
−±1  
0.85  
−40°C to +85°C  
Unit  
Test Conditions/Comments  
Channel-to-Channel Crosstalk  
Total Harmonic Distortion + Noise, THD + N  
dB typ  
% typ  
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 29  
RL = 110 Ω, f = 20 Hz to 20 kHz, VS = 3.5 V p-p;  
see Figure 31  
Insertion Loss  
−3 dB Bandwidth  
−0.5  
293  
dB typ  
MHz  
typ  
RL = 50 Ω, CL = 5 pF; f = 1 MHz; see Figure 30  
RL = 50 Ω, CL = 5 pF; see Figure 30  
CS (Off)  
CD (Off)  
CD (On), CS (On)  
POWER REQUIREMENTS  
Normal Mode  
IDD  
14  
14  
50  
pF typ  
pF typ  
pF typ  
VS = 0 V, f = 1 MHz  
VS = 0 V, f = 1 MHz  
VS = 0 V, f = 1 MHz  
VDD = 5.5 V, VSS = 0 V  
Digital inputs = 0 V or VDD  
90  
μA typ  
140  
165  
165  
μA max  
Isolation Mode  
IDD  
VDD = 5.5 V, VSS = 0 V or floating  
Digital inputs = 0 V or 5.5 V  
90  
140  
μA typ  
μA max VS = 1 V/16 V, VD = 16 V/1 V  
1 Guaranteed by design, not subject to production test.  
CONTINUOUS CURRENT PER CHANNEL, SX OR DX  
Table 4.  
Parameter  
25°C  
85°C  
Unit  
CONTINUOUS CURRENT, Sx OR Dx  
VDD = +5 V, VSS = −5 V  
TSSOP (θJA = 112°C/W)  
LFCSP (θJA = 48.±°C/W)  
VDD = 12 V, VSS = 0 V  
TSSOP (θJA = 112°C/W)  
LFCSP (θJA = 48.±°C/W)  
VDD = 5 V, VSS = 0 V  
109  
160  
52  
83  
mA maximum  
mA maximum  
113  
1±5  
56  
8±  
mA maximum  
mA maximum  
TSSOP (θJA = 112°C/W)  
LFCSP (θJA = 48.±°C/W)  
±8  
118  
39  
56  
mA maximum  
mA maximum  
POWER SUPPLY OPERATION  
Temperature range is −40°C to +105°C, unless otherwise noted.  
Table 5.  
Parameter  
POWER SUPPLY  
VDD to VSS  
VDD  
VSS  
Min  
Max  
Unit  
Comments  
16  
16  
0
V
V
V
GND = 0 V  
GND = 0 V  
GND = 0 V  
2.±  
−5.5  
DUAL SUPPLY  
VSS/VDD  
−5.5  
0
+10.5  
16  
V
V
VDD to VSS = 16 V, GND = 0 V  
SINGLE SUPPLY  
VDD  
Analog Signal Range, VD, VS  
Normal Mode  
Isolation Mode  
VDD to VSS = 16 V, GND = 0 V, VSS = 0 V  
VDD to VSS = 16 V maximum  
Most negative (VS ,VD, or VSS) to most positive  
(VS ,VD, Inx, or VDD) = 16 V maximum  
−5.5  
−5.5  
VDD  
+16  
V
V
Rev. 0 | Page 8 of 24  
 
 
 
 
 
ADG46+1/ADG46+3  
ABSOLUTE MAXIMUM RATINGS  
TA = 25°C, unless otherwise noted.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those listed in the operational sections  
of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Table 6.  
Parameter  
Rating  
VDD to VSS  
18 V  
VDD to GND  
VSS to GND  
Analog Inputs; VS to VD  
Analog Inputs; VD , VS  
Most Negative (VS,VD or VSS) to  
Most Positive (VS,VD, Inx, or VDD)  
−0.3 V to +18 V  
+0.3 V to −± V  
18 V  
−± V to +18 V  
18 V  
Only one absolute maximum rating may be applied at any one  
time.  
THERMAL RESISTANCE  
Digital Inputs, INx  
GND − 0.3 V to +18 V  
θJA is specified for a 4-layer board and, where applicable, with  
the exposed pad soldered to the board.  
Peak Current, Sx or Dx  
350 mA (pulsed at 1 ms,  
10% duty cycle max)  
Continuous Current, Sx or Dx1  
Operating Temperature Range  
Storage Temperature Range  
Junction Temperature  
Reflow Soldering Peak  
Temperature, Pb-free  
Data + 15%  
−40°C to +105°C  
−65°C to +150°C  
150°C  
Table 7. Thermal Resistance  
Package Type  
16-Lead TSSOP  
16-Lead LFCSP  
θJA  
Unit  
°C/W  
°C/W  
112  
48.±  
260 (0/−5)°C  
1 See Table 4.  
ESD CAUTION  
Rev. 0 | Page 9 of 24  
 
 
 
 
ADG46+1/ADG46+3  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
IN1  
D1  
S1  
IN2  
D2  
S2  
PIN 1  
INDICATOR  
12 S2  
11  
10 NC  
S3  
S1 1  
ADG4612/  
ADG4613  
TOP VIEW  
(Not to Scale)  
V
V
DD  
SS  
V
V
2
ADG4612/  
ADG4613  
TOP VIEW  
(Not to Scale)  
DD  
SS  
GND  
NC  
S3  
GND 3  
S4 4  
9
S4  
D4  
D3  
IN3  
IN4  
NOTES  
NC = NO CONNECT  
1. EXPOSED PAD TIED TO SUBSTRATE, GND.  
2. NC = NO CONNECT.  
Figure 3. LFCSP Pin Configuration  
Figure 2. TSSOP Pin Configuration  
Table 8. Pin Function Descriptions  
Pin No.  
LFCSP  
Mnemonic  
IN1  
D1  
Description  
TSSOP  
1
15  
16  
1
Logic Control Input 1. This pin has an internal 400 kΩ pull-down resistor to GND.  
Drain Terminal 1. Can be an input or output.  
Source Terminal 1. Can be an input or output.  
Most Negative Power Supply Potential.  
2
3
S1  
4
2
VSS  
5
6
±
3
4
5
GND  
S4  
D4  
Ground (0 V) Reference.  
Source Terminal 4. Can be an input or output.  
Drain Terminal 4. Can be an input or output.  
8
9
6
±
8
9
10  
11  
12  
13  
14  
0
IN4  
IN3  
D3  
S3  
NC  
VDD  
S2  
D2  
IN2  
EPAD  
Logic Control Input 4. This pin has an internal 400 kΩ pull-down resistor to GND.  
Logic Control Input 3. This pin has an internal 400 kΩ pull-down resistor to GND.  
Drain Terminal 3. Can be an input or output.  
Source Terminal 3. Can be an input or output.  
No Connection.  
Most Positive Power Supply Potential.  
Source Terminal 2. Can be an input or output.  
Drain Terminal 2. Can be an input or output.  
10  
11  
12  
13  
14  
15  
16  
N/A  
Logic Control Input 2. This pin has an internal 400 kΩ pull-down resistor to GND.  
The exposed pad is connected to the substrate GND. For best heat dissipation, it is  
recommended that this pad be connected to GND. If heat dissipation is not a concern,  
it is possible to leave the pad floating. Connecting the exposed pad to VSS (if VSS is not  
equal to GND) can cause current to flow and can damage the part.  
Table 9. ADG4612 Truth Table  
ADG4612 INx  
Switch Condition  
1
0
On  
Off  
Table 10. ADG4613 Truth Table  
ADG4613 INx  
S1, S4  
Off  
On  
S2, S3  
On  
Off  
0
1
Rev. 0 | Page 10 of 24  
 
ADG46+1/ADG46+3  
TYPICAL PERFORMANCE CHARACTERISTICS  
9
12  
10  
8
T
= 25°C  
V
V
= +3V  
= –3V  
A
DD  
SS  
8
7
6
5
4
3
2
1
0
V
V
= +3V  
= –3V  
DD  
SS  
T
= +105°C  
A
T
= +85°C  
A
V
V
= +4.5V  
= –4.5V  
DD  
SS  
6
T
= –40°C  
A
4
V
V
= +5V  
= –5V  
DD  
SS  
V
V
= +5.5V  
= –5.5V  
DD  
SS  
T
= +25°C  
A
2
0
–6  
–5  
–4  
–3  
V
–2  
–1  
0
1
2
3
–6  
–4  
–2  
V
0
2
4
6
OR V VOLTAGE (V)  
OR V VOLTAGE (V)  
S
D
S
D
Figure 7. On Resistance as a Function of VS, VD for Different Temperatures,  
3 V Dual Supply  
Figure 4. On Resistance as a Function of VS, VD (Dual Supply)  
14  
12  
10  
8
6
T
= 25°C  
V
A
V
V
= +12V  
= 0V  
DD  
SS  
T
= +105°C  
A
= 4.5V  
T
= +85°C  
DD  
V
A
= 0V  
SS  
5
4
3
2
1
0
V
= 5V  
= 0V  
DD  
V
SS  
V
= 5.5V  
DD  
V
V
= 10.8V  
= 0V  
DD  
SS  
V
V
= 12V  
= 0V  
DD  
SS  
6
V
= 0V  
SS  
T
= +25°C  
A
T
= –40°C  
A
4
2
V
V
= 13.2V  
= 0V  
DD  
SS  
V
V
= 16V  
= 0V  
DD  
SS  
0
–6  
–4  
–2  
0
2
4
6
8
10  
12  
14  
16  
–4  
–2  
0
2
4
6
8
10  
12  
V
OR V VOLTAGE (V)  
D
S
V
OR V VOLTAGE (V)  
S
D
Figure 8. On Resistance as a Function of VS, VD for Different Temperatures,  
12 V Single Supply  
Figure 5. On Resistance as a Function of VS, VD (Single Supply)  
14  
7
V
V
= +5V  
= 0V  
DD  
SS  
V
V
= +5V  
= –5V  
DD  
SS  
12  
10  
8
T = +105°C  
A
6
5
4
3
2
1
0
T
= +105°C  
A
T
= +85°C  
A
T
= +85°C  
A
6
T = –40°C  
A
T
= +25°C  
A
T
= –40°C  
A
4
T
= +25°C  
A
2
0
–6  
–4  
–2  
0
2
4
–6  
–4  
–2  
0
2
4
V
OR V VOLTAGE (V)  
S
D
V
OR V VOLTAGE (V)  
S
D
Figure 6. On Resistance as a Function of VS, VD for Different Temperatures,  
5 V Dual Supply  
Figure 9. On Resistance as a Function of VS, VD for Different Temperatures,  
5 V Single Supply  
Rev. 0 | Page 11 of 24  
 
ADG46+1/ADG46+3  
100  
800  
600  
V
V
V
= 1V/4.5V  
= +5V  
= 0V  
BIAS  
0
DD  
SS  
V
V
V
= +5V  
= –5V  
DD  
SS  
400  
–100  
–200  
–300  
–400  
–500  
–600  
–700  
= 1V/4.5V  
BIAS  
200  
0
–200  
–400  
–600  
–800  
–1000  
I
I
I
I
I
I
, I (ON) +, +  
S
I
I
I
I
I
I
, I (ON) +, +  
S
D
S
D
D
S
D
D
S
D
D
S
D
(OFF) +, –  
, (OFF) , +  
(OFF) +, –  
(OFF) , +  
(OFF) +, –  
, (OFF) , +  
(OFF) +, –  
(OFF) , +  
, I (ON) , –  
, I (ON) , –  
S
S
0
20  
40  
60  
80  
100  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 10. Leakage Currents as a Function of Temperature, 5 V Dual Supply  
Figure 13. Leakage Currents as a Function of Temperature, 5 V Single Supply  
0.0020  
100  
0
I
T
PER LOGIC INPUT  
= 25°C  
DD  
0.0018  
0.0016  
0.0014  
0.0012  
0.0010  
0.0008  
0.0006  
0.0004  
0.0002  
0
A
V
V
V
= +3V  
= –3V  
DD  
SS  
V
V
V
V
= +12V, V = 0V  
SS  
DD  
DD  
DD  
DD  
= +5V, V = –5V  
SS  
= 1V/2V  
BIAS  
= +5V, V = 0V  
SS  
–100  
–200  
–300  
–400  
–500  
= +3V, V = 0V  
SS  
I
I
I
I
I
I
, I (ON) +, +  
S
D
S
D
D
S
D
(OFF) +, –  
, (OFF) , +  
(OFF) +, –  
(OFF) , +  
, I (ON) , –  
S
0
2
4
6
8
10  
12  
LOGIC (V)  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
Figure 14. IDD vs. Logic Level  
Figure 11. Leakage Currents as a Function of Temperature, 3 V Dual Supply  
500  
450  
400  
350  
300  
250  
200  
150  
100  
50  
300  
T
= 25°C  
A
V
V
V
= 12V  
= 0V  
DD  
SS  
200  
100  
= 1V/10V  
BIAS  
V
V
= +12V  
= +12V  
= 0V  
V
DD  
SS  
0
V
V
= +5V  
= –5V  
DD  
SS  
–100  
–200  
–300  
–400  
I
I
I
I
I
I
, I (ON) ++  
S
D
S
D
D
S
D
(OFF) +–  
, (OFF) +  
(OFF) +–  
(OFF) +  
V
V
= +5V  
= 0V  
DD  
SS  
, I (ON) –  
S
0
–5  
–3  
–1  
1
3
5
7
9
11  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
V
(V)  
S
Figure 12. Leakage Currents as a Function of Temperature,  
12 V Single Supply  
Figure 15. Charge Injection vs. Source Voltage  
Rev. 0 | Page 12 of 24  
ADG46+1/ADG46+3  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
140  
120  
100  
80  
LOAD = 110  
= 25°C  
T
A
tOFF (±5V)  
V
= 5V, V = 0V, V = 3.5V p-p  
SS  
tON (+5V)  
DD  
S
tOFF (+5V)  
60  
tOFF (±12V)  
tON (±5V)  
V
= 12V, V = 0V, V = 5V rms  
SS  
DD  
S
40  
tON (+12V)  
20  
V
= 5V, V = 5V, V = 5V rms  
SS  
DD  
S
0
–40  
0
5k  
10k  
FREQUENCY (Hz)  
15k  
20k  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
Figure 16. tON/tOFF Times vs. Temperature  
Figure 19. THD + N vs. Frequency  
2000  
1800  
1600  
1400  
1200  
1000  
800  
0
–20  
V
V
= +5V  
= –5V  
= 25°C  
DD  
SS  
tRECOVERY (+5V)  
T
A
tRECOVERY (+12V)  
–40  
–60  
tRECOVERY (±5V)  
–80  
600  
tRESPONSE (±5V)  
tRESPONSE (+12V)  
400  
–100  
200  
tRESPONSE (+5V)  
0
–40  
–120  
–20  
0
20  
40  
60  
80  
100  
1k  
10k  
100k  
1M  
10M  
100M  
1G  
TEMPERATURE (°C)  
FREQUENCY (Hz)  
Figure 17. Off Isolation vs. Frequency  
Figure 20. Fault Response Time/Fault Recovery Time  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
0
–20  
–40  
–60  
–80  
V
V
A
= +5V  
= –5V  
= 25°C  
V
V
T
= +5V  
= –5V  
= 25°C  
DD  
SS  
DD  
SS  
T
A
NO DECOUPLING  
CAPACITORS  
DECOUPLING  
CAPACITORS  
–100  
–120  
1k  
10k  
100k  
1M  
10M  
100M  
1G  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 18. Crosstalk vs. Frequency  
Figure 21. ACPSRR vs. Frequency  
Rev. 0 | Page 13 of 24  
ADG46+1/ADG46+3  
TEST CIRCUITS  
I
DS  
V1  
Sx  
R
Dx  
V
= V1/I  
DS  
S
ON  
Figure 22. On Resistance  
I
(OFF)  
A
I
(OFF)  
A
S
D
Sx  
Dx  
V
V
S
D
Figure 23. Off Leakage  
I
(ON)  
D
Sx  
Dx  
NC  
A
V
D
NC = NO CONNECT  
Figure 24. On Leakage  
V
V
DD  
DD  
SS  
0.1µF  
0.1µF  
V
V
SS  
V
L
OUT  
Sx  
Dx  
50%  
50%  
V
IN  
ADG4612  
R
300  
C
L
V
S
35pF  
INx  
90%  
90%  
V
OUT  
GND  
tOFF  
tON  
Figure 25. Switching Times  
V
V
DD  
DD  
SS  
V
0.1µF  
0.1µF  
IN  
50%  
50%  
0V  
0V  
V
V
SS  
90%  
90%  
V
V
S1  
D1  
OUT1  
OUT2  
V
V
V
S1  
OUT1  
C
35pF  
R
50  
L
L
S2  
D2  
V
S2  
OUT2  
C
35pF  
R
50ꢀ  
L
L
90%  
90%  
IN1,  
IN2  
0V  
ADG4613  
GND  
tD  
tD  
Figure 26. Break-Before-Make Time Delay, tD  
Rev. 0 | Page 14 of 24  
 
 
 
 
 
 
ADG46+1/ADG46+3  
V
V
V
DD  
SS  
V
DD  
SS  
V
ADG4612  
IN  
V
R
OUT  
S
Sx  
Dx  
ON  
OFF  
C
1nF  
L
V
S
INx  
V
OUT  
V  
OUT  
Q
= C × V  
L
INJ  
OUT  
GND  
Figure 27. Charge Injection  
V
V
DD  
V
V
V
DD  
SS  
SS  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
NETWORK  
ANALYZER  
NETWORK  
ANALYZER  
V
V
DD  
V
DD  
SS  
SS  
Sx  
Sx  
50  
50ꢀ  
50ꢀ  
INx  
INx  
V
V
S
S
Dx  
Dx  
V
V
OUT  
OUT  
V
V
IN  
IN  
R
R
L
L
50ꢀ  
50ꢀ  
GND  
GND  
V
V
WITH SWITCH  
OUT  
OUT  
OFF ISOLATION = 20 log  
INSERTION LOSS = 20 log  
V
V
WITHOUT SWITCH  
S
OUT  
Figure 30. Bandwidth  
Figure 28. Off Isolation  
V
V
DD  
SS  
V
V
DD  
SS  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
AUDIO PRECISION  
NETWORK  
ANALYZER  
V
V
DD  
SS  
V
V
SS  
DD  
R
S
V
OUT  
S1  
R
50ꢀ  
L
Sx  
INx  
V
D
S
R
V p-p  
50ꢀ  
S2  
Dx  
V
OUT  
V
IN  
R
L
V
S
110ꢀ  
GND  
GND  
V
OUT  
CHANNEL-TO-CHANNEL CROSSTALK = 20 log  
V
S
Figure 31. THD + Noise  
Figure 29. Channel-to-Channel Crosstalk  
Rev. 0 | Page 15 of 24  
 
 
 
 
 
ADG46+1/ADG46+3  
TERMINOLOGY  
tOFF  
OFF represents the delay between applying the digital control  
input and the output switching off.  
IDD  
t
I
DD represents the positive supply current.  
ISS  
tD  
I
SS represents the negative supply current.  
tD represents the off time measured between the 80% point of  
both switches when switching from one address state to  
another.  
VD, VS  
VD and VS represent the analog voltage on Terminal D and  
Terminal S, respectively.  
Fault Response Time  
Fault response time is the delay between a fault condition (VS >  
RON  
RON represents the ohmic resistance between Terminal D and  
VDD) on an analog input and the corresponding output below VDD  
.
Terminal S.  
Fault Recovery Time  
ΔRON  
Fault recovery time is, in recovering from a fault condition, the  
delay between 50% of the input signal to 90% of the output  
signal.  
ΔRON represents the difference between the RON of any two  
channels.  
RFLAT (ON)  
Charge Injection  
A measure of the glitch impulse transferred from the digital  
input to the analog output during switching.  
Flatness that is defined as the difference between the maximum  
and minimum value of on resistance measured over the specified  
analog signal range is represented by RFLAT (ON)  
.
Off Isolation  
IS (Off)  
Off isolation is a measure of unwanted signal coupling through  
an off switch.  
IS (Off) is the source leakage current with the switch off.  
ID (Off)  
Charge Injection  
Charge injection is a measure of the glitch impulse transferred  
ID (Off) is the drain leakage current with the switch off.  
ID (On), IS (On)  
from the digital input to the analog output during switching.  
ID (On) and IS (On) represent the channel leakage currents with  
the switch on.  
Crosstalk  
Crosstalk is a measure of unwanted signal that is coupled  
through from one channel to another as a result of parasitic  
capacitance.  
VINL  
VINL is the maximum input voltage for Logic 0.  
VINH  
Bandwidth  
V
INH is the minimum input voltage for Logic 1.  
Bandwidth is the frequency at which the output is attenuated  
by 3 dB.  
IINL, IINH  
I
INL and IINH represent the low and high input currents of the  
On Response  
digital inputs.  
On response is the frequency response of the on switch.  
CD (Off)  
Insertion Loss  
CD (Off) represents the off switch drain capacitance, which is  
measured with reference to ground.  
Insertion loss is the loss due to the on resistance of the switch.  
Total Harmonic Distortion + Noise (THD + N)  
The ratio of the harmonic amplitude plus noise of the signal to  
the fundamental is represented by THD + N.  
CS (Off)  
CS (Off) represents the off switch source capacitance, which is  
measured with reference to ground.  
AC Power Supply Rejection Ratio (ACPSRR)  
CD (On), CS (On)  
CD (On) and CS (On) represent on switch capacitances, which  
are measured with reference to ground.  
ACPSRR is the ratio of the amplitude of signal on the output to  
the amplitude of the modulation. This is a measure of the ability  
of the part to avoid coupling noise and spurious signals that appear  
on the supply voltage pin to the output of the switch. The dc  
voltage on the device is modulated by a sine wave of 0.62 V p-p.  
CIN  
CIN is the digital input capacitance.  
tON  
tON represents the delay between applying the digital control  
input and the output switching on.  
Rev. 0 | Page 16 of 24  
 
ADG46+1/ADG46+3  
THEORY OF OPERATION  
V
DD by a threshold voltage, VT, the switch turns off and is in  
The ADG4612/ADG4613 contain four independent single-  
pole/single-throw (SPST) switches. Each switch is rail-to-rail  
and conducts equally well in both directions when on.  
isolation mode.  
If the analog input signal exceeds the negative supply, VSS, when  
the switch is off, the switch blocks a signal up to −5.5 V. If the  
switch is on, the switch remains on, and this signal is passed to  
the output. See the Negative Fault Condition; Negative Signal  
Handling section for more details.  
The ADG4612/ADG4613 has two modes of operation: normal  
mode and isolation mode.  
The operation modes are made possible by a special detection  
circuitry that monitors the voltage levels at the source or drain  
terminals and VDD relative to ground. Depending on these  
voltage levels, the device operates in normal mode or isolation  
mode accordingly.  
Isolation Mode  
In isolation mode, all switches are in the off condition. The  
switch inputs are isolated from the switch outputs. The switch  
inputs are high impedance inputs with greater than 475 kΩ  
impedance to VDD ground and across the switch. This prevents  
any current from flowing that can damage the switch. This is  
very useful in applications where analog signals may be present  
at the switch inputs before power is present or where the user  
has no control over the power supply sequence.  
Isolation mode is a useful feature that isolates the inputs from  
the outputs where input signals may be present before supplies  
or during positive fault conditions that can occur in applications.  
Normal Mode  
In normal mode, the switch functions as a normal 4 × SPST  
switch, whereby the switch is controlled by the logic input pins,  
IN1 to IN4.  
The switch is in isolation mode when  
No power supplies are present, that is, when VDD is floating  
or VDD ≤ 1 V; or  
The following three conditions need to be satisfied for the  
switch to be in the on condition;  
Input signal, VS, VD > VDD + VT  
VDD ≥ 2.7 V; and  
Input signal, VS, VD < VDD + VT ; and  
Logic input, INx set to on level  
The negative supply rail, VSS, can be floating or 0 V to −5.5 V.  
The ground pin must be connected to the ground potential.  
When the switch is in the on condition, if the signal range is  
from VDD to −5.5 V, the signals present on the switch inputs are  
passed through to the switch output. If the analog input exceeds  
Table 11. Switch Operation Mode  
VS, VD  
Switch  
Mode  
1
VDD  
VSS  
GND  
(Input Voltage, Sx or Dx)  
−5.5 V to +10.5 V  
0 V to 16 V  
−5.5 V to +10.5 V  
0 V to 16 V  
Switch Condition  
Floating  
X
0 V  
All switches off  
Inputs isolated from outputs  
All switches off  
Inputs isolated from outputs  
All switches off  
Inputs isolated from outputs  
Isolation  
0 V to 0.8 V  
X
0 V  
0 V  
0 V  
Isolation  
Isolation  
Normal  
VDD ≥ 2.± V  
X
VS, VD > VDD + VT  
VDD ≥ 2.± V to 16 V  
0 V to −5.5 V  
VDD to VDD – 16 V  
Switch state is determined by logic  
levels, INx  
1 X = don’t care; for example, floating, 0 V to −5.5 V.  
Rev. 0 | Page 1± of 24  
 
 
ADG46+1/ADG46+3  
Positive Fault Condition  
BIPOLAR OPERATION AND SINGLE-SUPPLY  
OPERATION  
If the analog input exceeds VDD by a threshold voltage, VT, then  
the switch turns off and is in isolation mode. The part can handle a  
fault of up to 16 V, referenced to the most negative signal. For  
example, if VDD= 5 V, VSS = 0 V, then the switch protects against  
an overvoltage of up to 16 V. If VSS = −5 V and VDD = +5 V, then  
the switch protects against an overvoltage of up to +11 V.  
The ADG4612/ADG4613 have a maximum operational range  
from VDD to VSS of 16 V. The maximum signal range from source  
to drain, VS to VD , is also 16 V. During operation of the device,  
the signal range can exceed the power supply rails, but the voltage  
between the most negative voltage on the device (VS,VD or VSS)  
should be within 16 V of the most positive voltage (VS, VD, INx,  
or VDD). These voltage ratings should be adhered to at all times  
for guaranteed functionality. See Table 5 for guaranteed supply  
ranges. Signal ranges and power supply ranges exceeding 16 V  
may affect the long-term reliability of the device.  
Negative Fault Condition; Negative Signal Handling  
The ADG4612/ADG4613 are not damaged if the analog inputs  
exceed the negative supply, VSS. If the switch is in the off condition,  
the switch blocks a signal up to −5.5 V. If the switch is in the on  
condition, the switch remains on, and the negative signal is passed  
to the output; therefore, the ADG4612/ADG4613 can pass a  
negative signal up to −5.5 V with VSS = 0 V. The user must ensure  
that the downstream circuitry can handle this signal level. Also,  
the user should ensure the voltage between the most negative  
voltage on the device (VS ,VD or VSS) is within 16 V of the most  
positive voltage (VS, VD, INx, or VDD).  
The ground pin must always be connected to the GND  
potential to ensure proper functionality in isolation and  
normal operation mode.  
The minimum VDD voltage that the part is guaranteed operational  
is 2.7 V. The maximum recommended VDD voltage is 16 V.  
The minimum supply voltage recommended on VSS is −5.5 V,  
and the maximum voltage allowable on VSS is 0 V. Therefore,  
given that the VDD to VSS range is 16 V maximum when, VSS  
=
−5.5 V, the VDD = +10.5 V maximum.  
Rev. 0 | Page 18 of 24  
 
 
ADG46+1/ADG46+3  
APPLICATIONS INFORMATION  
V
DD  
V
> V  
D
There are many application scenarios that benefit from the  
functionality offered on the ADG4612/ADG4613 switches.  
S
FORWARD  
CURRENT  
FLOWS  
The ADG4612/ADG4613 offer power-off protection, ensuring  
the switch is guaranteed off and inputs are high impedance with no  
power supplies present. This isolation mode is a useful feature  
that isolates the inputs from the outputs where input signals  
may be present before supplies. The isolation mode also protects  
the system against positive fault conditions that can occur in  
applications, ensuring that the switch turns off and protects  
downstream circuitry. For example, a module can be connected  
to a live backplane, supplying signals to the board before supplies  
are present. This is common in hot swap applications where a  
card could be hot plugged in a shelf where there are others cards  
already working and powered on.  
LOAD  
CURRENT  
FORWARD  
CURRENT  
Sx  
Dx  
R
S
R
L
S
V
GND  
V
SS  
Figure 33. ESD Protection Diodes on Conventional CMOS Switch  
Some users add external diodes or add current-limiting resistors to  
protect the device against the conditions shown in Figure 33.  
However, these solutions all have disadvantages in that they add  
extra board area, extra component count, and cost. The system  
level performance can also be affected by the higher on resistance  
from the current-limiting resistors or the higher leakage from  
external Schottky diodes. Using external diodes for protection  
still creates the problem where a floating VDD line can be pulled  
up to a diode drop from the input signal.  
The ADG4612/ADG4613 allow negative signals, down to −5.5 V  
to be passed without a negative supply. This can be very useful  
in applications that need to pass negative signals but do not  
have a negative supply available. This cannot be done with  
conventional CMOS switches because ESD protection diodes  
turn on and clamp the signals.  
Theses features ensure the system is very robust to power  
supply sequencing issues that can be present in conventional  
CMOS devices.  
V
DD  
V
> V  
D
S
FORWARD  
CURRENT  
FLOWS  
HOT SWAP MODULES  
HOT SWAP MODULES  
LIVE BACKPLANE  
LOAD  
CURRENT  
FORWARD  
CURRENT  
HOT SWAP MODULES  
Sx  
Dx  
CONTROLLER  
POWER SUPPLY  
R
S
R
L
S
V
SW  
GND  
V
SS  
Figure 34. External Protection Added to Protect Switch Against Damage If  
Signals Present on Inputs Without Power Supplies  
Figure 32. Typical Application  
The ADG4612/ADG4613 eliminate the concerns shown in  
Figure 34. There are no internal ESD diodes from the analog or  
digital inputs to VDD or VSS. If signals are present on the ADG4612/  
ADG4613 inputs before power is present, the switch is in isolation  
mode, which means that the inputs have high impedance to  
Signals on Inputs with No Power Present  
In conventional CMOS switches, ESD protection diodes can be  
found on the analog and digital inputs to VDD and GND or VSS  
(see Figure 33, for example). If an input voltage is present on the  
switch inputs with no power supplies applied, current can flow  
through the ESD protection diodes. If this current is not limited  
to a safe level, it is possible to damage the ESD protection diodes  
and, hence, the switch. Input signals may pass through the switch  
to the output affecting downstream circuitry. The user may also  
be exceeding the absolute maximum ratings of the devices, and,  
therefore, affecting the long-term reliability of the device.  
VDD, GND, and the output. This prevents current flow and  
protects the device from damage.  
Rev. 0 | Page 19 of 24  
 
 
 
ADG46+1/ADG46+3  
Power Supply Sequencing  
protection diodes. The VDD supply normally gets pulled up to  
the input voltage level minus a diode drop, VDD ~VS, VD − VDIODE  
This voltage can be high enough to power up other chips that  
are connected to this supply rail in a system, potentially damaging  
other components in that system.  
.
Another benefit of the ADG4612/ADG4613 is it eliminates  
concerns about the power supply sequence. The part can be  
powered up in any sequence without damage. For devices with  
conventional CMOS switches, it is recommend that power supplies  
are powered up before analog or digital inputs are present. The  
ADG4612/ADG4613 do not have any power supply sequencing  
requirements, thereby making them a very robust design. However,  
a ground must first be present for the device to function in isolation  
mode and normal mode.  
The ADG4612/ADG4613 architecture ensures that the VDD supply  
is isolated from the analog inputs, thereby preventing the supplies  
from being pulled to a higher potential when a signal is present  
on the inputs without any power having been applied.  
V
DD Supply  
Another area of concern with conventional CMOS switches that  
have analog signals present before the part is powered up is that  
the VDD supply can be pulled up through the internal ESD  
Rev. 0 | Page 20 of 24  
ADG46+1/ADG46+3  
OUTLINE DIMENSIONS  
5.10  
5.00  
4.90  
16  
9
8
4.50  
4.40  
4.30  
6.40  
BSC  
1
PIN 1  
1.20  
MAX  
0.15  
0.05  
0.20  
0.09  
0.75  
0.60  
0.45  
8°  
0°  
0.30  
0.19  
0.65  
BSC  
SEATING  
PLANE  
COPLANARITY  
0.10  
COMPLIANT TO JEDEC STANDARDS MO-153-AB  
Figure 35. 16-Lead Thin Shrink Small Outline Package [TSSOP]  
(RU-16)  
Dimensions shown in millimeters  
3.10  
3.00 SQ  
2.90  
0.30  
0.23  
0.18  
PIN 1  
INDICATOR  
PIN 1  
INDICATOR  
13  
16  
0.50  
BSC  
1
4
12  
EXPOSED  
PAD  
1.75  
1.60 SQ  
1.45  
9
8
5
0.50  
0.40  
0.30  
0.20 MIN  
TOP VIEW  
BOTTOM VIEW  
FOR PROPER CONNECTION OF  
THE EXPOSED PAD, REFER TO  
THE PIN CONFIGURATION AND  
FUNCTION DESCRIPTIONS  
0.80  
0.75  
0.70  
0.05 MAX  
0.02 NOM  
COPLANARITY  
0.08  
SECTION OF THIS DATA SHEET.  
SEATING  
PLANE  
0.20 REF  
COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6.  
Figure 36. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]  
3 mm × 3 mm Body, Very Thin Quad  
(CP-16-22)  
Dimensions shown in millimeters  
Rev. 0 | Page 21 of 24  
 
ADG46+1/ADG46+3  
ORDERING GUIDE  
Model1  
Temperature Range  
Package Description  
Package Option  
RU-16  
RU-16  
Branding  
ADG4612BRUZ  
−40°C to +105°C  
−40°C to +105°C  
−40°C to +105°C  
Thin Shrink Small Outline Package [TSSOP]  
Thin Shrink Small Outline Package [TSSOP]  
Lead Frame Chip Scale Package [LFCSP_WQ]  
Evaluation Board  
Thin Shrink Small Outline Package [TSSOP]  
Thin Shrink Small Outline Package [TSSOP]  
Lead Frame Chip Scale Package [LFCSP_WQ]  
ADG4612BRUZ-REEL±  
ADG4612BCPZ-REEL±  
EVAL-ADG4612EBZ  
ADG4613BRUZ  
ADG4613BRUZ-REEL±  
ADG4613BCPZ-REEL±  
CP-16-22  
LG5  
−40°C to +105°C  
−40°C to +105°C  
−40°C to +105°C  
RU-16  
RU-16  
CP-16-22  
S3Y  
1 Z = RoHS Compliant Part.  
Rev. 0 | Page 22 of 24  
 
 
ADG46+1/ADG46+3  
NOTES  
Rev. 0 | Page 23 of 24  
ADG46+1/ADG46+3  
NOTES  
©2010 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D09005-0-10/10(0)  
Rev. 0 | Page 24 of 24  

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