ADG659YCP [ADI]
+3 V/+5 V/【5 V CMOS 4-/8-Channel Analog Multiplexers; 3 V / + 5 V / 【 5 V CMOS 4- / 8通道模拟多路复用器
| 型号： | ADG659YCP |
| 厂家： | 
ADI |
| 描述： | +3 V/+5 V/【5 V CMOS 4-/8-Channel Analog Multiplexers |
| 文件： | 总12页 (文件大小：550K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Analog Multiplexers
±2V to ±6V Dual Supply
ADG658
ADG659
2V to 12V Single Supply
AutomotiveTemperature Range –40oo
<0.1 nA Leakage Currents
S1
S1A
S4A
DA
DB
On Resistance over Full Signal Range
Rail-to-Rail Switching Operation
Single 8-to-1 Multiplexer ADG658
Differential 4-to-1 Multiplexer ADG659
16-Lead LFCSP/TSSOP Packages
Typical Power Consumption <0.1
TTL/CMOS Compatible Inputs
D
S1B
S4B
S8
1 OF 8
DECODER
1 OF 4
DECODER
Package Upgrades to 74HC4051/74HC4052 and
A0 A1 A2 EN
A0
A1
EN
Automotive Applications
AutomaticTest Equipment
Data Acquisition Systems
Battery-Powered Systems
Communication Systems
Audio andVideo Signal Routing
Relay Replacement
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Sample-and-Hold Systems
Industrial Control Systems
The ADG658 and ADG659 are low voltage, CMOS analog
multiplexers comprised of eight single channels and four dif-
ferential channels, respectively. The ADG658 switches one of
eight inputs (S1–S8) to a common output, D, as determined by
the 3-bit binary address lines A0, A1, and A2. The ADG659
switches one of four differential inputs to a common differential
output, as determined by the 2-bit binary address lines A0 and
input on both devices is used to enable or disable
the device. When disabled, all channels are switched off.
1. Single- and dual-supply operation. The ADG658 and
ADG659 offer high performance and are fully specified
and guaranteed with ±5 V, +5 V, and +3 V supply rails.
2. Automotive temperature range –40oo
3. Low power consumption, typically <0.1
4 mm LFCSP packages and 16-lead
TSSOP package.
These parts are designed on an enhanced process that provides
lower power dissipation yet gives high switching speeds. These
parts can operate equally well as either multiplexers or demulti-
plexers and have an input range that extends to the supplies. All
channels exhibit break-before-make switching action, prevent-
ing momentary shorting when switching channels. All digital
inputs have 0.8 V to 2.4 V logic thresholds, ensuring TTL/
CMOS logic compatibility when using single +5 V or dual
±5 V supplies.
packages and 16-lead 4 mm 4 mm LFCSP packages.
REV.0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed byAnalog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or oth-
erwise under any patent or patent rights of Analog Devices.Trademarks
andregisteredtrademarksarethepropertyoftheirrespectivecompanies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
(VDD = +5 V ±10%, VSS = –5 V ±10%, GND = 0 V, unless otherwise noted.)
BVersion YVersion
–40C
to +85C
–40C
to +125C
Parameter
+25C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
VSS to VDD
V
VDD = +4.5 V, VSS = –4.5 V
VS = ±4.5 V, IS = 1 mA;
Test Circuit 1
On Resistance (RON
)
45
75
1.3
3
10
16
typ
max
typ
max
typ
max
90
3.2
100
3.5
18
On Resistance Match between
RON
)
VS = 3.5 V, IS = 1 mA
VDD = +5 V, VSS = –5 V;
VS = ±3 V, IS
On Resistance Flatness (FLAT(ON)
)
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
VDD = +5.5 V, VSS = –5.5 V
VD = ±4.5 V, VS = 4.5 V;
Test Circuit 2
VD = ±4.5 V, VS 4.5 V;
Test Circuit 3
±0.005
±0.2
±0.005
±0.2
±0.1
±0.005
±0.2
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
±5
Drain OFF Leakage ID (OFF)
ADG658
ADG659
Channel ON Leakage ID, IS (ON)
ADG658
ADG659
±5
±2.5
VD = VS = ±4.5 V; Test Circuit 4
±5
±2.5
±0.1
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
2.4
0.8
V min
V max
IINL or IINH
0.005
2
µA typ
µA max
pF typ
VIN = VINL or VINH
±1
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tTRANS
80
115
80
115
30
45
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
pC max
dB typ
RL = 300 , CL = 35 pF
VS = 3 V; Test Circuit 5
RL = 300 , CL = 35 pF
VS = 3 V; Test Circuit 7
L = 300 , CL = 35 pF
VS = 3 V; Test Circuit 7
L = 300 , CL = 35 pF
VS1 = VS2 = 3 V; Test Circuit 6
VS = 0 V, RS = 0
CL = 1 nF; Test Circuit 8
RL = 50 , CL = 5 pF,
f = 1 MHz; Test Circuit 9
L = 600 , 2V p-p,
140
140
50
165
165
55
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tBBM
Charge Injection
50
10
4
–90
Off Isolation
Total Harmonic Distortion,THD + N
Channel-to-Channel Crosstalk
0.025
–90
% typ
f = 20 Hz to 20 kHz
L = 50 , CL = 5 pF,
f = 1 MHz; Test Circuit 11
dB typ
(ADG659)
–3 dB Bandwidth
ADG658
ADG659
CS (OFF)
CD (OFF)
ADG658
210
400
MHz typ
MHz typ
pF typ
RL = 50 , CL = 5 pF;
Test Circuit 10
23
pF typ
pF typ
ADG659
CD, CS (ON)
ADG658
ADG659
28
16
pF typ
pF typ
f = 1 MHz
f = 1 MHz
POWER REQUIREMENTS
DD
VDD = +5.5 V, VSS = –5.5 V
Digital Inputs = 0 V or 5.5 V
0.01
0.01
µA typ
µA max
µA typ
µA max
1
ISS
Digital Inputs = 0 V or 5.5 V
NOTES
1Temperature range is as follows: BVersion: –40°C to +85°C.YVersion: –40°C to +125°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
(VDD = 5 V ±10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
BVersion YVersion
–40C
to +85C
–40C
to +125C
Parameter
+25C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 to VDD
200
V
VDD = 4.5 V, VSS = 0 V
VS = 0 V to 4.5 V, IS = 1 mA;
Test Circuit 1
On Resistance (RON
)
85
150
4.5
8
typ
max
typ
max
typ
160
On Resistance Match between
Channels (RON
VS = 3.5 V, IS = 1 mA
)
9
14
10
16
On Resistance Flatness (RFLAT(ON)
)
13
VDD= 5 V, VSS = 0 V
VS = 1.5 V to 4 V, IS = 1 mA
LEAKAGE CURRENTS
VDD = 5.5 V
Source OFF Leakage IS (OFF)
±0.005
±0.2
±0.005
±0.2
±0.1
±0.005
±0.2
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
VS = 1 V/4.5 V, VD = 4.5 V/1 V;
Test Circuit 2
VS = 1 V/4.5 V, VD = 4.5 V/1 V;
Test Circuit 3
±5
Drain OFF Leakage ID (OFF)
ADG658
ADG659
Channel ON Leakage ID, IS (ON)
ADG658
ADG659
±5
±2.5
VS = VD = 1 V or 4.5 V, Test Circuit 4
±5
±2.5
±0.1
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, V
Input Current
2.4
0.8
V min
V max
Ior IINH
0.005
2
µA typ
µA max
pF typ
VIN = Vor VINH
±1
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tTRANS
120
200
120
190
35
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
pC max
dB typ
R= 300 , CL = 35 pF
VS = 3 V; Test Circuit 5
R= 300 , CL = 35 pF
VS = 3 V; Test Circuit 7
R= 300 , CL = 35 pF
VS = 3 V; Test Circuit 7
R= 300 , CL = 35 pF
VS1 = VS2 = 3 V; Test Circuit 6
VS = 2.5 V, RS = 0 , CL = 1 nF;
Test Circuit 8
270
245
60
300
280
70
tON (EN)
tOFF (EN)
50
100
Break-Before-Make Time Delay, tBBM
Charge Injection
10
0.5
1
–90
Off Isolation
R= 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 9
Channel-to-Channel Crosstalk
–90
dB typ
R= 50 , CL = 5 pF; f = 1 MHz;
(
ADG659)
Test Circuit 11
–3 dB Bandwidth
ADG658
ADG659
CS (OFF)
CD (OFF)
ADG658
180
330
5
MHz typ
MHz typ
pF typ
R= 50 , CL = 5 pF;
Test Circuit 10
f = 1 MHz
29
15
pF typ
pF typ
f = 1 MHz
f = 1 MHz
ADG659
CD, CS (ON)
ADG658
ADG659
30
16
pF typ
pF typ
f = 1 MHz
f = 1 MHz
POWER REQUIREMENTS
IDD
VDD = 5.5 V
Digital Inputs = 0 V or 5.5 V
0.01
µA typ
µA max
NOTES
1Temperature range is as follows: BVersion: –40°C to +85°C.YVersion: –40°C to +125°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = 2.7 V to 3.6 V, VSS = 0 V, GND = 0 V, unless otherwise noted.)
BVersion YVersion
–40C
to +85C
–40C
to +125C
Parameter
+25C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 to VDD
V
VDD = 2.7 V, VSS = 0 V
VS = 0 V to 2.7 V, IS = 0.1 mA;
Test Circuit 1
On Resistance (RON
)
185
300
2
typ
max
typ
max
350
6
400
7
On Resistance Match between
Channels (RON
VS = 1.5 V, IS = 0.1 mA
)
4.5
LEAKAGE CURRENTS
VDD = 3.3 V
Source OFF Leakage IS (OFF)
±0.005
±0.2
±0.005
±0.2
±0.1
±0.005
±0.2
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
VS = 1 V/3 V, VD = 3 V/1 V;
Test Circuit 2
VS = 1 V/3 V, VD = 3 V/1 V;
Test Circuit 3
±5
Drain OFF Leakage ID (OFF)
ADG658
ADG659
Channel ON Leakage ID, IS (ON)
ADG658
ADG659
±5
±2.5
VS = VD = 1 V or 3 V; Test Circuit 4
±5
±2.5
±0.1
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, V
Input Current
2.0
0.5
V min
V max
Ior IINH
0.005
2
µA typ
µA max
pF typ
VIN = Vor VINH
±1
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tTRANS
200
370
230
370
50
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
pC max
dB typ
R= 300 , CL = 35 pF
VS = 1.5 V; Test Circuit 7
R= 300 , CL = 35 pF
VS = 1.5 V; Test Circuit 7
R= 300 , CL = 35 pF
VS = 1.5 V; Test Circuit 7
R= 300 , CL = 35 pF
VS1 = VS2 = 1.5 V; Test Circuit 6
VS = 1.5 V, RS = 0 , CL = 1 nF;
Test Circuit 8
440
440
90
490
490
110
10
tON (EN)
tOFF (EN)
80
200
Break-Before-Make Time Delay, tBBM
Charge Injection
1
2
–90
Off Isolation
R= 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 9
Channel-to-Channel Crosstalk
–90
dB typ
R= 50 , CL = 5 pF, f = 1 MHz;
(
ADG659)
Test Circuit 11
–3 dB Bandwidth
ADG658
ADG659
CS (OFF)
CD (OFF)
ADG658
160
300
5
MHz typ
MHz typ
pF typ
R= 50 , CL = 5 pF;
Test Circuit 10
f = 1 MHz
29
15
pF typ
pF typ
f = 1 MHz
f = 1 MHz
ADG659
CD, CS (ON)
ADG658
ADG659
30
16
pF typ
pF typ
f = 1 MHz
f = 1 MHz
POWER REQUIREMENTS
IDD
VDD = 3.6 V
Digital Inputs = 0 V or 3.6 V
0.01
µA typ
1
µA max
NOTES
1Temperature range is as follows: BVersion: –40°C to +85°C.YVersion: –40°C to +125°C.
2Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
ADG658/ADG659
JA Thermal Impedance, 16-LeadTSSOP . . . . . 150.4°C/W
JA Thermal Impedance (4-Layer Board),
ABSOLUTE MAXIMUM RATINGS1
(T = 25°C, unless otherwise noted.)
A
VDD toVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +13V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . .+0.3V to –6.5V
Analog Inputs2 . . . . . . . . . . . . . . VSS – 0.3V toVDD + 0.3V
Digital Inputs2 . . . . . . . . . . . . GND – 0.3V toVDD + 0.3V
or 10 mA, whichever occurs first
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . 40 mA
(Pulsed at 1 ms, 10% duty cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . 20 mA
OperatingTemperature Range
Automotive (YVersion) . . . . . . . . . . . . –40°C to +125°C
Industrial (BVersion) . . . . . . . . . . . . . . –40°C to +85°C
StorageTemperature Range . . . . . . . . . . –65°C to +150°C
JunctionTemperature . . . . . . . . . . . . . . . . . . . . . . . 150°C
16-Lead LFCSP . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
LeadTemperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 kV
NOTES
1StressesabovethoselistedunderAbsoluteMaximumRatingsmaycauseperma-
nent damage to the device.This is a stress rating only; functional operation of
the device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability. Only one
absolute maximum rating may be applied at any one time.
2Overvoltages at AX, EN, S, or D will be clamped by internal diodes. Current
should be limited to the maximum ratings given.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily accumulate
on the human body and test equipment and can discharge without detection. Although the ADG658/
ADG659featureproprietaryESDprotectioncircuitry,permanentdamagemayoccurondevicessubjected
to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid
performance degradation or loss of functionality.
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
ADG658YRU
ADG658YCP
ADG659YRU
ADG659YCP
–40°C to +125°C
–40°C to +85°C
–40°C to +125°C
–40°C to +85°C
Thin Shrink Small Outline Package (TSSOP)
Lead Frame Chip Scale Package (LFCSP)
Thin Shrink Small Outline Package (TSSOP)
Lead Frame Chip Scale Package (LFCSP)
RU-16
CP-16
RU-16
CP-16
PIN CONFIGURATIONS
TSSOP
Table I. ADG658TruthTable
A2
A1
A0
EN
Switch Condition
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
1
0
0
0
0
0
0
0
0
NONE
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
S5
S7
D
V
S1B
V
DD
DD
1
2
3
4
5
6
7
8
S3
S2
S1
S4
A0
A1
A2
S3B
DB
S3A
S2A
DA
ADG658
TOP VIEW
(Not to Scale)
ADG659
TOP VIEW
(Not to Scale)
S8
S6
EN
S4B
S2B
EN
S1A
S4A
A0
V
V
SS
SS
GND
GND
A1
X = Don’t Care
LFCSP
Table II. ADG659TruthTable
A1
A0
EN
On Switch Pair
16 15 14 13
16 15 14 13
X
0
0
1
1
X
0
1
0
1
1
0
0
0
0
NONE
1
2
3
4
12
1
2
3
4
12
S2A
D
S8
S6
EN
S2
DB
S4B
S2B
EN
1
2
3
4
ADG658
TOP VIEW
(Not to Scale)
ADG659
TOP VIEW
(Not to Scale)
11 S1
10 S4
11 DA
10 S1A
A0
S4A
9
9
5
6
7
8
5
6
7
8
X = Don’t Care
REV. 0
–5–
Description
DD
SS
DD
SS
Most Positive Power Supply Potential.
Most Negative Power Supply Potential.
Positive Supply Current.
Negative Supply Current.
Ground (0V) Reference.
SourceTerminal. May be an input or output.
X
DrainTerminal. May be an input or output.
Logic Control Input.
Active Low Digital Input.When high, device is disabled and all switches are OFF.When low, AX logic inputs
AnalogVoltage onTerminals D, S.
D (VS)
ON
ON
FLAT(ON)
On Resistance Match between AnyTwo Channels, i.e., RON ON
measured over the specified analog signal range.
S (OFF)
D (OFF)
D, IS (ON)
INL
Source Leakage Current with the Switch OFF.
Drain Leakage Current with the Switch OFF.
Channel Leakage Current with the Switch ON.
Maximum InputVoltage for Logic 0.
INH
Minimum InputVoltage for Logic 1.
INL(IINH
)
Input Current of the Digital Input.
S (OFF)
D (OFF)
D, CS (ON)
IN
OFF Switch Source Capacitance. Measured with reference to ground.
OFF Switch Drain Capacitance. Measured with reference to ground.
ON Switch Capacitance. Measured with reference to ground.
Digital Input Capacitance.
ON
OFF
tBBM
Delay between Applying the Digital Control Input and the Output Switching ON. SeeTest Circuit 7.
Delay between Applying the Digital Control Input and the Output Switching OFF.
ON Time. Measured between 80% points of both switches when switching from one address state to another.
Charge Injection Measure of the Glitch ImpulseTransferred from the Digital Input to the Analog Output during Switching.
Measure of Unwanted Signal Coupling through an OFF Switch.
Measure of Unwanted Signal Coupled through from One Channel to Another as a Result of Parasitic Capacitance.
The Frequency at which the Output is Attenuated by 3 dB.
On Response
The Frequency Response of the ON Switch.
REV. 0
Typical Performance Characteristics–ADG658/ADG659
100
90
250
200
150
100
T
= 25C
A
T
= 25C
A
90
V
= 2.7V
DD
+125C
+85C
80
V
, V = 2.7V
80
DD SS
70
70
V
= 3V
DD
60
50
60
50
+25C
V
, V = 3V
DD SS
V
= 3.3V
DD
100
50
0
40
30
20
10
0
40
30
20
10
0
V
= 4.5V
–40C
DD
V
, V = 5.5V
V
, V = 4.5V
DD SS
DD SS
V
= 5V
DD
V
= 5.5V
V
, V = 5V
DD
DD SS
V
V
= 5V
= –5V
DD
SS
V
= 12V
4
V
= 10V
DD
DD
–5.5
–3.5
–1.5
V
0.5
2.5
4.5
0
2
6
8
10
12
–5 –4 –3 –2 –1
V , V – V
D S
0
1
2
3
4
5
V
, V – V
, V – V
S
D
S
D
TPC 1. On Resistance vs. VD (VS)
for Dual Supply
TPC 3. On Resistance vs. VD (VS)
for DifferentTemperatures
(Dual Supply)
TPC 2. On Resistance vs. VD (VS)
for Single Supply
1.5
300
140
120
100
80
+125C
V
V
V
V
= 5V
= –5V
= 4V
= 4V
DD
SS
D
S
+85C
1.0
0.5
+125C
250
200
150
I
(OFF)
S
+85C
0
–0.5
–1.0
–1.5
I
(OFF)
D
+25C
60
100
+25C
I , I (ON)
S
D
40
–40C
–40C
50
V
V
= 5V
= 0V
20
DD
SS
–2.0
–2.5
V
V
= 3V
= 0V
DD
SS
0
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
, V – V
0
0.5
1.0
1.5
2.0
2.5
3.0
0
20
40
60
80
100
120
TEMPERATURE C
V
V
, V – V
S
D
S
D
TPC 6. Leakage Currents vs.
Temperature (Dual Supply)
TPC 5. On Resistance vs. VD (VS)
for DifferentTemperatures
(Single Supply)
TPC 4. On Resistance vs. VD (VS)
for DifferentTemperatures
(Single Supply)
1.5
140
120
100
80
14
V
V
V
V
= 5V
= 0V
= 4V
= 1V
TA = 25C
V
V
= +5V
= –5V
DD
SS
D
S
DD
SS
12
1.0
0.5
I
(OFF)
S
10
8
tON
0
I
(OFF)
6
D
–0.5
–1.0
–1.5
4
60
V
V
= 5V
= –5V
DD
SS
tOFF
I , I (ON)
2
0
S
D
40
V
V
V
V
= 3V
= 0V
= 2.4V
= 1V
DD
SS
D
S
20
V
V
= 5V
= 0V
DD
SS
–2.0
–2.5
–2
–4
0
0
20
40
60
80
100
120
–5 –4 –3 –2 –1
1
3
5
0
2
4
–40 –20
0
20
40 60 80 100 120
TEMPERATURE C
V
– V
TEMPERATURE – C
S
TPC 7. Leakage Currents vs.
Temperature (Single Supply)
TPC 9. t/tOFFTimes vs.
Temperature (Dual Supply)
TPC 8. Charge Injection vs.
Source Voltage
REV. 0
350
0
–1
–2
–3
–4
–5
–6
–7
–8
0
–2
V
= 0V
SS
V
= 3V
300
250
200
150
100
50
DD
–4
–6
–8
–10
–12
–14
–16
–18
–20
–22
–24
V
= 5V
DD
V
tON
–9
–10
–11
–12
–13
–14
–15
= 3V
DD
V
V
V
T
= +5V
= –5V
= 25C
V
V
T
= +5V
= –5V
= 25C
DD
SS
A
DD
SS
A
tOFF
= 5V
DD
0
100k
1M
10M
100M
100k
1M
10M
100M
–40 –20
0
20
40 60 80 100 120
FREQUENCY – Hz
TEMPERATURE – C
FREQUENCY – Hz
ON/tOFFTimes vs.
Temperature (Single Supply)
TPC 11. ON Response vs.
Frequency (ADG658)
TPC 12. ON Response vs.
Frequency (ADG659)
0
–20
0
100
10
V
V
T
= –5V
= +5V
= 25C
600
IN AND OUT
V
V
T
= +5V
= –5V
= 25C
DD
SS
A
DD
SS
A
–10
V
V
T
= +5V
= –5V
= 25C
DD
SS
A
–20
–30
–40
–50
–60
–70
–80
–90
–100
–40
–60
1
–80
0.1
–100
–120
–110
–120
–130
0.01
100k
1M
10M
100M
100k
1M
10M
100M
20
50 100 200 500 1k 2k
FREQUENCY – Hz
5k 10k 20k
FREQUENCY – Hz
FREQUENCY – Hz
TPC 13. OFF Isolation vs. Frequency
10000
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 0V
SS
1000
100
10
V
= 12V
= 5V
= 3V
DD
V
DD
1
V
DD
0.1
0.01
0
2
4
6
8
10
12
0
2
4
6
8
10
12
V(EN) – V
V
– V
DD
TPC 16. VDD Current vs. Logic Level
TPC 17. LogicThreshold
Voltage vs. Supply Voltage
REV. 0
I
DS
V
V
SS
DD
V1
V
V
SS
DD
S1
S2
S8
I
(OFF)
A
D
D
S
D
V
V
S
O
EN
V
S
GND
LOGIC 1
R
= V /I
1
ON
DS
Test Circuit 3. ID (OFF)
Test Circuit 1. On Resistance
V
V
V
V
V
V
SS
DD
SS
DD
V
V
SS
DD
SS
DD
I
(OFF)
A
S
S1
S2
S8
I
(ON)
A
S1
S8
D
D
D
V
S
V
D
EN
LOGIC 1
EN
V
V
D
S
GND
GND
Test Circuit 2. IS (OFF)
Test Circuit 4. ID (ON)
V
V
SS
DD
3V
0V
ADDRESS
DRIVE (V
V
A2
V
SS
DD
50%
50%
)
IN
V
S1
S1
V
A1
A0
IN
50
S2 THRU S7
V
S8
S8
V
ADG658*
S1
90%
V
D
OUT
EN
R
L
300
C
35pF
V
L
OUT
GND
90%
V
S8
*SIMILAR CONNECTION FOR ADG659
tTRANSITION
tTRANSITION
Test Circuit 5. SwitchingTime of Multiplexer, tTRANSITION
V
V
V
DD
DD
SS
3V
ADDRESS
DRIVE (V
V
SS
)
IN
A2
V
S1
S
V
A1
A0
IN
50
0V
S2 THRU S7
S8
ADG658*
V
D
OUT
EN
80%
80%
R
300
C
35pF
V
OUT
L
L
GND
tBBM
*SIMILAR CONNECTION FOR ADG659
Test Circuit 6. Break-Before-Make Delay, tBBM
REV. 0
V
V
SS
DD
3V
0V
ENABLE
DRIVE (V
V
V
SS
DD
50%
50%
)
IN
A2
A1
A0
V
S1
S
S2–S8
tOFF (EN)
ADG658*
V
O
0.9V
0.9V
O
O
V
D
OUT
EN
C
35pF
R
300
OUTPUT
L
L
V
GND
IN
50
0V
tON (EN)
*SIMILAR CONNECTION FOR ADG659
Test Circuit 7. Enable Delay, tON EN), tOFF EN)
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Test Circuit 8. Charge Injection
V
V
DD
SS
V
V
DD
SS
0.1F
0.1F
0.1F
0.1F
NETWORK
ANALYZER
V
A2
V
SS
DD
V
V
SS
DD
50
A2
A1
A0
50
A1
A0
S
S
V
S
50
V
S
D
V
D
OUT
EN
V
R
L
OUT
LOGIC 1
EN
R
L
50
GND
50
GND
V
WITH SWITCH
OUT
V
OUT
INSERTION LOSS = 20 LOG
OFF ISOLATION = 20 LOG
V
WITHOUT SWITCH
V
OUT
S
Test Circuit 9. OFF Isolation
Test Circuit 10. Bandwidth
V
V
V
V
DD
DD
SS
0.1F
0.1F
SS
A1
A0
NETWORK
ANALYZER
EN
ADG659
GND
NETWORK
ANALYZER
50
DA
DB
S1A
V
OUT
S1B
DB
R
L
50
50
V
S
DA
V
OUT
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
V
S
Test Circuit 11. Channel-to-Channel Crosstalk
REV. 0
16-LeadThin Shrink Small Outline Package [TSSOP]
(RU-16)
5.10
5.00
4.90
16
9
4.50
4.40
4.30
6.40
BSC
1
8
PIN 1
1.20
MAX
0.15
0.05
0.20
0.09
0.75
0.60
0.45
8
0
0.30
0.19
0.65
BSC
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB
16-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm Body
(CP-16)
4.0
BSC SQ
0.60 MAX
PIN 1
INDICATOR
0.60 MAX
13
16
12
9
1
PIN 1
INDICATOR
0.65 BSC
TOP
VIEW
3.75
BSC SQ
BOTTOM
VIEW
0.75
0.55
0.35
2.25
1.70 SQ
0.75
4
8
5
1.95 BSC
1.00 MAX
12 MAX
0.65 NOM
0.05 MAX
0.02 NOM
1.00
0.90
0.80
0.38
0.30
0.23
0.20 REF
COPLANARITY
0.08
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
REV. 0
–11
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