ADR391BUJZ-R21 [ADI]
Micropower, Low Noise Precision Voltage References with Shutdown; 微功耗，低噪声精密电压基准，带有关断
| 型号： | ADR391BUJZ-R21 |
| 厂家： | 
ADI |
| 描述： | Micropower, Low Noise Precision Voltage References with Shutdown |
| 文件： | 总20页 (文件大小：431K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Micropower, Low Noise Precision Voltage
References with Shutdown
ADR391/ADR392/ADR395
FEATURES
PIN CONFIGURATION
Compact 5-lead TSOT package
Low temperature coefficient
B grade: 9 ppm/°C
1
2
3
5
GND
SHDN
ADR391/
ADR392/
ADR395
V
IN
(Not to Scale)
V
V
4
OUT (SENSE)
OUT (FORCE)
A grade: 25 ppm/°C
Initial accuracy
Figure 1. 5-Lead TSOT (UJ Suffix)
B grade: 4 mV maximum (ADR391)
A grade: 6 mV maximum
Ultralow output noise: 5 μV p-p (0.1 Hz to 10 Hz)
Low dropout: 300 mV
Table 1.
Output
Temperature
Accuracy
(mV)
Low supply current
Model
Voltage (VO) Coefficient (ppm/°C)
3 μA maximum in shutdown
140 μA maximum in operation
No external capacitor required
Output current: 5 mA
Automotive grade available
Wide temperature range: −40°C to +125°C
ADR391B 2.5
ADR391A 2.5
ADR392B ±.09ꢀ
ADR392A ±.09ꢀ
ADR395B 5.0
ADR395A 5.0
9
25
9
25
9
25
±±
±ꢀ
±5
±ꢀ
±5
±ꢀ
APPLICATIONS
Battery-powered instrumentation
Portable medical instrumentation
Data acquisition systems
Industrial process controls
Automotive
GENERAL DESCRIPTION
The ADR391/ADR392/ADR395 are precision 2.048 V, 2.5 V,
4.096 V, and 5 V band gap voltage references, respectively,
featuring low power and high precision in a tiny footprint. Using
patented temperature drift curvature correction techniques
from Analog Devices, Inc., the ADR39x references achieve a
low 9 ppm/°C of temperature drift in the TSOT package.
The ADR39x family of micropower, low dropout voltage references
provides a stable output voltage from a minimum supply of
300 mV above the output. Their advanced design eliminates the
need for external capacitors, which further reduces board space
and system cost. The combination of low power operation,
small size, and ease of use makes the ADR39x precision voltage
references ideally suited for battery-operated applications.
Rev. H
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.
ADR391/ADR392/ADR395
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................6
Typical Performance Characteristics ..............................................7
Terminology.................................................................................... 13
Theory of Operation ...................................................................... 14
Device Power Dissipation Considerations.............................. 14
Shutdown Mode Operation ...................................................... 14
Applications Information.............................................................. 15
Basic Voltage Reference Connection....................................... 15
Capacitors.................................................................................... 17
Outline Dimensions....................................................................... 18
Ordering Guide .......................................................................... 18
Applications....................................................................................... 1
Pin Configuration............................................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
ADR391 Electrical Characteristics............................................. 3
ADR392 Electrical Characteristics............................................. 4
ADR395 Electrical Characteristics............................................. 5
Absolute Maximum Ratings............................................................ 6
Thermal Resistance ...................................................................... 6
REVISION HISTORY
10/09—Rev. G to Rev. H
Deleted ADR390.................................................................Universal
Changes to Ordering Guide Section............................................ 18
Changes to ADR392—Specifications .............................................5
Changes to ADR395—Specifications .............................................6
Changes to Absolute Maximum Ratings........................................7
Changes to Thermal Resistance.......................................................7
Moved ESD Caution..........................................................................7
Changes to Figure 3, Figure 4, Figure 7, and Figure 8..................9
Changes to Figure 11, Figure 12, Figure 13, and Figure 14....... 10
Changes to Figure 15, Figure 16, Figure 19, and Figure 20....... 11
Changes to Figure 23 and Figure 24............................................. 12
Changes to Figure 27...................................................................... 13
Changes to Ordering Guide.......................................................... 19
Updated Outline Dimensions....................................................... 19
2/08—Rev. F to Rev. G
Changes to Ripple Rejection Ration Parameter (Table 2)........... 3
Changes to Ripple Rejection Ration Parameter (Table 3)........... 4
Changes to Ripple Rejection Ration Parameter (Table 4)........... 5
Changes to Ripple Rejection Ration Parameter (Table 5)........... 6
Changes to Figure 7.......................................................................... 9
Changes to Outline Dimensions................................................... 19
Changes to Ordering Guide .......................................................... 19
5/05—Rev. E to Rev. F
10/02—Rev. B to Rev. C
Changes to Table 5............................................................................ 7
Changes to Figure 2.......................................................................... 9
Add parts ADR392 and ADR395.....................................Universal
Changes to Features ..........................................................................1
Changes to General Description .....................................................1
Additions to Table I...........................................................................1
Changes to Specifications.................................................................2
Changes to Ordering Guide.............................................................4
Changes to Absolute Maximum Ratings........................................4
New TPCs 3, 4, 7, 8, 11, 12, 15, 16, 19, and 20 ..............................6
New Figures 4 and 5....................................................................... 13
Deleted A Negative Precision Reference
4/04—Rev. D to Rev. E
Changes to ADR390—Specifications............................................. 3
Changes to ADR391—Specifications............................................. 4
Changes to ADR392—Specifications............................................. 5
Changes to ADR395—Specifications............................................. 6
4/04—Rev. C to Rev. D
Updated Format..................................................................Universal
Changes to Title ................................................................................ 1
Changes to Features.......................................................................... 1
Changes to Applications .................................................................. 1
Changes to General Description .................................................... 1
Changes to Table 1............................................................................ 1
Changes to ADR390—Specifications............................................. 3
Changes to ADR391—Specifications............................................. 4
without Precision Resistors Section............................................. 13
Edits to General-Purpose Current Source Section.................... 13
Updated Outline Dimensions....................................................... 15
5/02—Rev. A to Rev. B
Edits to Layout ....................................................................Universal
Changes to Figure 6........................................................................ 13
Rev. H | Page 2 of 20
ADR391/ADR392/ADR395
SPECIFICATIONS
ADR391 ELECTRICAL CHARACTERISTICS
VIN = 2.8 V to 15 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ Max
Unit
V
V
OUTPUT VOLTAGE
VO
A grade
B grade
2.±9± 2.5
2.±9ꢀ 2.5
2.50ꢀ
2.50±
ꢀ
INITIAL ACCURACY
VOERR
A grade
mV
A grade
B grade
0.2±
±
%
mV
B grade
0.1ꢀ
25
9
%
TEMPERATURE COEFFICIENT
TCVO
A grade, −±0°C < TA < +125°C
B grade, −±0°C < TA < +125°C
ppm/°C
ppm/°C
mV
SUPPLY VOLTAGE HEADROOM
LINE REGULATION
VIN − VO
300
10
ΔVO/ΔVIN
VIN = 2.8 V to 15 V, −±0°C < TA < +125°C
25
ppm/V
ppm/mA
ppm/mA
μA
LOAD REGULATION
ΔVO/ΔILOAD ILOAD = 0 mA to 5 mA, −±0°C < TA < +85°C, VIN = 3 V
ILOAD = 0 mA to 5 mA, −±0°C < TA < +125°C, VIN = 3 V
ꢀ0
1±0
120
1±0
QUIESCENT CURRENT
IIN
No load
−±0°C < TA < +125°C
0.1 Hz to 10 Hz
μA
VOLTAGE NOISE
en p-p
tR
5
μV p-p
μs
TURN-ON SETTLING TIME
LONG-TERM STABILITY1
OUTPUT VOLTAGE HYSTERESIS
RIPPLE REJECTION RATIO
SHORT CIRCUIT TO GND
20
50
100
−80
25
30
ΔVO
ΔVO_HYS
RRR
ISC
1000 hours
ppm
ppm
dB
fIN = ꢀ0 Hz
VIN = 5 V
VIN = 15 V
mA
mA
SHUTDOWN PIN
Shutdown Supply Current
Shutdown Logic Input Current
Shutdown Logic Low
Shutdown Logic High
ISHDN
ILOGIC
VINL
3
500
0.8
μA
nA
V
VINH
2.±
V
1 The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Rev. H | Page 3 of 20
ADR391/ADR392/ADR395
ADR392 ELECTRICAL CHARACTERISTICS
VIN = 4.3 V to 15 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
V
OUTPUT VOLTAGE
VO
A grade
±.090 ±.09ꢀ ±.102
B grade
±.091 ±.09ꢀ ±.101
V
INITIAL ACCURACY
VOERR
A grade
ꢀ
mV
A grade
0.15
%
B grade
5
mV
B grade
0.12
%
TEMPERATURE COEFFICIENT
TCVO
A grade, −±0°C < TA < +125°C
B grade, −±0°C < TA < +125°C
25
9
ppm/°C
ppm/°C
mV
SUPPLY VOLTAGE HEADROOM
LINE REGULATION
VIN − VO
300
ΔVO/ΔVIN
VIN = ±.3 V to 15 V, −±0°C < TA < +125°C
10
25
ppm/V
ppm/mA
μA
LOAD REGULATION
ΔVO/ΔILOAD ILOAD = 0 mA to 5 mA, −±0°C < TA < +125°C, VIN = 5 V
1±0
120
1±0
QUIESCENT CURRENT
IIN
No load
−±0°C < TA < +125°C
0.1 Hz to 10 Hz
μA
VOLTAGE NOISE
en p-p
tR
7
μV p-p
μs
TURN-ON SETTLING TIME
LONG-TERM STABILITY1
OUTPUT VOLTAGE HYSTERESIS
RIPPLE REJECTION RATIO
SHORT CIRCUIT TO GND
20
50
100
−80
25
30
ΔVO
ΔVO_HYS
RRR
ISC
1000 hours
ppm
ppm
dB
fIN = ꢀ0 Hz
VIN = 5 V
VIN = 15 V
mA
mA
SHUTDOWN PIN
Shutdown Supply Current
Shutdown Logic Input Current
Shutdown Logic Low
Shutdown Logic High
ISHDN
ILOGIC
VINL
3
500
0.8
μA
nA
V
VINH
2.±
V
1 The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Rev. H | Page ± of 20
ADR391/ADR392/ADR395
ADR395 ELECTRICAL CHARACTERISTICS
VIN = 5.3 V to 15 V, TA = 25°C, unless otherwise noted.
Table 4.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
V
OUTPUT VOLTAGE
VO
A grade
±.99± 5.000 5.00ꢀ
B grade
±.995 5.000 5.005
V
INITIAL ACCURACY
VOERR
A grade
ꢀ
mV
A grade
0.12
%
B grade
5
mV
B grade
0.10
%
TEMPERATURE COEFFICIENT
TCVO
A grade, −±0°C < TA < +125°C
B grade, −±0°C < TA < +125°C
25
9
ppm/°C
ppm/°C
mV
SUPPLY VOLTAGE HEADROOM
LINE REGULATION
VIN − VO
300
ΔVO/ΔVIN
VIN = ±.3 V to 15 V, −±0°C < TA < +125°C
10
25
ppm/V
ppm/mA
μA
LOAD REGULATION
ΔVO/ΔILOAD ILOAD = 0 mA to 5 mA, −±0°C < TA < +125°C, VIN = ꢀ V
1±0
120
1±0
QUIESCENT CURRENT
IIN
No load
−±0°C < TA < +125°C
0.1 Hz to 10 Hz
μA
VOLTAGE NOISE
en p-p
tR
8
μV p-p
μs
TURN-ON SETTLING TIME
LONG-TERM STABILITY1
OUTPUT VOLTAGE HYSTERESIS
RIPPLE REJECTION RATIO
SHORT CIRCUIT TO GND
20
50
100
−80
25
30
ΔVO
ΔVO_HYS
RRR
ISC
1000 hours
ppm
ppm
dB
fIN = ꢀ0 Hz
VIN = 5 V
VIN = 15 V
mA
mA
SHUTDOWN PIN
Shutdown Supply Current
Shutdown Logic Input Current
Shutdown Logic Low
Shutdown Logic High
ISHDN
ILOGIC
VINL
3
500
0.8
μA
nA
V
VINH
2.±
V
1 The long-term stability specification is noncumulative. The drift of subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Rev. H | Page 5 of 20
ADR391/ADR392/ADR395
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
At 25°C, unless otherwise noted.
θJA is specified for the worst-case conditions, that is, for a device
soldered in a circuit board for surface-mount packages.
Table 5.
Parameter
Rating
Table 6.
Supply Voltage
18 V
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, ꢀ0 sec)
See derating curves
−ꢀ5°C to +125°C
−±0°C to +125°C
−ꢀ5°C to +125°C
300°C
Package Type
θJA
θJC
Unit
TSOT (UJ-5)
230
1±ꢀ
°C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. H | Page ꢀ of 20
ADR391/ADR392/ADR395
TYPICAL PERFORMANCE CHARACTERISTICS
2.506
140
120
100
SAMPLE 2
2.504
SAMPLE 1
+125°C
+85°C
+25°C
–40°C
2.502
SAMPLE 3
2.500
2.498
2.496
2.494
80
60
40
–40
–5
30
65
100
125
125
125
2.5
5.0
7.5
10.0
12.5
15.0
TEMPERATURE (°C)
INPUT VOLTAGE (V)
Figure 2. ADR391 Output Voltage (VOUT) vs. Temperature
Figure 5. ADR391 Supply Current vs. Input Voltage
4.100
140
4.098
4.096
4.094
4.092
4.090
4.088
+125°C
120
100
80
SAMPLE 3
SAMPLE 1
SAMPLE 2
+25°C
–40°C
60
40
–40
0
40
TEMPERATURE (°C)
80
5
7
9
11
13
15
INPUT VOLTAGE (V)
Figure 3. ADR392 Output Voltage (VOUT) vs. Temperature
Figure 6. ADR392 Supply Current vs. Input Voltage
5.006
140
120
100
80
5.004
5.002
5.000
4.998
4.996
4.994
+125°C
SAMPLE 3
SAMPLE 2
+25
–40
°C
°
C
SAMPLE 1
60
40
5.5
–40
–5
30
65
100
7.0
8.5
10.0
11.5
13.0
14.5
TEMPERATURE (°C)
INPUT VOLTAGE (V)
Figure 4. ADR395 Output Voltage (VOUT) vs. Temperature
Figure 7. ADR395 Supply Current vs. Input Voltage
Rev. H | Page 7 of 20
ADR391/ADR392/ADR395
180
25
20
15
10
I
= 0mA TO 5mA
L
160
140
120
100
80
V
= 5V
IN
V
= 3V
IN
5
0
–40
–10
20
50
80
110 125
–40
–10
20
TEMPERATURE (°C)
80
110 125
50
TEMPERATURE (°C)
Figure 11. ADR391 Line Regulation vs. Temperature
Figure 8. ADR391 Load Regulation vs. Temperature
14
90
I
= 0mA TO 5mA
L
12
10
8
80
70
60
50
40
V
= 4.4V TO 15V
IN
V
= 7.5V
IN
6
V
= 5V
IN
4
2
0
–40
–5
30
65
100
125
–40
–5
30
65
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 12. ADR392 Line Regulation vs. Temperature
Figure 9. ADR392 Load Regulation vs. Temperature
14
80
I
= 0mA TO 5mA
L
12
10
70
60
50
40
30
V
= 7.5V
IN
V
= 5V
IN
V
= 5.3V TO 15V
IN
8
6
4
2
0
–40
–5
30
65
100
125
–40
–5
30
65
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. ADR395 Line Regulation vs. Temperature
Figure 10. ADR395 Load Regulation vs. Temperature
Rev. H | Page 8 of 20
ADR391/ADR392/ADR395
70
60
50
40
30
20
10
0
3.6
3.4
3.2
3.0
2.8
2.6
–40°C
TEMPERATURE: +25°
C
+125°C
+25°C
+125°C
+85°C
+25°C
–40°C
–0.56
–0.41
–0.26
–0.11
0.04
0.19
0.34
0
1
2
3
4
5
V
DEVIATION (mV)
LOAD CURRENT (mA)
OUT
Figure 14. ADR391 Minimum Input Voltage (VIN) vs. Load Current
Figure 17. ADR391 VOUT Hysteresis Distribution
4.8
1k
900
800
700
V
= 5V
IN
+125°C
4.6
600
500
+25°C
4.4
400
300
ADR391
–40°C
4.2
200
4.0
3.8
100
0
1
2
3
4
5
10
100
FREQUENCY (Hz)
1k
10k
LOAD CURRENT (mA)
Figure 15. ADR392 Minimum Input Voltage (VIN) vs. Load Current
Figure 18. Voltage Noise Density vs. Frequency
0
0
0
0
0
0
0
0
0
6.0
5.8
+125°C
5.6
5.4
5.2
5.0
4.8
4.6
+25
–40
°C
°
C
0
1
2
3
4
5
TIME (1s/DIV)
LOAD CURRENT (mA)
Figure 16. ADR395 Minimum Input Voltage (VIN) vs. Load Current
Figure 19. ADR391 Typical Voltage Noise 0.1 Hz to 10 Hz
Rev. H | Page 9 of 20
ADR391/ADR392/ADR395
C
= 0nF
L
V
OUT
V
ON
LOAD OFF
LOAD
TIME (10µs/DIV)
TIME (200µs/DIV)
Figure 20. ADR391 Voltage Noise 10 Hz to 10 kHz
Figure 23. ADR391 Load Transient Response
C
= 0µF
C
L
= 1nF
BYPASS
V
OUT
LINE
0.5V/DIV
INTERRUPTION
LOAD OFF
V
ON
LOAD
V
OUT
1V/DIV
TIME (10µs/DIV)
TIME (200µs/DIV)
Figure 21. ADR391 Line Transient Response
Figure 24. ADR391 Load Transient Response
C
= 0.1µF
C
= 100nF
BYPASS
L
V
OUT
0.5V/DIV
LINE
INTERRUPTION
LOAD OFF
V
LOAD
ON
V
OUT
1V/DIV
TIME (10µs/DIV)
TIME (200µs/DIV)
Figure 25. ADR391 Load Transient Response
Figure 22. ADR391 Line Transient Response
Rev. H | Page 10 of 20
ADR391/ADR392/ADR395
V
= 15V
R
= 500Ω
IN
L
5V/DIV
2V/DIV
V
OUT
V
IN
2V/DIV
V
5V/DIV
OUT
V
IN
TIME (20µs/DIV)
TIME (200µs/DIV)
Figure 26. ADR391 Turn-On Response Time at 15 V
Figure 29. ADR391 Turn-On/Turn-Off Response at 5 V with Resistor Load
R
C
= 500Ω
= 100nF
L
L
V
= 15V
IN
V
5V/DIV
IN
2V/DIV
5V/DIV
V
OUT
V
2V/DIV
OUT
V
IN
TIME (200µs/DIV)
TIME (40µs/DIV)
Figure 27. ADR391 Turn-Off Response at 15 V
Figure 30. ADR391 Turn-On/Turn-Off Response at 5 V
C
= 0.1µF
BYPASS
2V/DIV
5V/DIV
V
OUT
V
IN
TIME (200µs/DIV)
Figure 28. ADR391 Turn-On/Turn-Off Response at 5 V with Capacitance
Rev. H | Page 11 of 20
ADR391/ADR392/ADR395
100
90
80
60
40
80
70
60
50
40
30
20
10
0
20
0
C
= 0µF
L
–20
–40
–60
–80
C
= 0.1µF
L
C
= 1µF
10k
L
–100
–120
10
100
1k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 32. Output Impedance vs. Frequency
Figure 31. Ripple Rejection vs. Frequency
Rev. H | Page 12 of 20
ADR391/ADR392/ADR395
TERMINOLOGY
Temperature Coefficient
Long-Term Stability
The change of output voltage with respect to operating temperature
changes normalized by the output voltage at 25°C. This parameter
is expressed in ppm/°C and can be determined by
Typical shift of output voltage at 25°C on a sample of parts
subjected to a test of 1000 hours at 25°C.
ΔVO = VO(t0) − VO(t1)
VO
(
T2
)
– VO
(
T1
)
×106
(1)
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
VO(t0 ) −VO(t1)
VO (t0 )
TCVO
[ppm/°C
]
=
ΔVO[ppm] =
×106
(2)
VO
(
25°C
)
×
(
T2 –T1
)
where:
VO (25°C) is VO at 25°C.
VO (T1) is VO at Temperature 1.
where:
VO (t0) is VO at 25°C at Time 0.
VO (t1) is VO at 25°C after 1000 hours operation at 25°C.
VO (T2) is VO at Temperature 2.
Thermally Induced Output Voltage Hysteresis
The change of output voltage after the device cycles through
the temperatures from +25°C to –40°C to +125°C and back to
+25°C. This is a typical value from a sample of parts put through
such a cycle.
Line Regulation
The change in output voltage due to a specified change in input
voltage. This parameter accounts for the effects of self-heating.
Line regulation is expressed in either percent per volt, parts-per-
million per volt, or microvolts per volt change in input voltage.
V
O_HYS = VO(25°C) − VO_TC
(3)
Load Regulation
VO (25o C) −VO _TC
VO (25o C)
The change in output voltage due to a specified change in load
current. This parameter accounts for the effects of self-heating.
Load regulation is expressed in either microvolts per milliampere,
parts-per-million per milliampere, or ohms of dc output resistance.
VO _ HYS[ppm]=
×106
(4)
where:
VO (25°C) is VO at 25°C.
O_TC is VO at 25°C after a temperature cycle from +25°C to
−40°C to +125°C and back to +25°C.
V
Rev. H | Page 13 of 20
ADR391/ADR392/ADR395
THEORY OF OPERATION
Band gap references are the high performance solution for low
supply voltage and low power voltage reference applications,
and the ADR391/ADR392/ADR395 are no exception. The
uniqueness of these devices lies in the architecture. As shown in
Figure 33, the ideal zero TC band gap voltage is referenced to
the output, not to ground. Therefore, if noise exists on the
ground line, it is greatly attenuated on VOUT. The band gap cell
consists of the PNP pair, Q51 and Q52, running at unequal
current densities. The difference in VBE results in a voltage with
a positive TC, which is amplified by a ratio of
DEVICE POWER DISSIPATION CONSIDERATIONS
The ADR391/ADR392/ADR395 are capable of delivering load
currents to 5 mA, with an input voltage that ranges from 2.8 V
(ADR391 only) to 15 V. When these devices are used in
applications with large input voltages, care should be taken to
avoid exceeding the specified maximum power dissipation or
junction temperature because it could result in premature
device failure. The following formula should be used to
calculate the maximum junction temperature or dissipation of
the device:
R58
R54
TJ –TA
2 ×
PD =
(5)
θJA
This PTAT voltage, combined with VBEs of Q51 and Q52,
produces a stable band gap voltage.
where:
TJ and TA are, respectively, the junction and ambient temperatures.
PD is the device power dissipation.
JA is the device package thermal resistance.
Reduction in the band gap curvature is performed by the ratio
of Resistors R44 and R59, one of which is linearly temperature
dependent. Precision laser trimming and other patented circuit
techniques are used to further enhance the drift performance.
θ
SHUTDOWN MODE OPERATION
V
The ADR391/ADR392/ADR395 include a shutdown feature
that is TTL/CMOS level compatible. A logic low or a zero volt
IN
Q1
V
V
OUT (FORCE)
SHDN
condition on the
pin is required to turn the devices off.
OUT (SENSE)
During shutdown, the output of the reference becomes a high
impedance state, where its potential would then be determined
by external circuitry. If the shutdown feature is not used, the
R59
R44
R58
SHDN
pin should be connected to VIN (Pin 2).
R49
R54
Q51
SHDN
R53
Q52
R48
R61
R60
GND
Figure 33. Simplified Schematic
Rev. H | Page 1± of 20
ADR391/ADR392/ADR395
APPLICATIONS INFORMATION
Two reference ICs are used, fed from an unregulated input, VIN.
The outputs of the individual ICs are connected in series, which
provide two output voltages, VOUT1 and VOUT2. VOUT1 is the
terminal voltage of U1, while VOUT2 is the sum of this voltage
and the terminal voltage of U2. U1 and U2 are chosen for the
two voltages that supply the required outputs (see the Output
Table in Figure 35). For example, if both U1 and U2 are ADR391s,
VOUT1 is 2.5 V and VOUT2 is 5.0 V.
BASIC VOLTAGE REFERENCE CONNECTION
The circuit shown in Figure 34 illustrates the basic configuration
for the ADR39x family. Decoupling capacitors are not required
for circuit stability. The ADR39x family is capable of driving
capacitive loads from 0 μF to 10 μF. However, a 0.1 μF ceramic
output capacitor is recommended to absorb and deliver the
charge, as required by a dynamic load.
SHUTDOWN
GND
SHDN
While this concept is simple, a precaution is required. Because
the lower reference circuit must sink a small bias current from
U2 plus the base current from the series PNP output transistor
in U2, either the external load of U1 or an external resistor must
provide a path for this current. If the U1 minimum load is not
well defined, the external resistor should be used and set to a
value that conservatively passes 600 μA of current with the
applicable VOUT1 across it. Note that the two U1 and U2
reference circuits are treated locally as macrocells; each has its
own bypasses at input and output for best stability. Both U1 and
U2 in this circuit can source dc currents up to their full rating.
The minimum input voltage, VIN, is determined by the sum of
the outputs, VOUT2, plus the dropout voltage of U2.
ADR39x
INPUT
V
V
IN
*
C
V
OUT (FORCE)
0.1µF
B
OUT (SENSE)
OUTPUT
0.1µF
*
C
B
*NOT REQUIRED
Figure 34. Basic Configuration for the ADR39x Family
Stacking Reference ICs for Arbitrary Outputs
Some applications may require two reference voltage sources,
which are a combined sum of standard outputs. Figure 35 shows
how this stacked output reference can be implemented.
OUTPUTTABLE
A Negative Precision Reference without Precision Resistors
V
(V)
V
(V)
OUT2
OUT1
U1/U2
A negative reference can be easily generated by adding an A1
op amp and is configured as shown in Figure 36. VOUT (FORCE)
and VOUT (SENSE) are at virtual ground and, therefore, the negative
reference can be taken directly from the output of the op amp.
The op amp must be dual-supply, low offset, and rail-to-rail if
the negative supply voltage is close to the reference output.
ADR391/ADR391 2.5
ADR392/ADR392 4.096
5.0
8.192
10
ADR395/ADR395
5
V
IN
U2
V
IN
SHDN
V
+V
DD
V
OUT (FORCE)
C2
OUT2
0.1µF
V
OUT (SENSE)
GND
V
IN
V
V
OUT (FORCE)
SHDN
U1
OUT (SENSE)
V
IN
GND
SHDN
V
V
C2
OUT (FORCE)
OUT1
0.1µF
V
OUT (SENSE)
GND
A1
–V
REF
–V
DD
Figure 36. Negative Reference
Figure 35. Stacking Voltage References with the ADR391/ADR392/ADR395
Rev. H | Page 15 of 20
ADR391/ADR392/ADR395
General-Purpose Current Source
High Power Performance with Current Limit
Many times in low power applications, the need arises for a
precision current source that can operate on low supply voltages.
The ADR391/ADR392/ADR395 can be configured as a precision
current source. As shown in Figure 37, the circuit configuration
is a floating current source with a grounded load. The reference
output voltage is bootstrapped across RSET, which sets the output
current into the load. With this configuration, circuit precision
is maintained for load currents in the range from the reference
supply current, typically 90 μA to approximately 5 mA.
In some cases, the user may want higher output current delivered
to a load and still achieve better than 0.5% accuracy out of the
ADR39x. The accuracy for a reference is normally specified on
the data sheet with no load. However, the output voltage changes
with load current.
The circuit shown in Figure 38 provides high current without
compromising the accuracy of the ADR39x. The series pass
transistor, Q1, provides up to 1 A load current. The ADR39x
delivers only the base drive to Q1 through the force pin. The
sense pin of the ADR39x is a regulated output and is connected
to the load.
V
IN
The Transistor Q2 protects Q1 during short-circuit limit faults
by robbing its base drive. The maximum current is
SHDN
V
OUT (SENSE)
ADR39x
ILMAX ≈ 0.6 V/RS
(6)
V
IN
I
SET
V
OUT (FORCE)
GND
R1
0.1µF
4.7kΩ
U1
R1
P1
R1
VIN
R
I
GND
SET
SY
SHDN
VIN
ADJUST
I
(I )
SY SET
Q1
Q2N4921
VOUT (FORCE)
VOUT (SENSE)
I
= I
SET
+ I (I )
SY SET
OUT
Q2
Q2N2222
R
L
RS
RL
ADR39x
Figure 37. A General-Purpose Current Source
IL
Figure 38. ADR39x for High Power Performance with Current Limit
A similar circuit function can also be achieved with the
Darlington transistor configuration, as shown in Figure 39.
R1
4.7kΩ
U1
VIN
GND
SHDN
VIN
Q1
Q2N2222
VOUT (FORCE)
VOUT (SENSE)
Q2
Q2N4921
RS
ADR39x
RL
Figure 39. ADR39x for High Output Current
with Darlington Drive Configuration
Rev. H | Page 1ꢀ of 20
ADR391/ADR392/ADR395
150
100
50
CAPACITORS
Input Capacitor
Input capacitors are not required on the ADR39x. There is no
limit for the value of the capacitor used on the input, but a 1 μF
to 10 μF capacitor on the input improves transient response in
applications where the supply suddenly changes. An additional
0.1 μF in parallel also helps reduce noise from the supply.
0
Output Capacitor
–50
The ADR39x does not require output capacitors for stability under
any load condition. An output capacitor, typically 0.1 μF, filters
out any low level noise voltage and does not affect the operation
of the part. On the other hand, the load transient response can
improve with the addition of a 1 μF to 10 μF output capacitor in
parallel. A capacitor here acts as a source of stored energy for a
sudden increase in load current. The only parameter that degrades
by adding an output capacitor is the turn-on time, and it depends
on the size of the capacitor chosen.
–100
–150
0
100 200 300 400 500
600 700 800 900 1000
TIME (Hours)
Figure 40. ADR391 Typical Long-Term Drift over 1000 Hours
Rev. H | Page 17 of 20
ADR391/ADR392/ADR395
OUTLINE DIMENSIONS
2.90 BSC
5
1
4
3
2.80 BSC
1.60 BSC
2
PIN 1
0.95 BSC
1.90
BSC
*
0.90
0.87
0.84
*
1.00 MAX
0.20
0.08
8°
4°
0°
0.10 MAX
0.60
0.45
0.30
0.50
0.30
SEATING
PLANE
*
COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 41. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
ORDERING GUIDE
Initial
Accuracy
Output
Voltage
(VO)
Temperature
Coefficient
(ppm/°C)
Package
Package
Ordering Temperature
Branding Quantity Range
Model
(mV) (%)
Description Option
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
5-Lead TSOT UJ-5
ADR391AUJZ-REEL71 2.5
±ꢀ
±ꢀ
±±
±±
±ꢀ
±ꢀ
±5
±5
±5
±ꢀ
±ꢀ
±5
±5
0.2± 25
0.2± 25
0.1ꢀ
0.1ꢀ
R1A
R1A
R1B
R1B
RCA
RCA
RCB
RCB
RCB
RDA
RDA
RDB
RDB
3,000
250
3,000
250
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
ADR391AUJZ-R21
ADR391BUJZ-REEL71
ADR391BUJZ-R21
2.5
2.5
2.5
9
9
ADR392AUJZ-REEL71 ±.09ꢀ
0.15 25
0.15 25
0.12
0.12
0.12
3,000
250
3,000
250
3,000
3,000
250
3,000
250
ADR392AUJZ-R21
ADR392BUJZ-REEL71
ADR392BUJZ-R21
±.09ꢀ
±.09ꢀ
±.09ꢀ
9
9
9
ADR392WBUJZ-R71, 2 ±.09ꢀ
ADR395AUJZ-REEL71 5.0
ADR395AUJZ-R21
ADR395BUJZ-REEL71
ADR395BUJZ-R21
0.12 25
0.12 25
0.10
0.10
5.0
5.0
5.0
9
9
1 Z = RoHS Compliant Part.
2 Automotive grade.
Rev. H | Page 18 of 20
ADR391/ADR392/ADR395
NOTES
Rev. H | Page 19 of 20
ADR391/ADR392/ADR395
NOTES
©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00419-0-10/09(H)
Rev. H | Page 20 of 20
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