EVAL-ADM2582EEBZ [ADI]

Signal and Power Isolated RS-485 Transceiver with ±15 kV ESD Protection; 信号和电源隔离RS- 485收发器,提供± 15 kV ESD保护
EVAL-ADM2582EEBZ
型号: EVAL-ADM2582EEBZ
厂家: ADI    ADI
描述:

Signal and Power Isolated RS-485 Transceiver with ±15 kV ESD Protection
信号和电源隔离RS- 485收发器,提供± 15 kV ESD保护

文件: 总20页 (文件大小:486K)
中文:  中文翻译
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Signal and Power Isolated RS-485  
Transceiver with ± ±5 ꢀk ꢁSꢂ Protection  
AꢂM2582ꢁ/AꢂM2587ꢁ  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
V
V
ISOOUT  
CC  
Isolated RS-485/RS-422 transceiver, configurable as half or  
full duplex  
isoPower DC-TO-DC CONVERTER  
isoPower® integrated isolated dc-to-dc converter  
15 kV ESD protection on RS-485 input/output pins  
Complies with ANSI/TIA/EIA-485-A-98 and ISO 8482:1987(E)  
ADM2582E data rate: 16 Mbps  
OSCILLATOR  
RECTIFIER  
V
ISOIN  
REGULATOR  
ADM2587E data rate: 500 kbps  
5 V or 3.3 V operation  
Connect up to 256 nodes on one bus  
DIGITAL ISOLATION iCoupler  
TRANSCEIVER  
D
Y
Z
Open- and short-circuit, fail-safe receiver inputs  
High common-mode transient immunity: >25 kV/μs  
Thermal shutdown protection  
Safety and regulatory approvals (pending)  
UL recognition: 2500 V rms for 1 minute per UL 1577  
VDE Certificates of Conformity  
ENCODE  
DECODE  
DECODE  
ENCODE  
TxD  
DE  
ENCODE  
DECODE  
A
B
RxD  
R
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12  
V
IORM = 560 V peak  
RE  
ADM2582E/ADM2587E  
Operating temperature range: −40°C to +85°C  
Highly integrated, 20-lead, wide-body SOIC package  
GND  
GND  
2
1
ISOLATION  
BARRIER  
Figure 1.  
APPLICATIONS  
Isolated RS-485/RS-422 interfaces  
Industrial field networks  
Multipoint data transmission systems  
GENERAL DESCRIPTION  
The ADM2582E/ADM2587E are fully integrated signal and  
power isolated data transceivers with ±±5 kV ESD protection  
and are suitable for high speed communication on multipoint  
transmission lines. The ADM2582E/ADM2587E include an  
integrated isolated dc-to-dc power supply, which eliminates the  
need for an external dc-to-dc isolation block.  
The ADM2582E/ADM2587E driver has an active high enable.  
An active low receiver enable is also provided that causes the  
receiver output to enter a high impedance state when disabled.  
The devices have current limiting and thermal shutdown  
features to protect against output short circuits and situations  
where bus contention may cause excessive power dissipation.  
The parts are fully specified over the industrial temperature  
range and are available in a highly integrated, 20-lead, wide-  
body SOIC package.  
They are designed for balanced transmission lines and comply  
with ANSI/TIA/EIA-485-A-98 and ISO 8482:±987(E).  
The devices integrate Analog Devices, Inc., iCoupler® technology to  
combine a 3-channel isolator, a three-state differential line driver, a  
differential input receiver, and Analog Devices isoPower dc-to-  
dc converter into a single package. The devices are powered by a  
single 5 V or 3.3 V supply, realizing a fully integrated signal and  
power isolated RS-485 solution.  
The ADM2582E/ADM2587E contain isoPower technology that  
uses high frequency switching elements to transfer power through  
the transformer. Special care must be taken during printed circuit  
board (PCB) layout to meet emissions standards. Refer to  
Application Note AN-097±, Control of Radiated Emissions with  
isoPower Devices, for details on board layout considerations.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2009 Analog Devices, Inc. All rights reserved.  
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
TABLꢁ OF CONTꢁNTS  
Features .............................................................................................. ±  
Test Circuits..................................................................................... ±2  
Switching Characteristics .............................................................. ±3  
Circuit Description......................................................................... ±4  
Signal Isolation ........................................................................... ±4  
Power Isolation ........................................................................... ±4  
Truth Tables................................................................................. ±4  
Thermal Shutdown .................................................................... ±4  
Open- and Short-Circuit, Fail-Safe Receiver Inputs.............. ±4  
DC Correctness and Magnetic Field Immunity........................... ±5  
Applications Information.............................................................. ±6  
PCB Layout ................................................................................. ±6  
EMI Considerations................................................................... ±6  
Insulation Lifetime..................................................................... ±6  
Isolated Power Supply Considerations .................................... ±7  
Typical Applications................................................................... ±9  
Outline Dimensions....................................................................... 20  
Ordering Guide .......................................................................... 20  
Applications....................................................................................... ±  
Functional Block Diagram .............................................................. ±  
General Description......................................................................... ±  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
ADM2582E Timing Specifications ............................................ 4  
ADM2587E Timing Specifications ............................................ 4  
ADM2582E/ADM2587E Package Characteristics................... 4  
ADM2582E/ADM2587E Regulatory Information .................. 5  
ADM2582E/ADM2587E Insulation and Safety-Related  
Specifications ................................................................................ 5  
ADM2582E/ADM2587E VDE 0884 Insulation  
Characteristics (Pending)............................................................ 5  
Absolute Maximum Ratings............................................................ 6  
ESD Caution.................................................................................. 6  
Pin Configuration and Function Descriptions............................. 7  
Typical Performance Characteristics ............................................. 8  
REVISION HISTORY  
9/09—Revision 0: Initial Version  
Rev. 0 | Page 2 of 20  
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
SPꢁCIFICATIONS  
All voltages are relative to their respective ground; 3.0 ≤ VCC ≤ 5.5 V. All minimum/maximum specifications apply over the entire  
recommended operation range, unless otherwise noted. All typical specifications are at TA = 25°C, VCC = 5 V unless otherwise noted.  
Table 1.  
Parameter  
Symbol Min  
Typ  
Max  
Unit  
Test Conditions  
ADM2587E SUPPLY CURRENT  
Data Rate ≤ 500 kbps  
ICC  
90  
72  
125  
98  
mA  
mA  
mA  
mA  
mA  
VCC = 3.3 V, 100 Ω load between Y and Z  
VCC = 5 V, 100 Ω load between Y and Z  
VCC = 3.3 V, 54 Ω load between Y and Z  
VCC = 5 V, 54 Ω load between Y and Z  
120 Ω load between Y and Z  
120  
ADM2582E SUPPLY CURRENT  
Data Rate = 16 Mbps  
ICC  
150  
230  
mA  
mA  
120 Ω load between Y and Z  
54 Ω load between Y and Z  
ISOLATED SUPPLY VOLTAGE  
DRIVER  
VISOUT  
3.3  
Differential Outputs  
Differential Output Voltage, Loaded  
|VOD2  
|
|
2.0  
1.5  
1.5  
5.0  
5.0  
5.0  
0.2  
3.0  
0.2  
200  
30  
V
V
V
V
V
V
mA  
μA  
RL = 100 Ω (RS-422), see Figure 23  
RL = 54 Ω (RS-485), see Figure 23  
−7 V ≤ VTEST1 ≤ 12 V, see Figure 24  
RL = 54 Ω or 100 Ω, see Figure 23  
RL = 54 Ω or 100 Ω, see Figure 23  
RL = 54 Ω or 100 Ω, see Figure 23  
|VOD3  
Δ|VOD| for Complementary Output States Δ|VOD  
|
Common-Mode Output Voltage  
Δ|VOC| for Complementary Output States  
Short-Circuit Output Current  
VOC  
Δ|VOC  
IOS  
|
Output Leakage Current (Y, Z)  
IO  
DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V,  
VIN = 12 V  
−30  
μA  
DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V,  
VIN = −7 V  
Logic Inputs DE, RE, TxD  
Input Threshold Low  
Input Threshold High  
Input Current  
VIL  
VIH  
II  
0.3 × VCC  
−10  
V
DE, RE, TxD  
DE, RE, TxD  
DE, RE, TxD  
0.7 × VCC  
10  
V
0.01  
μA  
RECEIVER  
Differential Inputs  
Differential Input Threshold Voltage  
Input Voltage Hysteresis  
Input Current (A, B)  
VTH  
VHYS  
II  
−200  
−125  
15  
−30  
125  
mV  
mV  
μA  
μA  
kΩ  
−7 V < VCM < +12 V  
VOC = 0 V  
DE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V  
DE = 0 V, VCC = 0 V or 3.6 V, VIN = -7 V  
−7 V < VCM < +12 V  
−100  
96  
Line Input Resistance  
Logic Outputs  
RIN  
Output Voltage Low  
Output Voltage High  
VOL  
VOH  
0.2  
0.4  
V
V
IO = 1.5 mA, VA − VB = −0.2 V  
IO = −1.5 mA, VA − VB = 0.2 V  
VCC − 0.3 VCC − 0.2  
Short-Circuit Current  
100  
mA  
COMMON-MODE TRANSIENT IMMUNITY1  
25  
kV/μs VCM = 1 kV, transient magnitude = 800 V  
1 CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential  
difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates  
apply to both rising and falling common-mode voltage edges.  
Rev. 0 | Page 3 of 20  
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
ADM2582E TIMING SPECIFICATIONS  
TA = −40°C to +85°C.  
Table 2.  
Parameter  
Symbol Min Typ Max Unit  
Test Conditions  
DRIVER  
Maximum Data Rate  
Propagation Delay, Low to High  
Propagation Delay, High to Low  
Output Skew  
Rise Time/Fall Time  
Enable Time  
16  
Mbps  
ns  
ns  
ns  
ns  
tDPLH  
tDPHL  
tSKEW  
tDR, tDF  
tZL, tZH  
tLZ, tHZ  
63  
64  
1
100  
100  
8
15  
120  
150  
RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29  
RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29  
RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29  
RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29  
RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31  
RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31  
ns  
ns  
Disable Time  
RECEIVER  
Propagation Delay, Low to High  
Propagation Delay, High to Low  
Output Skew1  
Enable Time  
Disable Time  
tRPLH  
tRPHL  
tSKEW  
tZL, tZH  
tLZ, tHZ  
94  
95  
1
110  
110  
12  
15  
15  
ns  
ns  
ns  
ns  
ns  
CL = 15 pF, see Figure 27 and Figure 30  
CL = 15 pF, see Figure 27 and Figure 30  
CL = 15 pF, see Figure 27 and Figure 30  
RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32  
RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32  
1 Guaranteed by design.  
ADM2587E TIMING SPECIFICATIONS  
TA = −40°C to +85°C.  
Table 3.  
Parameter  
Symbol  
Min Typ Max  
Unit  
Test Conditions  
DRIVER  
Maximum Data Rate  
Propagation Delay, Low to High tDPLH  
Propagation Delay, High to Low tDPHL  
Output Skew  
Rise Time/Fall Time  
Enable Time  
500  
250  
250  
kbps  
ns  
ns  
503  
510  
7
700  
700  
100  
RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29  
RL = 54 Ω, CL1 = C L2 = 100 pF, see Figure 25 and Figure 29  
RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29  
RL = 54 Ω, CL1 = CL2 = 100 pF, see Figure 25 and Figure 29  
RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31  
RL = 110 Ω, CL = 50 pF, see Figure 26 and Figure 31  
tSKEW  
ns  
tDR, tDF  
tZL, tZH  
tLZ, tHZ  
200  
1100 ns  
2.5  
200  
μs  
ns  
Disable Time  
RECEIVER  
Propagation Delay, Low to High tRPLH  
Propagation Delay, High to Low tRPHL  
91  
95  
4
200  
200  
30  
15  
15  
ns  
ns  
ns  
ns  
ns  
CL = 15 pF, see Figure 27 and Figure 30  
CL = 15 pF, see Figure 27 and Figure 30  
CL = 15 pF, see Figure 27 and Figure 30  
RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32  
RL = 1 kΩ, CL = 15 pF, see Figure 28 and Figure 32  
Output Skew  
Enable Time  
Disable Time  
tSKEW  
tZL, tZH  
tLZ, tHZ  
ADM2582E/ADM2587E PACKAGE CHARACTERISTICS  
Table 4.  
Parameter  
Symbol  
RI-O  
CI-O  
Min  
Typ  
1012  
3
Max  
Unit  
Ω
pF  
Test Conditions  
Resistance (Input-to-Output)1  
Capacitance (Input-to-Output)1  
Input Capacitance2  
f = 1 MHz  
CI  
4
pF  
Input IC Junction-to-Case Thermal Resistance  
θJCI  
33  
°C/W  
Thermocouple located at center of  
package underside  
Output IC Junction-to-Case Thermal Resistance  
θJCO  
28  
°C/W  
Thermocouple located at center of  
package underside  
1 Device considered a 2-terminal device: short together Pin 1 to Pin 10 and short together Pin 11 to Pin 20.  
2 Input capacitance is from any input data pin to ground.  
Rev. 0 | Page 4 of 20  
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
ADM2582E/ADM2587E REGULATORY INFORMATION  
Table 5. Pending ADM2582E/ADM2587E Approvals  
Organization Approval Type  
Notes  
UL  
To be recognized under the Component  
Recognition Program of Underwriters  
Laboratories, Inc.  
In accordance with UL 1577, each ADM2582E/ADM2587E is proof tested  
by applying an insulation test voltage ≥ 3000 V rms for 1 second.  
VDE  
To be certified according to  
In accordance with VDE 0884-10, each ADM2582E/ADM2587E is proof  
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 tested by applying an insulation test voltage ≥ 1050 VPEAK for 1 second.  
ADM2582E/ADM2587E INSULATION AND SAFETY-RELATED SPECIFICATIONS  
Table 6.  
Parameter  
Symbol Value  
Unit  
Conditions  
Rated Dielectric Insulation Voltage  
Minimum External Air Gap (Clearance)  
2500  
>8.0  
V rms 1-minute duration  
L(I01)  
L(I02)  
mm  
mm  
Measured from input terminals to output terminals,  
shortest distance through air  
Measured from input terminals to output terminals,  
shortest distance along body  
Minimum External Tracking (Creepage)  
>8.0  
Minimum Internal Gap (Internal Clearance)  
Tracking Resistance (Comparative Tracking Index)  
Isolation Group  
0.017 min mm  
Insulation distance through insulation  
DIN IEC 112/VDE 0303-1  
Material Group (DIN VDE 0110: 1989-01, Table 1)  
CTI  
>175  
IIIa  
V
ADM2582E/ADM2587E VDE 0884 INSULATION CHARACTERISTICS (PENDING)  
This isolator is suitable for basic electrical isolation only within the safety limit data. Maintenance of the safety data must be ensured by  
means of protective circuits.  
Table 7.  
Description  
Conditions  
Symbol Characteristic Unit  
CLASSIFICATIONS  
Installation Classification per DIN VDE 0110 for  
Rated Mains Voltage  
≤150 V rms  
≤300 V rms  
≤400 V rms  
I to IV  
I to III  
I to II  
40/85/21  
2
Climatic Classification  
Pollution Degree  
VOLTAGE  
DIN VDE 0110, see Table 1  
Maximum Working Insulation Voltage  
Input-to-Output Test Voltage  
Method b1  
VIORM  
VPR  
560  
V peak  
V peak  
VIORM × 1.875 = VPR, 100% production tested,  
tm = 1 sec, partial discharge < 5 pC  
1050  
Method a  
After Environmental Tests, Subgroup 1  
After Input and/or Safety Test,  
Subgroup 2/Subgroup 3  
VIORM × 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC  
VIORM × 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC  
896  
672  
V peak  
V peak  
Highest Allowable Overvoltage  
SAFETY-LIMITING VALUES  
Case Temperature  
Input Current  
Output Current  
Transient overvoltage, tTR = 10 sec  
VTR  
4000  
V peak  
Maximum value allowed in the event of a failure  
TS  
IS, INPUT  
IS, OUTPUT 335  
RS  
>109  
150  
265  
°C  
mA  
mA  
Ω
Insulation Resistance at TS  
VIO = 500 V  
Rev. 0 | Page 5 of 20  
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
ABSOLUTꢁ MAXIMUM RATINGS  
TA = 25°C, unless otherwise noted. All voltages are relative to  
their respective ground.  
Table 9. Maximum Continuous Working Voltage1  
Parameter  
Max Unit  
Reference Standard  
AC Voltage  
Bipolar Waveform  
Table 8.  
Parameter  
424  
600  
V peak 50-year minimum  
lifetime  
Rating  
VCC  
−0.5 V to +7 V  
−0.5 V to VDD + 0.5 V  
−0.5 V to VDD + 0.5 V  
−9 V to +14 V  
−40°C to +85°C  
−55°C to +150°C  
15 kV  
Unipolar Waveform  
Basic Insulation  
Digital Input Voltage (DE, RE, TxD)  
Digital Output Voltage (RxD)  
Driver Output/Receiver Input Voltage  
Operating Temperature Range  
Storage Temperature Range  
V peak Maximum approved  
working voltage per  
IEC 60950-1 (pending)  
Reinforced Insulation 560  
V peak Maximum approved  
working voltage per  
IEC 60950-1 and  
ESD (Human Body Model) on  
A, B, Y, and Z pins  
VDE V 0884-10  
(pending)  
2 kV  
ESD (Human Body Model) on Other Pins  
Lead Temperature  
Soldering (10 sec)  
Vapor Phase (60 sec)  
Infrared (15 sec)  
DC Voltage  
Basic Insulation  
600  
V peak Maximum approved  
working voltage per  
260°C  
215°C  
220°C  
IEC 60950-1(pending)  
Reinforced Insulation 560  
V peak Maximum approved  
working voltage per  
IEC 60950-1 and  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
VDE V 0884-10  
(pending)  
1 Refers to continuous voltage magnitude imposed across the isolation  
barrier. See the Insulation Lifetime section for more details.  
ESD CAUTION  
Rev. 0 | Page 6 of 20  
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
PIN CONFIGURATION ANꢂ FUNCTION ꢂꢁSCRIPTIONS  
GND  
1
2
3
4
5
6
7
8
9
20 GND  
1
2
V
19  
18  
17  
V
ISOIN  
CC  
GND  
A
B
1
ADM2582E  
ADM2587E  
RxD  
RE  
16 GND  
2
TOP VIEW  
DE  
15  
Z
(Not to Scale)  
TxD  
14 GND  
2
V
13  
12  
Y
V
CC  
GND  
1
ISOOUT  
GND 10  
1
11 GND  
2
NOTES  
1. PIN 12 AND PIN 19 MUST BE  
CONNECTED EXTERNALLY.  
Figure 2. Pin Configuration  
Table 10. Pin Function Description  
Pin No.  
Mnemonic  
Description  
1
2
GND1  
VCC  
Ground, Logic Side.  
Logic Side Power Supply. It is recommended that a 0.1 μF and a 10 μF decoupling capacitor be fitted between  
Pin 2 and Pin 1.  
3
4
GND1  
RxD  
Ground, Logic Side.  
Receiver Output Data. This output is high when (A − B) > 200 mV and low when (A − B) < –200 mV.  
The output is tristated when the receiver is disabled, that is, when RE is driven high.  
5
RE  
Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver; driving it  
high disables the receiver.  
6
7
8
DE  
TxD  
VCC  
Driver Enable Input. Driving this input high enables the driver; driving it low disables the driver.  
Driver Input. Data to be transmitted by the driver is applied to this input.  
Logic Side Power Supply. It is recommended that a 0.1 μF and a 0.01 μF decoupling capacitor be fitted between  
Pin 8 and Pin 7.  
9
GND1  
GND1  
GND2  
VISOOUT  
Ground, Logic Side.  
Ground, Logic Side.  
Ground, Bus Side.  
10  
11  
12  
Isolated Power Supply Output. This pin must be connected externally to VISOIN. It is recommended that a reservoir  
capacitor of 10 μF and a decoupling capacitor of 0.1 μF be fitted between Pin 12 and Pin 11.  
13  
14  
15  
16  
17  
18  
19  
Y
Driver Noninverting Output  
Ground, Bus Side.  
Driver Inverting Output  
Ground, Bus Side.  
Receiver Inverting Input.  
Receiver Noninverting Input.  
Isolated Power Supply Input. This pin must be connected externally to VISOOUT. It is recommended that a  
0.1 μF and a 0.01 μF decoupling capacitor be fitted between Pin 19 and Pin 20.  
GND2  
Z
GND2  
B
A
VISOIN  
20  
GND2  
Ground, Bus Side.  
Rev. 0 | Page 7 of 20  
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
TYPICAL PꢁRFORMANCꢁ CHARACTꢁRISTICS  
180  
120  
100  
80  
60  
40  
20  
0
160  
R
= 54  
L
140  
120  
100  
80  
R
R
= 54  
L
R
= 120Ω  
L
= 120Ω  
L
NO LOAD  
60  
NO LOAD  
40  
20  
0
–40  
–15  
10  
35  
60  
85  
85  
85  
–40  
–15  
10  
35  
60  
85  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 3. ADM2582E Supply Current (ICC) vs. Temperature  
(Data Rate = 16 Mbps, DE = 3.3 V, VCC = 3.3 V)  
Figure 6. ADM2587E Supply Current (ICC) vs. Temperature  
(Data Rate = 500 kbps, DE = 3.3 V, VCC = 3.3 V)  
72  
70  
68  
66  
64  
62  
60  
58  
56  
54  
52  
50  
140  
120  
100  
80  
R
= 54Ω  
L
L
R
= 120Ω  
tDPHL  
tDPLH  
60  
NO LOAD  
40  
20  
0
–40  
–40  
–15  
10  
35  
60  
85  
–15  
10  
35  
60  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 7. ADM2582E Differential Driver Propagation Delay vs. Temperature  
Figure 4. ADM2582E Supply Current (ICC) vs. Temperature  
(Data Rate = 16 Mbps, DE = 5 V, VCC = 5 V)  
600  
580  
560  
140  
120  
100  
80  
60  
40  
20  
0
R
R
= 54Ω  
L
540  
tDPLH  
520  
tDPHL  
= 120Ω  
L
500  
480  
460  
440  
420  
400  
NO LOAD  
–40  
–15  
10  
35  
60  
85  
–40  
–15  
10  
35  
60  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 8. ADM2587E Differential Driver Propagation Delay vs. Temperature  
Figure 5. ADM2587E Supply Current (ICC) vs. Temperature  
(Data Rate = 500 kbps, DE = 5 V, VCC = 5 V)  
Rev. 0 | Page 8 of 20  
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
60  
50  
40  
30  
20  
10  
0
TxD  
1
Z
Y
3
CH1 2.0V CH2 2.0V  
CH3 2.0V  
M10.00ns  
A CH1  
1.28V  
0
1
2
3
4
5
OUTPUT VOLTAGE (V)  
Figure 9. ADM2582E Driver Propagation Delay  
Figure 12. Receiver Output Current vs. Receiver Output Low Voltage  
4.75  
4.74  
4.73  
4.72  
4.71  
4.70  
4.69  
4.68  
4.67  
TxD  
1
Z
Y
3
4.66  
4.65  
CH1 2.0V CH2 2.0V  
CH3 2.0V  
M200ns  
A
CH1  
2.56V  
–40  
–15  
10  
35  
60  
85  
TEMPERATURE (°C)  
Figure 10. ADM2587E Driver Propagation Delay  
Figure 13. Receiver Output High Voltage vs. Temperature  
0
0.32  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
0.30  
0.28  
0.26  
0.24  
0.22  
0.20  
0
1
2
3
4
5
–40  
–15  
10  
35  
60  
85  
OUTPUT VOLTAGE (V)  
TEMPERATURE (°C)  
Figure 11. Receiver Output Current vs. Receiver Output High Voltage  
Figure 14. Receiver Output Low Voltage vs. Temperature  
Rev. 0 | Page 9 of 20  
AꢂM2582ꢁ/AꢂM2587ꢁ  
100  
99  
98  
97  
96  
95  
94  
93  
92  
91  
90  
B
A
tRPHL  
1
RxD  
tRPLH  
3
CH1 2.0V CH2 2.0V  
CH3 2.0V  
M10.00ns  
A
CH1  
2.56V  
–40  
–15  
10  
35  
60  
85  
TEMPERATURE (°C)  
Figure 15. ADM2582E Receiver Propagation Delay  
Figure 18. ADM2587E Receiver Propagation Delay vs. Temperature  
3.33  
3.32  
3.31  
3.30  
A
B
1
3.29  
NO LOAD  
R
R
= 120Ω  
= 54Ω  
3.28  
3.27  
3.26  
L
L
RxD  
3
CH1 2.0V CH2 2.0V  
CH3 2.0V  
M10.00ns  
A
CH1  
2.56V  
–40  
–15  
10  
35  
60  
85  
TEMPERATURE (°C)  
Figure 19. ADM2582E Isolated Supply Voltage vs. Temperature  
(VCC = 3.3 V, Data Rate = 16 Mbps)  
Figure 16. ADM2587E Receiver Propagation Delay  
98  
3.36  
3.35  
3.34  
3.33  
3.32  
3.31  
3.30  
3.29  
97  
96  
95  
94  
93  
92  
tRPHL  
tRPLH  
NO LOAD  
3.28  
3.27  
3.26  
R
R
= 120Ω  
= 54Ω  
L
L
–40  
–15  
10  
35  
60  
85  
–40  
–15  
10  
35  
60  
85  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 17. ADM2582E Receiver Propagation Delay vs. Temperature  
Figure 20. ADM2582E Isolated Supply Voltage vs. Temperature  
(VCC = 5 V, Data Rate = 16 Mbps)  
Rev. 0 | Page 10 of 20  
AꢂM2582ꢁ/AꢂM2587ꢁ  
60  
50  
40  
30  
20  
10  
0
40  
35  
30  
25  
20  
15  
10  
5
R
R
= 54Ω  
L
R
R
= 54Ω  
L
= 120Ω  
L
= 120Ω  
L
NO LOAD  
NO LOAD  
0
–40  
–40  
–15  
10  
35  
60  
85  
–15  
10  
35  
60  
85  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 21. ADM2582E Isolated Supply Current vs. Temperature  
(VCC = 3.3 V, Data Rate = 16 Mbps)  
Figure 22. ADM2587E Isolated Supply Current vs. Temperature  
(VCC = 3.3 V, Data Rate = 500 kbps)  
Rev. 0 | Page 11 of 20  
AꢂM2582ꢁ/AꢂM2587ꢁ  
TꢁST CIRCUITS  
Y
R
L
2
TxD  
V
OD2  
V
V
CC  
OUT  
R
L
Y
Z
R
110  
Z
2
L
V
OC  
TxD  
DE  
S1  
S2  
C
L
50pF  
Figure 23. Driver Voltage Measurement  
Figure 26. Driver Enable/Disable  
Y
375Ω  
A
V
TxD  
60Ω  
OD3  
375Ω  
V
Z
OUT  
V
TEST  
RE  
B
C
L
Figure 24. Driver Voltage Measurement  
Figure 27. Receiver Propagation Delay  
V
Y
+1.5V  
–1.5V  
CC  
C
C
L
L
S1  
TxD  
R
L
R
L
S2  
Z
RE  
C
V
OUT  
L
RE IN  
Figure 25. Driver Propagation Delay  
Figure 28. Receiver Enable/Disable  
Rev. 0 | Page 12 of 20  
 
 
 
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
SWITCHING CHARACTꢁRISTICS  
V
CC  
V
/2  
V
/2  
CC  
CC  
0V  
Z
tDPLH  
tDPHL  
V
CC  
0.5V  
tZL  
0.5V  
CC  
CC  
1/2V  
DE  
O
V
O
0V  
tLZ  
2.3V  
2.3V  
Y
Y, Z  
Y, Z  
+V  
V
OL  
+ 0.5V  
– 0.5V  
O
90% POINT  
90% POINT  
V
= V – V  
(Y) (Z)  
V
DIFF  
OL  
V
DIFF  
tZH  
tHZ  
V
10% POINT  
10% POINT  
OH  
–V  
O
V
OH  
tDF  
tDR  
t
= t  
– t  
SKEW  
DPHL  
DPLH  
Figure 29. Driver Propagation Delay, Rise/Fall Timing  
Figure 31. Driver Enable/Disable Timing  
0.7V  
0.3V  
CC  
CC  
0.5V  
tZL  
0.5V  
CC  
CC  
RE  
A – B  
0V  
0V  
tLZ  
1.5V  
1.5V  
RO  
V
V
+ 0.5V  
tRPLH  
tRPHL  
OL  
OUTPUT LOW  
OUTPUT HIGH  
V
OL  
V
V
OH  
tZH  
tHZ  
V
OH  
RxD  
1.5V  
1.5V  
tSKEW = |tRPLH  
tRPHL  
|
– 0.5V  
OH  
RO  
0V  
OL  
Figure 32. Receiver Enable/Disable Timing  
Figure 30. Receiver Propagation Delay  
Rev. 0 | Page 13 of 20  
 
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
CIRCUIT ꢂꢁSCRIPTION  
Table 13. Receiving (see Table 11 for Abbreviations)  
Inputs Output  
SIGNAL ISOLATION  
The ADM2582E/ADM2587E signal isolation is implemented on  
the logic side of the interface. The part achieves signal isolation  
by having a digital isolation section and a transceiver section  
(see Figure ±). Data applied to the TxD and DE pins and referenced  
to logic ground (GND±) are coupled across an isolation barrier  
to appear at the transceiver section referenced to isolated ground  
(GND2). Similarly, the single-ended receiver output signal,  
referenced to isolated ground in the transceiver section, is  
coupled across the isolation barrier to appear at the RXD pin  
referenced to logic ground.  
A − B  
RE  
RxD  
> −0.03 V  
< −0.2 V  
−0.2 V < A − B < −0.03 V  
L or NC  
L or NC  
L or NC  
L or NC  
H
H
L
X
H
Z
H
L
Inputs open  
X
X
X
L or NC  
L or NC  
THERMAL SHUTDOWN  
POWER ISOLATION  
The ADM2582E/ADM2587E contain thermal shutdown circuitry  
that protects the parts from excessive power dissipation during  
fault conditions. Shorting the driver outputs to a low impedance  
source can result in high driver currents. The thermal sensing  
circuitry detects the increase in die temperature under this  
condition and disables the driver outputs. This circuitry is  
designed to disable the driver outputs when a die temperature  
of ±50°C is reached. As the device cools, the drivers are reenabled  
at a temperature of ±40°C.  
The ADM2582E/ADM2587E power isolation is implemented  
using an isoPower integrated isolated dc-to-dc converter. The  
dc-to-dc converter section of the ADM2582E/ADM2587E works  
on principles that are common to most modern power supplies.  
It is a secondary side controller architecture with isolated pulse-  
width modulation (PWM) feedback. VCC power is supplied to  
an oscillating circuit that switches current into a chip-scale air  
core transformer. Power transferred to the secondary side is  
rectified and regulated to 3.3 V. The secondary (VISO) side  
controller regulates the output by creating a PWM control  
signal that is sent to the primary (VCC) side by a dedicated  
iCoupler data channel. The PWM modulates the oscillator  
circuit to control the power being sent to the secondary side.  
Feedback allows for significantly higher power and efficiency.  
OPEN- AND SHORT-CIRCUIT, FAIL-SAFE RECEIVER  
INPUTS  
The receiver inputs have open- and short-circuit, fail-safe  
features that ensure that the receiver output is high when the  
inputs are open or shorted. During line-idle conditions, when no  
driver on the bus is enabled, the voltage across a terminating  
resistance at the receiver input decays to 0 V. With traditional  
transceivers, receiver input thresholds specified between −200 mV  
and +200 mV mean that external bias resistors are required on the  
A and B pins to ensure that the receiver outputs are in a known  
state. The short-circuit, fail-safe receiver input feature eliminates  
the need for bias resistors by specifying the receiver input  
threshold between −30 mV and −200 mV. The guaranteed negative  
threshold means that when the voltage between A and B decays  
to 0 V, the receiver output is guaranteed to be high.  
TRUTH TABLES  
The truth tables in this section use the abbreviations found in  
Table ±±.  
Table 11. Truth Table Abbreviations  
Letter  
Description  
H
L
High level  
Low level  
X
Don’t care  
Z
NC  
High impedance (off)  
Disconnected  
Table 12. Transmitting (see Table 11 for Abbreviations)  
Inputs  
Outputs  
DE  
H
H
L
X
L
TxD  
Y
H
L
Z
Z
Z
Z
Z
L
H
L
X
X
X
X
H
Z
Z
Z
Z
X
Rev. 0 | Page 14 of 20  
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
100  
10  
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY  
The digital signals transmit across the isolation barrier using  
iCoupler technology. This technique uses chip-scale transformer  
windings to couple the digital signals magnetically from one  
side of the barrier to the other. Digital inputs are encoded into  
waveforms that are capable of exciting the primary transformer  
winding. At the secondary winding, the induced waveforms are  
decoded into the binary value that was originally transmitted.  
1
0.1  
Positive and negative logic transitions at the isolator input cause  
narrow (~± ns) pulses to be sent to the decoder via the transformer.  
The decoder is bistable and is, therefore, either set or reset by  
the pulses, indicating input logic transitions. In the absence of  
logic transitions at the input for more than ± μs, periodic sets of  
refresh pulses indicative of the correct input state are sent to  
ensure dc correctness at the output. If the decoder receives no  
internal pulses of more than approximately 5 ꢀs, the input side  
is assumed to be unpowered or nonfunctional, in which case,  
the isolator output is forced to a default state by the watchdog  
timer circuit.  
0.01  
0.001  
1k  
10k  
100k  
1M  
10M  
100M  
MAGNETIC FIELD FREQUENCY (Hz)  
Figure 33. Maximum Allowable External Magnetic Flux Density  
For example, at a magnetic field frequency of ± MHz, the  
maximum allowable magnetic field of 0.2 kgauss induces a  
voltage of 0.25 V at the receiving coil. This is about 50% of the  
sensing threshold and does not cause a faulty output transition.  
Similarly, if such an event occurs during a transmitted pulse  
(and is of the worst-case polarity), it reduces the received pulse  
from >±.0 V to 0.75 V, which is still well above the 0.5 V sensing  
threshold of the decoder.  
This situation should occur in the ADM2582E/ADM2587E devices  
only during power-up and power-down operations. The limitation  
on the ADM2582E/ADM2587E magnetic field immunity is set  
by the condition in which induced voltage in the transformer  
receiving coil is sufficiently large to either falsely set or reset the  
decoder. The following analysis defines the conditions under  
which this can occur.  
The preceding magnetic flux density values correspond  
to specific current magnitudes at given distances from the  
ADM2582E/ADM2587E transformers. Figure 34 expresses  
these allowable current magnitudes as a function of frequency  
for selected distances. As shown in Figure 34, the ADM2582E/  
ADM2587E are extremely immune and can be affected only by  
extremely large currents operated at high frequency very close  
to the component. For the ± MHz example, a 0.5 kA current must  
be placed 5 mm away from the ADM2582E/ADM2587E to affect  
The 3.3 V operating condition of the ADM2582E/ADM2587E  
is examined because it represents the most susceptible mode of  
operation. The pulses at the transformer output have an amplitude  
of >±.0 V. The decoder has a sensing threshold of about 0.5 V,  
thus establishing a 0.5 V margin in which induced voltages can  
be tolerated. The voltage induced across the receiving coil is  
given by  
component operation.  
1k  
V = (−/dt)Σπrn2; n = ±, 2, … , N  
DISTANCE = 1m  
100  
where:  
β is magnetic flux density (gauss).  
N is the number of turns in the receiving coil.  
rn is the radius of the nth turn in the receiving coil (cm).  
10  
DISTANCE = 100mm  
Given the geometry of the receiving coil in the ADM2582E/  
ADM2587E and an imposed requirement that the induced  
voltage be, at most, 50% of the 0.5 V margin at the decoder, a  
maximum allowable magnetic field is calculated as shown in  
Figure 33.  
1
DISTANCE = 5mm  
0.1  
0.01  
1k  
10k  
100k  
1M  
10M  
100M  
MAGNETIC FIELD FREQUENCY (Hz)  
Figure 34. Maximum Allowable Current for Various Current-to-  
ADM2582E/ADM2587E Spacings  
Note that in combinations of strong magnetic field and high  
frequency, any loops formed by printed circuit board (PCB)  
traces can induce error voltages sufficiently large to trigger the  
thresholds of succeeding circuitry. Take care in the layout of  
such traces to avoid this possibility.  
Rev. 0 | Page 15 of 20  
 
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
APPLICATIONS INFORMATION  
The ADM2582E/ADM2587E dissipate approximately 650 mW  
of power when fully loaded. Because it is not possible to apply  
a heat sink to an isolation device, the devices primarily depend  
on heat dissipation into the PCB through the GND pins. If the  
devices are used at high ambient temperatures, provide a thermal  
path from the GND pins to the PCB ground plane. The board  
layout in Figure 35 shows enlarged pads for Pin ±, Pin 3, Pin 9,  
Pin ±0, Pin ±±, Pin ±4, Pin ±6, and Pin 20. Implement multiple  
vias from the pad to the ground plane to reduce the temperature  
inside the chip significantly. The dimensions of the expanded  
pads are at the discretion of the designer and dependent on the  
available board space.  
PCB LAYOUT  
The ADM2582E/ADM2587E isolated RS-422/RS-485 transceiver  
contains an isoPower integrated dc-to-dc converter, requiring  
no external interface circuitry for the logic interfaces. Power  
supply bypassing is required at the input and output supply pins  
(see Figure 35). The power supply section of the ADM2582E/  
ADM2587E uses an ±80 MHz oscillator frequency to pass power  
efficiently through its chip-scale transformers. In addition, the  
normal operation of the data section of the iCoupler introduces  
switching transients on the power supply pins.  
Bypass capacitors are required for several operating frequencies.  
Noise suppression requires a low inductance, high frequency  
capacitor, whereas ripple suppression and proper regulation  
require a large value capacitor. These capacitors are connected  
between Pin ± (GND±) and Pin 2 (VCC) and Pin 8 (VCC) and  
Pin 9 (GND±) for VCC. The VISOIN and VISOOUT capacitors are  
connected between Pin ±± (GND2) and Pin ±2 (VISOOUT) and  
Pin ±9 (VISOIN) and Pin 20 (GND2). To suppress noise and reduce  
ripple, a parallel combination of at least two capacitors is required.  
The recommended capacitor values are 0.± μF and ±0 μF. The  
recommended best practice is to use a very low inductance  
ceramic capacitor, or its equivalent, for the smaller value. The  
total lead length between both ends of the capacitor and the  
input power supply pin should not exceed ±0 mm.  
EMI CONSIDERATIONS  
The dc-to-dc converter section of the ADM2582E/ADM2587E  
components must, of necessity, operate at very high frequency  
to allow efficient power transfer through the small transformers.  
This creates high frequency currents that can propagate in circuit  
board ground and power planes, causing edge and dipole radiation.  
Grounded enclosures are recommended for applications that use  
these devices. If grounded enclosures are not possible, good RF  
design practices should be followed in the layout of the PCB.  
See Application Note AN-097±, Control of Radiated Emissions  
with isoPower Devices, for more information.  
INSULATION LIFETIME  
All insulation structures eventually break down when subjected to  
voltage stress over a sufficiently long period. The rate of insulation  
degradation is dependent on the characteristics of the voltage  
waveform applied across the insulation. Analog Devices conducts  
an extensive set of evaluations to determine the lifetime of the  
insulation structure within the ADM2582E/ADM2587E.  
GND  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
GND  
2
1
V
V
ISOIN  
CC  
GND  
3
A
B
1
RxD  
RE  
4
5
GND  
Z
2
DE  
6
TxD  
7
GND  
Y
2
V
8
CC  
Accelerated life testing is performed using voltage levels higher  
than the rated continuous working voltage. Acceleration factors for  
several operating conditions are determined, allowing calculation  
of the time to failure at the working voltage of interest. The values  
shown in Table 9 summarize the peak voltages for 50 years of  
service life in several operating conditions. In many cases, the  
working voltage approved by agency testing is higher than the  
50-year service life voltage. Operation at working voltages higher  
than the service life voltage listed leads to premature insulation  
failure.  
GND  
9
V
ISOOUT  
1
1
GND  
10  
GND  
2
Figure 35. Recommended PCB Layout  
In applications involving high common-mode transients, ensure  
that board coupling across the isolation barrier is minimized.  
Furthermore, design the board layout such that any coupling  
that does occur equally affects all pins on a given component  
side. Failure to ensure this can cause voltage differentials between  
pins exceeding the absolute maximum ratings for the device,  
thereby leading to latch-up and/or permanent damage.  
The insulation lifetime of the ADM2582E/ADM2587E depends  
on the voltage waveform type imposed across the isolation barrier.  
The iCoupler insulation structure degrades at different rates,  
depending on whether the waveform is bipolar ac, unipolar ac,  
or dc. Figure 36, Figure 37, and Figure 38 illustrate these different  
isolation voltage waveforms.  
Bipolar ac voltage is the most stringent environment. A 50-year  
operating lifetime under the bipolar ac condition determines  
the Analog Devices recommended maximum working voltage.  
Rev. 0 | Page 16 of 20  
 
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
In the case of unipolar ac or dc voltage, the stress on the insulation  
is significantly lower. This allows operation at higher working  
voltages while still achieving a 50-year service life. The working  
voltages listed in Table 9 can be applied while maintaining the  
50-year minimum lifetime, provided the voltage conforms to either  
the unipolar ac or dc voltage cases. Any crossinsulation voltage  
waveform that does not conform to Figure 37 or Figure 38 should  
be treated as a bipolar ac waveform, and its peak voltage should  
be limited to the 50-year lifetime voltage value listed in Table 9.  
RATED PEAK VOLTAGE  
ISOLATED POWER SUPPLY CONSIDERATIONS  
The typical output voltage of the integrated isoPower dc-to-dc  
isolated supply is 3.3 V. The isolated supply in the ADM2587E  
is capable of supplying a current of 55 mA when the junction  
temperature of the device is kept below ±20°C. It is important  
to note that the current available on the VISOOUT pin is the total  
current available and includes the current required to supply the  
internal RS-485 circuitry.  
The ADM2587E can typically supply ±5 mA externally on  
V
ISOOUT when the driver is switching at 500 kbps loaded with 54 Ω,  
0V  
while the junction temperature of the part is less than ±20°C.  
Table 14. Typical Maximum External Current Available  
Figure 36. Bipolar AC Waveform  
on VISOOUT  
RATED PEAK VOLTAGE  
External Load  
Current (mA)  
RT  
System Configuration  
0V  
15  
54 Ω  
Double terminated bus with  
RT = 110 Ω  
Single terminated bus  
Unterminated bus  
Figure 37. DC Waveform  
RATED PEAK VOLTAGE  
29  
46  
120 Ω  
Unloaded  
The ADM2582E typically has no current available externally  
on VISOOUT  
0V  
.
NOTES  
1. THE VOLTAGE IS SHOWN AS SINUSODIAL FOR ILLUSTRATION  
PURPOSES ONLY. IT IS MEANT TO REPRESENT ANY VOLTAGE  
WAVEFORM VARYING BETWEEN 0 AND SOME LIMITING VALUE.  
THE LIMITING VALUE CAN BE POSITIVE OR NEGATIVE, BUT THE  
VOLTAGE CANNOT CROSS 0V.  
When external current is drawn from the VISOOUT pin, there is  
an increased risk of generating radiated emissions due to the  
high frequency switching elements used in the isoPower dc to-  
dc converter. Special care must be taken during PCB layout to  
meet emissions standards. See Application Note AN-097±,  
Control of Radiated Emissions with isoPower Devices, for details  
on board layout considerations.  
Figure 38. Unipolar AC Waveform  
V
CC  
V
EXTERNAL  
LOAD  
V
ISOOUT  
CC  
isoPower DC-TO-DC CONVERTER  
GND  
GND  
1
OSCILLATOR  
RECTIFIER  
GND  
2
V
ISOIN  
REGULATOR  
TRANSCEIVER  
DIGITAL ISOLATION iCoupler  
Y
TxD  
DE  
500kbps  
ENCODE  
DECODE  
DECODE  
ENCODE  
D
Z
V
CC  
R
T
ENCODE  
DECODE  
A
B
RxD  
RE  
R
ADM2582E/ADM2587E  
ISOLATION  
BARRIER  
GND  
GND  
2
1
Figure 39. ADM2587E Typical Maximum External Current Measurements  
Rev. 0 | Page 17 of 20  
 
 
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
3.3V/5V POWER  
SUPPLY  
100nF  
10µF  
100nF  
10nF  
100nF  
10µF  
V
V
CC  
ISOOUT  
V
CC  
isoPower DC-TO-DC CONVERTER  
OSCILLATOR  
RECTIFIER  
V
ISOIN  
100nF 10nF  
REGULATOR  
DIGITAL ISOLATION  
ENCODE  
i
Coupler  
TRANSCEIVER  
D
Y
TxD  
DE  
R
R
DECODE  
DECODE  
ENCODE  
Z
T
MICROCONTROLLER  
AND UART  
ENCODE  
DECODE  
A
B
RxD  
R
T
RE  
ADM2582E/ADM2587E  
GND  
GND  
2
1
ISOLATION  
BARRIER  
GND  
1
Figure 40. Example Circuit Diagram Using the ADM2582E/ADM2587E  
Figure 40 is an example of a circuit diagram using the ADM2582E/ADM2587E.  
Rev. 0 | Page 18 of 20  
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
TYPICAL APPLICATIONS  
Figure 4± and Figure 42 show typical applications of the ADM2582E/  
ADM2587E in half duplex and full duplex RS-485 network  
configurations. Up to 256 transceivers can be connected to the  
RS-485 bus. To minimize reflections, terminate the line at the  
receiving end in its characteristic impedance, and keep stub  
lengths off the main line as short as possible. For half-duplex  
operation, this means that both ends of the line must be  
terminated because either end can be the receiving end.  
MAXIMUM NUMBER OF TRANSCEIVERS ON BUS = 256  
ADM2582E/  
ADM2587E  
ADM2582E/  
ADM2587E  
A
B
A
RxD  
RxD  
R
R
B
RE  
RE  
DE  
R
T
R
T
DE  
Z
Y
Z
TxD  
TxD  
D
D
Y
A
B
Z
Y
A
B
Z
Y
R
R
D
D
ADM2582E/  
ADM2587E  
ADM2582E/  
ADM2587E  
RxD RE DE TxD  
RxD RE DE TxD  
NOTES  
1. R IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.  
T
2. ISOLATION NOT SHOWN.  
Figure 41. ADM2582E/ADM2587E Typical Half Duplex RS-485 Network  
MAXIMUM NUMBER OF NODES = 256  
MASTER  
R
SLAVE  
A
B
Z
Y
Z
RxD  
RE  
D
TxD  
DE  
R
T
B
A
DE  
RE  
R
T
D
TxD  
R
RxD  
Y
ADM2582E/  
ADM2587E  
ADM2582E/  
ADM2587E  
A
B
Z
Y
A
B
Z
Y
SLAVE  
SLAVE  
R
R
D
D
ADM2582E/  
ADM2587E  
ADM2582E/  
ADM2587E  
RxD RE DE TxD  
RxD RE DE TxD  
NOTES  
1. R IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.  
T
2. ISOLATION NOT SHOWN.  
Figure 42. ADM2582E/ADM2587E Typical Full Duplex RS-485 Network  
Rev. 0 | Page 19 of 20  
 
 
 
AꢂM2582ꢁ/AꢂM2587ꢁ  
OUTLINꢁ ꢂIMꢁNSIONS  
13.00 (0.5118)  
12.60 (0.4961)  
20  
1
11  
10  
7.60 (0.2992)  
7.40 (0.2913)  
10.65 (0.4193)  
10.00 (0.3937)  
0.75 (0.0295)  
0.25 (0.0098)  
45°  
2.65 (0.1043)  
2.35 (0.0925)  
0.30 (0.0118)  
0.10 (0.0039)  
8°  
0°  
COPLANARITY  
0.10  
SEATING  
PLANE  
0.51 (0.0201)  
0.31 (0.0122)  
1.27 (0.0500)  
0.40 (0.0157)  
1.27  
(0.0500)  
BSC  
0.33 (0.0130)  
0.20 (0.0079)  
COMPLIANT TO JEDEC STANDARDS MS-013-AC  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 43. 20-Lead Standard Small Outline Package [SOIC_W]  
Wide Body  
(RW-20)  
Dimensions shown in millimeters and (inches)  
ORDERING GUIDE  
Model  
Data Rate (Mbps)  
Temperature Range  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
Package Description  
20-Lead SOIC_W  
20-Lead SOIC_W  
20-Lead SOIC_W  
20-Lead SOIC_W  
Package Option  
RW-20  
RW-20  
ADM2582EBRWZ1  
ADM2582EBRWZ-REEL71  
ADM2587EBRWZ1  
ADM2587EBRWZ-REEL71  
EVAL-ADM2582EEBZ1  
EVAL-ADM2587EEBZ1  
16  
16  
0.5  
0.5  
RW-20  
RW-20  
ADM2582E Evaluation Board  
ADM2587E Evaluation Board  
1 Z = RoHS Compliant Part.  
©2009 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D08111-0-9/09(0)  
Rev. 0 | Page 20 of 20  
 
 
 

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