EVAL-ADMP421Z [ADI]
Omnidirectional Microphone with Bottom Port and Digital Output; 全向麦克风与底部端口和数字输出
| 型号： | EVAL-ADMP421Z |
| 厂家： | 
ADI |
| 描述： | Omnidirectional Microphone with Bottom Port and Digital Output |
| 文件： | 总16页 (文件大小：178K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Omnidirectional Microphone with
Bottom Port and Digital Output
ADMP421
FEATURES
GENERAL DESCRIPTION
Small and thin 3 mm × 4 mm × 1 mm surface-mount package
High SNR of 61 dBA
High sensitivity of −26 dBFS
Flat frequency response from 100 Hz to 15 kHz
Low current consumption: <650 μA
High PSRR of 80 dBFS
The ADMP421 is a low cost, low power, digital output bottom-
ported omnidirectional MEMS microphone. The ADMP421
consists of a MEMS microphone element, an impedance converter
amplifier, and a fourth-order Σ-Δ modulator. The digital inter-
face allows for the pulse density modulated (PDM) output of
two microphones to be time multiplexed on a single data line
using a single clock.
Fourth-order Σ-Δ modulator
Digital PDM output
The ADMP421 has a high SNR and high sensitivity, making it
an excellent choice for far field applications. The ADMP421 has
a flat wideband frequency response resulting in natural sound
with high intelligibility. Low current consumption and a sleep
mode enable long battery life for portable applications. A built-
in particle filter provides high reliability. The ADMP421 complies
with the TIA-920 Telecommunications Telephone Terminal
Equipment Transmission Requirements for Wideband Digital
Wireline Telephones standard.
Compatible with Sn/Pb and Pb-free solder processes
RoHS/WEEE compliant
APPLICATIONS
Smartphones and feature phones
Digital video cameras
Bluetooth headsets
Video phones
Teleconferencing systems
The ADMP421 is available in a thin 3 mm × 4 mm × 1 mm
surface-mount package. It is reflow solder compatible with no
sensitivity degradation. The ADMP421 is halide free.
FUNCTIONAL BLOCK DIAGRAM
ASIC
MEMS
DATA
ADMP421
L/R SELECT
CLK
MEMBRANE
BACKPLATE
IMPEDANCE
CONVERTER
V
ADC
DD
GND
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2010 Analog Devices, Inc. All rights reserved.
ADMP421
TABLE OF CONTENTS
Features .............................................................................................. 1
PCB Land Pattern Layout.................................................................8
Evaluation Board ...............................................................................9
Interfacing With Analog Devices Codecs................................... 10
Handling Instructions.................................................................... 11
Pick and Place Equipment......................................................... 11
Reflow Solder.............................................................................. 11
Board Wash ................................................................................. 11
Reliability Specifications................................................................ 12
Outline Dimensions....................................................................... 13
Ordering Guide .......................................................................... 13
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
REVISION HISTORY
/10—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADMP421
SPECIFICATIONS
TA = 25°C, VDD = 1.8 V, CLK = 2.4 MHz, unless otherwise noted. All minimum and maximum specifications are guaranteed. Typical
specifications are not guaranteed.
Table 1.
Parameter
Symbol Test Conditions/Comments
Min
Typ
Max Unit
PERFORMANCE
Directionality
Omni
−26
61
33
100
15
Sensitivity1
1 kHz, 94 dB SPL
−29
−23 dBFS
dBA
Signal-to-Noise Ratio
Equivalent Input Noise
Frequency Response2
SNR
EIN
20 kHz bandwidth, A-weighted
20 kHz bandwidth, A-weighted
Low frequency −3 dB point
High frequency −3 dB point
Deviation from flat response within pass band
105 dB SPL
dBA SPL
Hz
kHz
dB
%
−3
+2
3
Total Harmonic Distortion
THD
Power Supply Rejection Ratio PSRR
217 Hz, 100 mV p-p square wave superimposed
on VDD = 1.8 V
80
dBFS
Maximum Acoustic Input
INPUT CHARACTERISTICS
Clock
Supply Voltage
Supply Current
Peak
120
dB SPL
CLK
VDD
IS
2.43
MHz
V
μA
μA
1.65
3.6
650
50
Normal mode
Sleep mode
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Latency
Wake-Up Time
Polarity
VOH
VOL
VDD
0
<30
10
V
V
μs
ms
From sleep mode, power on
Noninverting4
1 Relative to the rms level of a sine wave with positive amplitude equal to 100% 1s density and negative amplitude equal to 0% 1s density.
2 See Figure 5 and Figure 6.
3 The microphone operates at any clock frequency between 1.0 MHz and 3.3 MHz. Some specifications may not be guaranteed at frequencies other than 2.4 MHz.
4 Positive going (increasing) pressure on the membrane results in an increase in the number of 1s at the output.
Rev. 0 | Page 3 of 16
ADMP421
TIMING CHARACTERISTICS
Table 2.
Parameter
Description
Min
310
30
Max
Unit
Input
tCLKIN
Output
t1OUTEN
t1OUTDIS
t2OUTEN
Input clock period
1000
ns
DATA1 driven after falling clock edge
DATA1 disabled after rising clock edge
DATA2 driven after rising clock edge
DATA2 disabled after falling clock edge
ns
ns
ns
ns
20
20
30
t2OUTDIS
Timing Diagram
tCLKIN
CLK
t1OUTEN
t1OUTDIS
DATA1
DATA2
t2OUTDIS
t2OUTEN
Figure 2. Pulse Density-Modulated Output Timing
Rev. 0 | Page 4 of 16
ADMP421
ABSOLUTE MAXIMUM RATINGS
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
3.6 V
Supply Voltage
Sound Pressure Level (SPL)
Mechanical Shock
Vibration
160 dB
10,000 g
Per MIL-STD-883 Method 2007,
Test Condition B
Temperature Range
−40°C to +70°C
ESD CAUTION
CRITICAL ZONE
tP
T
TO T
L
P
T
P
RAMP-UP
T
L
tL
T
SMAX
T
SMIN
tS
RAMP-DOWN
PREHEAT
t
25°C TO PEAK
TIME
Figure 3. Recommended Soldering Profile Limits
Table 4. Recommended Soldering Profile Limits
Profile Feature
Sn63/Pb37
Pb-Free
Average Ramp Rate (TL to TP)
Preheat
3°C/sec max
3°C/sec max
Minimum Temperature (TSMIN
Maximum Temperature (TSMAX
Time (TSMIN to TSMAX), tS
)
100°C
150°C
60 sec to 120 sec
3°C/sec
150°C
200°C
60 sec to 120 sec
3°C/sec
)
Ramp-Up Rate (TSMAX to TL)
Time Maintained Above Liquidous (tL)
Liquidous Temperature (TL)
60 sec to 150 sec
183°C
60 sec to 150 sec
217°C
Peak Temperature (TP)
Time Within 5°C of Actual Peak Temperature (tP)
Ramp-Down Rate
240°C + 0°C/−5°C
10 sec to 30 sec
6°C/sec max
6 minute max
260°C + 0°C/−5°C
20 sec to 40 sec
6°C/sec max
8 minute max
Time 25°C (t25°C) to Peak Temperature
Rev. 0 | Page 5 of 16
ADMP421
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
DATA
5
1
CLK
V
4
2
L/R SELECT
DD
3
GND
Figure 4. Pin Configuration (Bottom View)
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1
2
CLK
Clock Input to Microphone.
L/R SELECT Left Channel or Right Channel Select.
DATA1 (right): L/R SELECT tied to GND.
DATA2 (left): L/R SELECT pulled to VDD
.
3
4
GND
VDD
Ground.
Power Supply. For best performance and to avoid potential parasitic artifacts, placing a 0.1 μF (100 nF) ceramic type
X7R or better capacitor between Pin 4 (VDD) and ground is strongly recommended. The capacitor should be placed
as close to Pin 4 as possible.
5
DATA
Digital Output Signal (DATA1, DATA2).
Rev. 0 | Page 6 of 16
ADMP421
TYPICAL PERFORMANCE CHARACTERISTICS
–40
–50
–60
–70
–80
–90
–100
10
8
6
4
2
0
–2
–4
–6
–8
–10
200
500
1k
2k
5k
10k
20k
100
1k
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 5. Frequency Response Mask
Figure 7. Typical Power Supply Rejection Ratio vs. Frequency
10
0
–10
–20
100
1k
10k
FREQUENCY (Hz)
Figure 6. Typical Frequency Response (Measured)
Rev. 0 | Page 7 of 16
ADMP421
PCB LAND PATTERN LAYOUT
The recommended PCB land pattern for the ADMP421 should
be laid out to a 1:1 ratio to the solder pads on the microphone
package, as shown in Figure 8. Care should be taken to avoid
applying solder paste to the sound hole in the PCB. A suggested
solder paste stencil pattern layout is shown in Figure 9. The
diameter of the sound hole in the PCB should be larger than the
diameter of the sound port of the microphone. A minimum
diameter of 0.5 mm is recommended.
3.80
ø1.70
(0.30)
4× 0.40 × 0.60
0.35
0.90 (0.30)
2.80
ø1.10
(0.30)
0.70
2× R0.10
(0.30)
2.05
0.35
Figure 8. Suggested PCB Land Pattern Layout
2.45
1.498 × 0.248
0.9
0.248 × 0.948 (2×)
0.398 × 0.298 (4×)
0.7
1.45
0.248 × 1.148 (2×)
1.525
0.248 × 0.498 (2×)
1.498
1.17
0.205 WIDE
0.362 CUT (3×)
Figure 9. Suggested Solder Paste Stencil Pattern Layout
Rev. 0 | Page 8 of 16
ADMP421
EVALUATION BOARD
Figure 10 and Figure 11 show the ADMP421 evaluation board
schematic and layout, respectively. The ADMP421 evaluation
board is designed to plug directly into Connector J6 on the
Analog Devices, Inc., EVAL-ADAU1761Z.
P1
1
2
ANALOG
DEVICES
ADMP421
1
GND
U1
ADMP421
2
CLK
1
2
4
5
3
CLK
V
DD
4
C1
0.1µF
U1
5
L/R SELECT
6
DATA
LRSEL
DATA
7
C1
GND
3
8
9
10
11
12
V
DD
Figure 10. ADMP421 Evaluation Board Schematic
11 12
Figure 11. ADMP421 Evaluation Board Layout
Table 6. Evaluation Board Connector Pin Functions
Pin No.
Description
Pin No.
Description
1
GND
2
Not connected
Not connected
Not connected
Not connected
Not connected
Not connected
3
CLK
4
5
Not connected
L/R SELECT
DATA
6
7
8
9
10
12
11
VDD
Rev. 0 | Page 9 of 16
ADMP421
INTERFACING WITH ANALOG DEVICES CODECS
Analog Devices ADAU1361 and ADAU1761 codecs feature
digital microphone inputs that support the ADMP421 PDM
output data format. See the connection diagrams shown in
Figure 12 and Figure 13, and refer to the ADMP421 AN-1003
Application Note and the codecs’ respective data sheets for
more details on the digital microphone interface.
JACKDET/MICIN
R2: DIGITAL MICROPHONE/
JACK DETECTION
CONTROL
JDFUNC[1:0]
TO JACK
DETECTION
CIRCUIT
DIGITAL MICROPHONE
INTERFACE
RIGHT
ADC
LEFT RIGHT
CHANNEL CHANNEL
LEFT
ADC
R19: ADC CONTROL
INSEL
DECIMATORS
Figure 12. Digital Microphone Signal Routing Block Diagram
MICBIAS
BCLK
CLK
CM
ADMP421
DIGITAL MICROPHONE
LINP
LINN
V
DATA
DD
0.1µF
RINN
RINP
L/R SELECT
GND
BCLK
CLK
ADAU1361
OR
ADAU1761
ADMP421
DIGITAL MICROPHONE
V
DATA
DD
0.1µF
L/R SELECT
GND
JACKDET/MICIN
Figure 13. ADAU1361 and ADAU1761 Stereo Interface Block Diagram
Rev. 0 | Page 10 of 16
ADMP421
HANDLING INSTRUCTIONS
PICK AND PLACE EQUIPMENT
REFLOW SOLDER
For best results, the soldering profile should be in accordance
with the recommendations of the manufacturer of the solder
paste used to attach the MEMS microphone to the PCB. It is
recommended that the solder reflow profile not exceed the limit
conditions specified in Figure 3 and Table 4.
The MEMS microphone can be handled using standard pick-
and-place and chip shooting equipment. Care should be taken
to avoid damage to the MEMS microphone structure as follows:
Use a standard pickup tool to handle the microphone.
Because the microphone hole is on the bottom of the
package, the pickup tool can make contact with any part
of the lid surface.
BOARD WASH
When washing the PCB, ensure that water does not make
contact with the microphone port. Blow-off procedures and
ultrasonic cleaning must not be used.
Use care during pick-and-place to ensure that no high
shock events above 20 kg are experienced because such
events may cause damage to the microphone.
Do not pick up the microphone with a vacuum tool that
makes contact with the bottom side of the microphone.
Do not pull air out of or blow air into the microphone port.
Do not use excessive force to place the microphone on
the PCB.
Rev. 0 | Page 11 of 16
ADMP421
RELIABILITY SPECIFICATIONS
The microphone sensitivity after stress must deviate by no more than 3 dB from the initial value.
Table 7.
Stress Test
Description
Low Temperature Operating Life
High Temperature Operating Life
THB
−40°C, 500 hrs, powered
+125°C, 500 hrs, powered
65°C/85% relative humidity (RH), 500 hrs, powered
−40°C/+125°C, one cycle per hour, 100 cycles
150°C, 500 hrs
−40°C, 500 hrs
All pins, 0.5 kV
All pins, 1.5 kV
All pins, 0.2 kV
Temperature Cycle
High Temperature Storage
Low Temperature Storage
Component CDM ESD
Component HBM ESD
Component MM ESD
Rev. 0 | Page 12 of 16
ADMP421
OUTLINE DIMENSIONS
0.95 REF
4.10
2.05
0.70
4.00
3.90
1.70 DIA.
REFERENCE
CORNER
3.54 REF
0.40 × 0.60
(Pins 1, 2, 4, 5)
1.10 DIA.
0.25 DIA.
0.30 REF
3
1.50
1
5
2
4
0.90
2.48
REF
(THRU HOLE)
0.30 REF
3.10
3.00
2.90
R 0.10 (2 ×)
2.80
1.05 REF
TOP VIEW
0.35
0.35
0.30 REF
0.30 REF
1.10
1.00
0.90
0.72 REF
0.24 REF
3.80
BOTTOM VIEW
SIDE VIEW
Figure 14. 5-Terminal Chip Array Small Outline No Lead Cavity [LGA_CAV]
4 mm × 3 mm Body
(CE-5-1)
Dimensions shown in millimeters
2.052
8.00
2.00
1.95
1.60 MAX
1.50 NOM
0.35
0.30
0.25
A
4.001
1.85
1.75
1.65
0.20
MAX
12.30
12.00
11.70
5.552
5.50
5.45
3.40
1.50 MIN
DIA
4.16
1.30
DETAIL A
A
0.25
SECTION A-A
NOTES:
0.25
1. 10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE ± 0.20.
2. POCKET POSITION RELATIVE TO SPROCKET HOLE
MEASURED AS TRUE POSITION OF POCKET, NOT
POCKET HOLE.
0.50 R
DETAIL A
Figure 15. LGA_CAV Tape and Reel Outline Dimensions
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADMP421ACEZ-RL
ADMP421ACEZ-RL7
EVAL-ADMP421Z
Temperature Range
−40°C to +70°C
−40°C to +70°C
Package Description
Package Option
CE-5-12
CE-5-12
Ordering Quantity
5-Terminal LGA_CAV, 13”Tape and Reel
5-Terminal LGA_CAV, 7”Tape and Reel
Evaluation Board
5,000
1,000
1 Z = RoHS Compliant Part.
2 This package option is halide free.
Rev. 0 | Page 13 of 16
ADMP421
NOTES
Rev. 0 | Page 14 of 16
ADMP421
NOTES
Rev. 0 | Page 15 of 16
ADMP421
NOTES
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07596-0- /10(0)
Rev. 0 | Page 16 of 16
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