HMC8038LP4CE [ADI]
High Isolation, Silicon SPDT, Nonreflective Switch, 0.1 GHz to 6.0 GHz;
| 型号： | HMC8038LP4CE |
| 厂家： | 
ADI |
| 描述： | High Isolation, Silicon SPDT, Nonreflective Switch, 0.1 GHz to 6.0 GHz 光电二极管 |
| 文件： | 总11页 (文件大小：407K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Isolation, Silicon SPDT,
Nonreflective Switch, 0.1 GHz to 6.0 GHz
Data Sheet
HMC8038
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Nonreflective, 50 Ω design
High isolation: 60 dB typical
Low insertion loss: 0.8 dB typical
High power handling
34 dBm through path
29 dBm terminated path
HMC8038
V
1
2
RF2
12
DD
50Ω
V
11 GND
CTL
50Ω
High linearity
10
9
RFC 3
GND
RF1
0.1 dB compression (P0.1dB): 35 dBm typical
Input third-order intercept (IP3): 60 dBm typical
ESD ratings
4 kV human body model (HBM), Class 3A
1.25 kV charged device model (CDM)
Single positive supply
4
NC
PACKAGE
BASE
Figure 1.
3.3 V to 5 V
1.8 V-compatible control
All off state control
16-lead, 4 mm × 4 mm LFCSP (16 mm2)
Pin compatible with the HMC849ALP4CE
APPLICATIONS
Cellular/4G infrastructure
Wireless infrastructure
Automotive telematics
Mobile radios
Test equipment
GENERAL DESCRIPTION
The HMC8038 is a high isolation, nonreflective, 0.1 GHz to
6.0 GHz, silicon, single-pole, double-throw (SPDT) switch in a
leadless, surface-mount package. The switch is ideal for cellular
infrastructure applications, yielding up to 62 dB of isolation up to
4.0 GHz, a low 0.8 dB of insertion loss up to 4.0 GHz, and 60 dBm
of input third-order intercept. Power handling is excellent up to
6.0 GHz, and it offers an input power for an 0.1 dB compression
point (P0.1dB) of 35 dBm (VDD = 5 V). On-chip circuitry operates
a single, positive supply voltage from 3.3 V to 5 V, as well as a
single, positive voltage control from 0 V to 1.8 V/3.3 V/5.0 V at
very low dc currents. An enable input (EN) set to logic high
places the switch in an all off state, in which RFC is reflective.
The HMC8038 has ESD protection on all device pins, including
the RF interface, and can stand 4 kV HMB and 1.25 kV CDM.
The HMC8038 offers very fast switching and RF settling times of
150 ns and 170 ns, respectively. The device comes in a RoHS-
compliant, compact 4 mm × 4 mm LFCSP.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2015 Analog Devices, Inc. All rights reserved.
www.analog.com
HMC8038
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Interface Schematics .....................................................................6
Typical Performance Characteristics ..............................................7
Insertion Loss, Isolation, and Return Loss ................................7
Input Compression and Input Third-Order Intercept .............8
Theory of Operation .........................................................................9
Applications Information .............................................................. 10
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 11
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
REVISION HISTORY
11/15—Rev. 0 to Rev. A
Changes to Table 1 ............................................................................ 3
9/15—Revision 0: Initial Version
Rev. A | Page 2 of 11
Data Sheet
HMC8038
SPECIFICATIONS
VDD = 3.3 V to 5 V, VCTL = 0 V/VDD, TA = 25°C, 50 Ω system, unless otherwise noted.
Table 1.
Parameter
Test Conditions/Comments
0.1 GHz to 2.0 GHz
2.0 GHz to 4.0 GHz
4.0 GHz to 6.0 GHz
0.1 GHz to 2.0 GHz
2.0 GHz to 4.0 GHz
4.0 GHz to 6.0 GHz
Min
Typ
0.7
0.8
0.9
70
Max
1.0
1.1
Unit
dB
dB
INSERTION LOSS
1.3
dB
ISOLATION
RFC to RF1/RF2 (Worst Case)
55
50
40
dB
dB
dB
60
51
RETURN LOSS
On State
0.1 GHz to 2.0 GHz
2.0 GHz to 4.0 GHz
4.0 GHz to 6.0 GHz
0.1 GHz to 2.0 GHz
2.0 GHz to 4.0 GHz
4.0 GHz to 6.0 GHz
24
18
18
23
22
16
dB
dB
dB
dB
dB
dB
Off State
SWITCHING SPEED
tRISE, tFALL
tON, tOFF
10%/90% RFOUT
50% VCTL to 10%/90% RFOUT
50% VCTL to 0.1 dB margin of final RFOUT
60
150
170
ns
ns
ns
RF SETTLING TIME
INPUT POWER
1 dB Compression (P1dB)
VDD = 3.3 V
VDD = 5 V
VDD = 3.3 V
VDD = 5 V
34
36
33
35
60
dB
dB
dB
dB
0.1 dB Compression (P0.1dB)
INPUT THIRD-ORDER INTERCEPT (IP3)
RECOMMENDED OPERATING CONDITIONS
Bias Voltage Range (VDD)
Control Voltage Range (VCTL, EN)
Maximum RF Input Power1
TCASE = 105°C
Two-tone input power = 14 dBm/tone
dBm
3.0
0
5.4
VDD
V
V
Through Path (5 V/3.3 V)
Terminated Path
Hot Switching
Through Path (5 V/3.3 V)
Terminated Path
Hot Switching
Through Path (5 V/3.3 V)
Terminated Path
Hot Switching
Through Path (5 V/3.3 V)
Terminated Path
Hot Switching
31/30
24
24
34/33
27
27
34/33
29
27
34/33
29
27
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
°C
TCASE = 85°C
TCASE = 25°C
TCASE = −40°C
Case Temperature Range (TCASE
)
−40
+105
1 Exposure to levels between the recommended operating conditions and the absolute maximum rating conditions for extended periods may affect device reliability.
Rev. A | Page 3 of 11
HMC8038
Data Sheet
Table 2. Digital Control Voltages
State
VDD = 3.3 V ( 5% VDD, TCASE = −40°C to +105°C)
VDD = 5 V ( 5% VDD, TCASE = −40°C to +105°C)
Input Control Voltage
Low (VIL)
High (VIH)
0 V to 0.85 V at <1 µA, typical
1.15 V to 3.3 V at <1 µA, typical
0 V to 1.20 V at <1 µA, typical
1.55 V to 5.0 V at <1 µA, typical
Table 3. Bias Voltage vs. Supply Current
Parameter
SUPPLY CURRENT
VDD = 3.3 V
Symbol
Min
Typ
Max
Unit
Typical IDD (mA)
IDD
0.14
0.16
mA
mA
0.14
0.16
VDD = 5 V
Rev. A | Page 4 of 11
Data Sheet
HMC8038
ABSOLUTE MAXIMUM RATINGS
Table 4.
During the through mode of operation, the supply voltage scales
the maximum allowed input power. The power handling vs.
frequency for the 3.3 V and 5 V supplies is shown in Figure 2.
40
Parameter
Rating
Bias Voltage Range (VDD)
Control Voltage Range (VCTL, EN)
RF Input Power1 (see Figure 2)
Through Path
−0.3 V to +5.5 V
−0.5 V to VDD + (+0.5 V)
35 dBm
35
30
25
Terminated Path
Hot Switching
Channel Temperature
Storage Temperature Range
Thermal Resistance (Channel to Package
Bottom)
Through Path
Terminated Path
ESD Sensitivity
HBM
30 dBm
30 dBm
135°C
−65°C to +150°C
110°C/W
100°C/W
AMR
OPERATING 5V
OPERATING 3.3V
4 kV (Class 3A)
1.25 kV
20
0
1
2
3
4
5
6
CDM
FREQUENCY (GHz)
1 For recommended operating conditions, see Table 1.
Figure 2. Through Path, Power Handling vs. Frequency
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Rev. A | Page 5 of 11
HMC8038
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
1
2
3
4
12 RF2
11 GND
DD
HMC8038
TOP VIEW
(Not to Scale)
V
CTL
10
9
RFC
NC
GND
RF1
NOTES
1. NC = NO CONNECT. THE PINS ARE NOT CONNECTED
INTERNALLY; HOWEVER, ALL DATA SHOWN HEREIN WAS
MEASURED WITH THESE PINS CONNECTED TO RF/DC
GROUND EXTERNALLY.
2. EXPOSED PAD. EXPOSED PAD MUST BE CONNECTED TO
RF/DC GROUND.
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic Description
1
2
VDD
VCTL
Supply Voltage Pin.
Control Input Pin. See Figure 5 for the VCTL interface schematic. Refer to Table 6 and the recommended input
control voltage range in Table 2.
3
RFC
NC
RF Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
Not Internally Connected. These pins are not internally connected; however, all data shown in this data sheet is
measured with the NC pins externally connected to RF/dc ground on the evaluation board.
4, 6 to 8,
13 to 16
5
EN
Enable Input Pin. See Figure 5 for the EN interface schematic. Refer to Table 6 and the recommended input
control voltage range in Table 2.
9
RF1
RF Port 1. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
10, 11
GND
Ground. The package bottom has an exposed metal pad that must connect to the printed circuit board (PCB)
RF ground. See Figure 4 for the GND interface schematic.
12
RF2
EPAD
RF Port 2. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin.
Exposed Pad. Exposed pad must be connected to RF/dc ground.
INTERFACE SCHEMATICS
Table 6. Truth Table
GND
Control Input
Signal Path State
RFC to RF1 RFC to RF2
VCTL State
Low
EN State
Low
Figure 4. GND Interface Schematic
Off
On
Off
Off
On
Off
Off
Off
V
High
Low
High
Low
High
High
DD
V
, EN
CTL
Figure 5. Logic Control Interface Schematic
Rev. A | Page 6 of 11
Data Sheet
HMC8038
TYPICAL PERFORMANCE CHARACTERISTICS
INSERTION LOSS, ISOLATION, AND RETURN LOSS
0
0
–0.5
–1.0
–1.5
–2.0
–2.5
–0.5
–1.0
–1.5
+105°C
+85°C
+25°C
–40°C
+105°C
+85°C
+25°C
–40°C
–2.0
–2.5
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 9. Insertion Loss vs. Frequency over Temperatures, VDD = 3.3 V
Figure 6. Insertion Loss vs. Frequency over Temperatures, VDD = 5 V
0
0
RFC TO RF1 ON
RFC TO RF2 ON
RF1
RF2
ALL OFF
–10
–20
–20
–30
–40
–50
–60
–70
–80
–40
–60
–80
–100
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 10. Isolation Between RF1 and RF2 vs. Frequency at VDD = 3.3 V to 5 V
Figure 7. Isolation Between RFC and RF1/RF2 vs. Frequency at VDD = 3.3 V to 5 V
0
–5
–10
–15
–20
–25
–30
RFC
RF1, RF2 OFF
RF1, RF2 ON
–35
–40
0
1
2
3
4
5
6
7
FREQUENCY (GHz)
Figure 8. Return Loss vs. Frequency at VDD = 3.3 V to 5 V
Rev. A | Page 7 of 11
HMC8038
Data Sheet
INPUT COMPRESSION AND INPUT THIRD-ORDER INTERCEPT
40
40
38
36
34
32
30
28
26
38
36
34
32
30
28
26
+105°C
+85°C
+25°C
–40°C
+105°C
+85°C
+25°C
–40°C
0
1
2
3
4
5
6
0
1
2
3
4
5
6
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 11. Input Compression 1 dB Point vs. Frequency over Temperature,
VDD = 5 V
Figure 14. Input Compression 0.1 dB Point vs. Frequency over Temperature,
VDD = 5 V
40
38
36
34
32
40
+105°C
+85°C
+25°C
–40°C
38
36
34
32
30
28
26
30
28
26
+105°C
+85°C
+25°C
–40°C
0
1
2
3
4
5
6
0
1
2
3
4
5
6
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 12. Input Compression 1 dB Point vs. Frequency over Temperature,
VDD = 3.3 V
Figure 15. Input Compression 0.1 dB Point vs. Frequency over Temperature,
VDD = 3.3 V
65
60
55
65
60
55
50
45
50
45
+105°C
+85°C
+25°C
–40°C
+105°C
+85°C
+25°C
–40°C
0
1
2
3
4
5
6
0
1
2
3
4
5
6
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 13. Input Third-Order Intercept (IP3) Point vs. Frequency, VDD = 5 V
Figure 16. Input Third-Order Intercept (IP3) Point vs. Frequency, VDD = 3.3 V
Rev. A | Page 8 of 11
Data Sheet
HMC8038
THEORY OF OPERATION
The HMC8038 requires a single-supply voltage applied to the
With the EN pin is logic low, the HMC8038 has two operation
modes: on and off. Depending on the logic level applied to the
V
DD pin. Bypassing capacitors are recommended on the supply
line to minimize RF coupling.
VCTL pin, one RF output port (for example, RF1) is set to on
mode, by which an insertion loss path is provided from the
input to the output, as the other RF output port (for example,
RF2) is set to off mode, by which the output is isolated from the
input. When the RF output port (RF1 or RF2) is in isolation
mode, internally terminate it to 50 Ω, and the port absorbs the
applied RF signal.
The HMC8038 is controlled via two digital control voltages
applied to the VCTL pin and the EN pin. A small bypassing
capacitor is recommended on these digital signal lines to
improve the RF signal isolation.
The HMC8038 is internally matched to 50 Ω at the RF input
port (RFC) and the RF output ports (RF1 and RF2); therefore,
no external matching components are required. The RFx pins
are dc-coupled, and dc blocking capacitors are required on the
RF lines. The design is bidirectional; the input and outputs are
interchangeable.
When the EN pin is logic high, the EN pin sets the HMC8038
switch to off mode. In off mode, both output ports are isolated
from the input, and the RFC port is open reflective.
The ideal power-up sequence is as follows:
1. Power up GND.
2. Power up VDD
.
3. Power up the digital control inputs. The relative order of
the logic control inputs are not important. Powering the digital
control inputs before the VDD supply can inadvertently
forward bias and damage ESD protection structures.
4. Power up the RF input.
Table 7. Switch Operation Mode
Digital Control Inputs
Switch Mode
RFC to RF2
VEN VCTL
RFC to RF1
0
0
1
0
Off mode. The RF1 port is isolated from the RFC port and
is internally terminated to a 50 Ω load to absorb the
applied RF signals.
On mode. A low insertion loss path from the RFC
port to the RF2 port.
1
On mode. A low insertion loss path from the RFC port to
the RF1 port.
Off mode. The RF2 port is isolated from the RFC port
and is internally terminated to a 50 Ω load to absorb
the applied RF signals.
X1
All in off mode. Both the RF1 and RF2 ports are isolated from the RFC port, and the RFC port is reflective.
1 X stands for don’t care.
Rev. A | Page 9 of 11
HMC8038
Data Sheet
APPLICATIONS INFORMATION
Generate the evaluation PCB used in the application shown in
Figure 17 with proper RF circuit design techniques. Signal lines
at the RF port must have a 50 Ω impedance, and the package
ground leads and backside ground slug must connect directly to
the ground plane, as shown in Figure 18. The evaluation board
shown in Figure 18 is available from Analog Devices, Inc. upon
request.
Table 8. Bill of Materials for Evaluation Board
EV1HMC8038LP4C1
Reference Designator
Description
J1 to J3
C1 to C6
C7
R1, R2
U1
PCB2
PCB mount SMA connector
100 pF capacitor, 0402 package
0.1 μF capacitor, 0402 package
0 Ω resistor, 0402 package
HMC8038 SPDT switch
600-01267-00 evaluation PCB
1 Reference to this evaluation board number when ordering the complete
evaluation board.
2 Circuit board material: Roger 4350 or Arlon 25FR.
V
DD
C7
C4
C3
0.1µF
100pF
1
2
3
4
12
11
10
9
RF2
50Ω
50Ω
100pF
V
CTL
GND
GND
RF1
C5
100pF
C1
C2
100pF
RFC
100pF
PACKAGE
BASE
C6
100pF
EN
Figure 17. HMC8038 Application Circuit
Figure 18. EV1HMC8038LP4C Evaluation Board
Rev. A | Page 10 of 11
Data Sheet
HMC8038
OUTLINE DIMENSIONS
4.10
4.00 SQ
3.90
0.39
0.33
0.27
PIN 1
INDICATOR
(0.30)
PIN 1
INDICATOR
13
16
0.65
BSC
1
12
2.55
2.40 SQ
2.25
EXPOSED
PAD
9
4
8
5
0.70
0.60
0.50
0.20 MIN
TOP VIEW
BOTTOM VIEW
1.95 REF
1.00
0.90
0.80
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.05 MAX
0.02 NOM
COPLANARITY
0.08
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
Figure 19. 16-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm × 4 mm Body and 0.90 mm Package Height
(CP-16-40)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range MSL Rating2 Package Description
Package Option Branding3
HMC8038LP4CE
−40°C to +105°C
MSL3
16-lead Lead Frame Chip Scale Package [LFCSP] CP-16-40
8038
XXXX
8038
HMC8038LP4CETR −40°C to +105°C
EV1HMC8038LP4C −40°C to +105°C
MSL3
16-lead Lead Frame Chip Scale Package [LFCSP] CP-16-40
Evaluation Board
XXXX
1 RoHs-Compliant Part.
2 The maximum peak reflow temperature is 260°C.
3 4-digit lot number: XXXX.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13554-0-11/15(A)
Rev. A | Page 11 of 11
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