LTC3533EDE#TRPBF [ADI]
LTC3533 - 2A Wide Input Voltage Synchronous Buck-Boost DC/DC Converter; Package: DFN; Pins: 14; Temperature Range: -40°C to 85°C;
| 型号： | LTC3533EDE#TRPBF |
| 厂家： | 
ADI |
| 描述： | LTC3533 - 2A Wide Input Voltage Synchronous Buck-Boost DC/DC Converter; Package: DFN; Pins: 14; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总18页 (文件大小：569K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3533
2A Wide Input Voltage
Synchronous Buck-Boost
DC/DC Converter
Description
Features
The LTC®3533 is a wide V range, highly efficient, fixed
n
Regulated Output with Input Voltages Above,
IN
Below or Equal to the Output
frequency, buck-boost DC/DC converter that operates
from input voltages above, below or equal to the output
voltage. The topology incorporated in the IC provides a
continuoustransferfunctionthroughalloperatingmodes,
makingtheproductidealforsinglecelllithium-ion/polymer
or multi-cell alkaline/NiMH applications where the output
voltage is within the input voltage range.
n
1.8V to 5.5V (Input) and 5.25V (Output)
Voltage Range
n
0.8A Continuous Output Current: V > 1.8V
IN
n
2A Continuous Output Current: V > 3V
IN
n
Single Inductor
n
Synchronous Rectification: Up to 96% Efficiency
Programmable Burst Mode® Operation: I = 40µA
n
Q
The LTC3533 features programmable Burst Mode oper-
n
Output Disconnect in Shutdown
ation, extended V and V
ranges down to 1.8V, and
IN
OUT
n
Programmable Frequency from 300kHz to 2MHz
increased output current. Switching frequencies up to
2MHzareprogrammedwithanexternalresistor. TheBurst
Modethresholdisprogrammedwithasingleresistorfrom
the BURST pin to GND.
n
<1µA Shutdown Current
n
Small Thermally Enhanced 14-Lead (3mm × 4mm ×
0.75mm) DFN package
Otherfeaturesinclude1µAshutdowncurrent, shortcircuit
protection, programmable soft-start, current limit and
thermalshutdown.TheLTC3533ishousedinthethermally
enhanced14-lead(3mm×4mm×0.75mm)DFNpackage.
applications
n
GSM Modems
n
Handheld Instruments
n
Digital Cameras
L, LT, LTC, LTM, Linear Technology, BurstMode and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective owners.
n
Smart Phones
n
Media Players
n
Miniature Hard Disk Drive Power
typical application
2.2μH
Efficiency
100
SW1
PV
SW2
V
3.3V
1.5A
OUT
90
80
70
V
IN
PV
IN
OUT
OUT
2.4V TO 4.2V
Burst Mode
OPERATION
340k
6.49k
47pF
V
V
IN
LTC3533
RUN/SS
60
50
OFF ON
FB
V
= 2.9V
IN
330pF
107k
V
= 2.2V
IN
R
T
V
C
40
30
20
10
0
10μF
100μF
V
= 3.9V
4.7pF
IN
BURST
PGND
0.1μF
SGND
33.2k
200k
200k
0.1
1
10
100
1000
10000
3533 TA01
OUTPUT CURRENT (mA)
3533 TA01b
3533fc
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For more information www.linear.com/LTC3533
LTC3533
absolute MaxiMuM ratings
pin conFiguration
(Note 1)
TOP VIEW
V , PV Voltages...........................................–0.3 to 6V
IN
IN
R
1
2
3
4
5
6
7
14 V
C
T
V
OUT
, PV
Voltages......................................–0.3 to 6V
OUT
BURST
SGND
SW1
13 FB
SW1, SW2 Voltages
12 RUN/SS
DC...............................................................–0.3 to 6V
Pulsed < 100ns...........................................–0.3 to 7V
15
11 PV
IN
PGND
PGND
SW2
10
9
V
IN
PV
OUT
V , FB, RUN/SS, BURST Voltages..................–0.3 to 6 V
C
8
V
OUT
Operating Temperature Range (Note 2).... –40°C to 85°C
Maximum Junction Temperature (Note 3)............. 125°C
Storage Temperature Range................... –65°C to 125°C
DE PACKAGE
14-LEAD (4mm × 3mm) PLASTIC DFN
T
= 125°C, θ = 43°C/W, θ = 4.3°C/W
JMAX
JA JC
EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB
http://www.linear.com/product/LTC3533#orderinfo
orDer inForMation
LEAD FREE FINISH
LTC3533EDE#PBF
LEAD BASED FINISH
LTC3533EDE
TAPE AND REEL
LTC3533EDE#TRPBF
TAPE AND REEL
LTC3533EDE#TR
PART MARKING*
3533
PACKAGE DESCRIPTION
14-Lead (4mm × 3mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 85°C
PART MARKING*
3533
PACKAGE DESCRIPTION
TEMPERATURE RANGE
14-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available i n 500 unit reels through
designated sales channels with #TRMPBF suffix.
The l denotes the specifications which apply over the full operating
electrical characteristics
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, VOUT = 3.3V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
1.8
TYP
MAX
5.5
UNITS
V
l
l
l
Input Operating Range
Output Voltage Adjust Range
Feedback Voltage
1.8
5.25
1.244
50
V
1.196
1.22
1
V
Feedback Input Current
Quiescent Current – Burst Mode Operation
Quiescent Current – Shutdown
Quiescent Current – Active
Input Current Limit
V
FB
= 1.22V
nA
µA
µA
µA
A
V = 0V, V
C
= 0V (Note 4)
BURST
40
50
V
RUN
= 0V, Not Including Switch Leakage
0.1
700
4.5
7
1
V = 0V, BURST = 3.6V (Note 4)
C
1100
l
3.5
Peak Current Limit
A
Reverse Current Limit
0.5
0.1
0.1
60
A
NMOS Switch Leakage
PMOS Switch Leakage
NMOS Switch On Resistance
PMOS Switch On Resistance
Switches B and C
Switches A and D
Switches B and C
Switches A and D
5
µA
µA
mW
mW
10
80
3533fc
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For more information www.linear.com/LTC3533
LTC3533
electrical characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, VOUT = 3.3V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
Maximum Duty Cycle
Boost (% Switch C On)
Buck (% Switch A On)
80
100
90
%
%
l
l
Minimum Duty Cycle
Frequency Accuracy
Error Amp AVOL
0
%
MHz
dB
R = 33.2k
T
0.7
1
1.3
80
–20
250
1
Error Amp Source Current
Error Amp Sink Current
Burst Threshold
µA
µA
V
Burst Input Current
RUN/SS Threshold
V
= 5.5V, V = 5.5V
8
µA
BURST
IN
l
When IC is Enabled
When EA is at Maximum Boost Duty Cycle
0.4
0.7
1.3
1.4
V
V
RUN/SS Input Current
V
RUN
= 5.5V
0.01
1
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note2: The LTC3533EDE is guaranteed to meet performance specifications
from 0ºC to 85ºC. Specifications over the –40ºC to 85ºC operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: This IC includes over-temperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when over-temperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
Note 4: Current Measurements are performed when the outputs are not
switching.
3533fc
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For more information www.linear.com/LTC3533
LTC3533
typical perForMance characteristics
TA = 25°C, unless otherwise specified.
Quiescent Current vs VIN
Peak Current Limit vs
Burst Mode Quiescent Current
(Fixed Frequency Mode)
Temperature
5
50
45
40
35
30
25
20
15
10
5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
4
3
2.0 MHz
1.5 MHz
1.0 MHz
2
1
0
–1
–2
–3
–4
–5
0.5 MHz
NO SWITCHING
0
–55 –35 –15
5
25 45 65 85 105 125
2.5
3.0
4.0
(V)
4.5
5.0
5.5
3.5
3.0
3.5
4.5
2.5
5.0
5.5
4.0
(V)
TEMPERATURE (°C)
V
V
IN
IN
3533 G03
3530 G02
3533 G01
Automatic Burst Mode Threshold
vs RBURST
Minimum Start Voltage vs
Temperature
Average Input Current Limit vs
Temperature
1.84
1.82
5
4
200
150
100
50
3
1.80
LEAVE Burst Mode
OPERATION
2
1
1.78
1.76
1.74
1.72
0
ENTER Burst Mode
OPERATION
–1
–2
–3
–4
–5
1.70
0
–5 15 35 55
115
–45 –25
75 95
100 125
150
175
200
225
250
–55 –35 –15
5
25 45 65 85 105 125
R
BURST
(kΩ)
TEMPERATURE (°C)
TEMPERATURE (°C)
3533 G05
3533 G04
3533 G06
Frequency Change vs
Temperature
Switch Pins Before Entering
Boost Mode
Feedback Voltage vs Temperature
1.076
1.074
1.072
1.070
1.068
1.066
1.064
1.062
1.060
1.058
1.056
1.2250
1.2200
SW1
2V/DIV
SW2
2V/DIV
1.2150
1.2100
3533 G09
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
50ns/DIV
TEMPERATURE (°C)
TEMPERATURE (°C)
V
V
= 2.9V
IN
OUT
= 3.3V AT 500mA
3533 G07
3533 G08
3533fc
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For more information www.linear.com/LTC3533
LTC3533
typical perForMance characteristics
TA = 25°C, unless otherwise specified.
Switch Pins Entering Buck-Boost
Mode
Switch Pins in Buck-Boost Mode
Output Ripple at 1A Load
SW1
2V/DIV
V
IN
= 2.7V
SW1
2V/DIV
V
V
= 3.3V
= 4.2V
IN
SW2
2V/DIV
SW2
2V/DIV
IN
3533 G12
1μs/DIV
= 3.3V, 20mV/DIV
= 100μF CERAMIC
V
C
OUT
OUT
3533 G10
3533 G11
50ns/DIV
50ns/DIV
= 3.3V AT 500mA
V
V
= 3.3V
V
V
= 4.2V
IN
OUT
IN
OUT
= 3.3V AT 500mA
Load Transient Response in Fixed
Frequency Mode, No Load to 1.5A
Load Transient Response in Auto
Burst Mode, No Load to 600mA
V
V
OUT
OUT
100mV/DIV
100mV/DIV
I
L
LOAD
0.5A/DIV
0.5A/DIV
3533 G14
3533 G13
100μs/DIV
100μs/DIV
V
V
C
= 3.6V
V
V
C
= 3.6V
IN
IN
= 3.3V
= 3.3V
OUT
OUT
OUT
OUT
= 100μF X5R CERAMIC +
100μF LOW ESR TANTALUM
= 100μF X5R CERAMIC
Transition from Burst Mode
Operation to Fixed Frequency Mode
Burst Mode Operation
V
OUT
V
OUT
50mV/DIV
50mV/DIV
INDUCTOR
CURRENT
0.5A/DIV
INDUCTOR
CURRENT
0.5A/DIV
3533 G15
3533 G16
20μs/DIV
200μs/DIV
C
= 100μF CERAMIC
C
= 100μF CERAMIC
OUT
OUT
3533fc
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For more information www.linear.com/LTC3533
LTC3533
pin Functions
R (Pin 1): Programs the Frequency of the Internal Oscil-
PV
(Pin 9): Output of the Synchronous Rectifier. A
OUT
T
lator. Connect a resistor from R to ground.
filter capacitor is placed from PV
to PGND. A ceramic
T
OUT
bypass capacitor is recommended as close to the PV
and PGND pins as possible.
OUT
f(kHz) = 33,170/R (kW)
T
BURST (Pin 2): Used to set the Automatic Burst Mode
Threshold. Connect a resistor and capacitor in parallel
from this pin to ground. See the Applications Information
sectionforcomponentvalueselection.Formanualcontrol,
ground the pin to force Burst Mode operation, connect to
V (Pin 10): Input Supply Pin. Internal V for the IC.
IN
CC
PV (Pin 11): Power V Supply Pin. A 10µF ceramic
IN
IN
capacitor is recommended as close to the PV and PGND
IN
pins as possible.
V to force fixed frequency PWM mode.
IN
RUN/SS(Pin12):CombinedEnableandSoft-Start.Applied
voltage <0.4V shuts down the IC. Tie to >1.4V to enable
the IC and >1.6V to ensure the error amp is not clamped
fromsoft-start.AnRCfromtheshutdowncommandsignal
to this pin will provide a soft-start function by limiting the
SGND (Pin 3): Signal ground for the IC.
SW1 (Pin 4): Switch Pin where Internal Switches A and B
are Connected. Connect inductor from SW1 to SW2. An
optional Schottky diode can be connected from SW1 to
ground for a moderate efficiency improvement. Minimize
trace length to reduce EMI.
rise time of V
C
FB (Pin 13): Feedback Pin. Connect resistor divider tap
here. The output voltage can be adjusted from 1.8V to
5.25V. The feedback reference voltage is typically 1.22V.
PGND1,PGND2(Pins5,6):PowerGroundfortheInternal
NMOS Power Switches.
R1+R2
SW2 (Pin 7): Switch Pin where Internal Switches C and
VOUT =1.22•
D are Connected. An optional Schottky diode can be
R2
connected from SW2 to V
for a moderate efficiency
OUT
V (Pin 14): Error Amp Output. An R-C network is con-
C
improvement. For applications with output voltages over
4.3V, this Schottky diode is required to ensure the SW2
pin does not exhibit excess voltage. Minimize trace length
to reduce EMI.
nected from this pin to FB for loop compensation. Refer
to “Closing the Feedback Loop” section for component
selection guidelines. During Burst Mode operation, V is
C
internally connected to a hold circuit.
V
(Pin 8): Voltage Sensing Pin for PV
and Input
OUT
OUT
OUT
ExposedPad(Pin15):ICSubstrateGround.Thispinmust
be soldered to the PCB ground to provide both electrical
contact and a good thermal contact to the PCB.
SupplyPinforInternalCircuitryPoweredbyPV . Afilter
capacitor is placed from V
capacitor is recommended as close to the V
pins as possible.
to GND. A ceramic bypass
OUT
and GND
OUT
3533fc
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For more information www.linear.com/LTC3533
LTC3533
block DiagraM
SW1
SW2
V
IN
1.8V TO 5.5V
V
SW D
OUT
SW A
GATE
DRIVERS
AND
ANTI-CROSS
CONDUCTION
–0.5A
SW B
SW C
–
+
I
REVERSE
CURRENT
LIMIT
SENSE
AMP
R1
+
SUPPLY
CURRENT
LIMIT
1.22V
+
–
ERROR
AMP
+
–
+
–
FB
4.5A
1.6V
CLAMP
V
C
PWM
COMPARATORS
PWM
LOGIC
UVLO
AND
+
–
+
–
OUTPUT
PHASING
R
R
T
T
R2
OSC
BURST MODE
OPERATION
CONTROL
SLEEP
R
SS
BURST
RUN/SS
V
RUN
IN
0 = BURST MODE
1 = FIXED FREQUENCY
GND
C
SS
3533 BD
3533fc
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For more information www.linear.com/LTC3533
LTC3533
operation
The LTC3533 provides high efficiency, low noise power
for a wide variety of handheld electronic devices. The LTC
proprietary topology allows input voltages above, below
or equal to the output voltage by properly phasing the
The first circuit is a current limit amplifier, sourcing cur-
rent into FB to drop the output voltage, should the peak
input current exceed 4.5A typical. This method provides a
closed loop means of clamping the input current. During
output switches. The error amplifier output voltage on V
conditions where V
is near ground, such as during a
C
OUT
determines the output duty cycle of the switches. Since
short circuit or startup, this threshold is cut to 750mA,
providing a fold-back feature. For this current limit feature
to be most effective, the Thevenin resistance from FB to
ground should be greater than 100k.
V is a filtered signal, it provides rejection of frequencies
C
well below the switching frequency. The low R
, low
DS(ON)
gatechargesynchronousswitchesprovidehighfrequency
pulse width modulation control at high efficiency. High
efficiency is achieved at light loads when Burst Mode
operation is entered and the LTC3533’s quiescent current
drops to a low 40µA.
Shouldthepeakinputcurrentexceed7Atypical,thesecond
circuit, a high speed peak current limit comparator, shuts
off PMOS switch A. The delay to output of this comparator
is typically 50ns.
LOW NOISE FIXED FREQUENCY OPERATION
Reverse Current Limit
Oscillator
Duringfixedfrequencyoperation,theLTC3533operatesin
forced continuous conduction mode. The reverse current
limit comparator monitors the inductor current from the
output through switch D. Should this negative inductor
current exceed 500mA typical, the LTC3533 shuts off
switch D.
The frequency of operation is programmed by an external
resistor from R to ground, according to the following
T
equation:
f(kHz) = 33,170/R (k)
T
Error Amplifier
Four-Switch Control
The error amplifier is a voltage mode amplifier. The loop
compensation components are configured around the
Figure 1 shows a simplified diagram of how the four in-
ternal switches are connected to the inductor, V , V
IN OUT
amplifier(fromFBtoV )toobtainstabilityoftheconverter.
and GND.Figure 2 shows the regions of operation for the
LTC3533 as a function of the control voltage, V .
C
For improved bandwidth, an additional RC feed-forward
network can be placed across the upper feedback divider
resistor. The voltage on the RUN/SS pin clamps the error
C
Dependent on V ’s magnitude, the LTC3533 will operate
C
in either buck, buck/boost or boost mode. The four
power switches are properly phased so the transfer
between operating modes is continuous, smooth and
amplifier output, V , to provide a soft-start function.
C
Supply Current Limits
transparent to the user. When V approaches V
the
IN
OUT
There are two different supply current limit circuits in the
LTC3533, working consecutively, each having internally
buck/boost region is entered, where the conduction time
of the four switch region is typically 150ns. Referring
to Figures 1 and 2, the various regions of operation will
now be described.
fixed thresholds which vary inversely with V .
IN
3533fc
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For more information www.linear.com/LTC3533
LTC3533
operation
PV
IN
PV
OUT
where D4 = duty cycle % of the four switch range.
SW
11
9
D4 = (150ns • f) • 100 %
SW
PMOS A
PMOS D
NMOS C
where f = operating frequency, Hz.
SW1
3
SW2
7
L1
Beyond this point the “four switch,” or buck/boost region
is reached.
NMOS B
3533 F01
Buck/Boost or Four Switch (V ~ V
)
IN
OUT
When the control voltage, V , is above voltage V2, switch
Figure 1. Simplified Diagram of Output Switches
C
pair AD remain on for duty cycle D
, and switch
MAX_BUCK
pair AC begins to phase in. As switch pair AC phases in,
switch pair BD phases out accordingly. When V reaches
C
85%
D
the edge of the buck/boost range, at voltage V3, the AC
MAX
BOOST
V4 (≈1.5V)
switchpaircompletelyphaseouttheBDpair,andtheboost
A ON, B OFF
PWM CD SWITCHES
BOOST REGION
phase begins at duty cycle D4 . The input voltage, V ,
SW
IN
D
MIN
V3 (≈1.15V)
V2 (≈1V)
BOOST
where the four switch region begins is given by:
BUCK/BOOST REGION
FOUR SWITCH PWM
D
MAX
BUCK
V = V (1 – D) = V (1 – 150ns • f) V
IN
OUT
OUT
D ON, C OFF
PWM AB SWITCHES
BUCK REGION
The point at which the four switch region ends is given by:
V1 (≈0.7V)
0%
VOUT
V =
V
DUTY
CONTROL
IN
3533 F02
CYCLE
VOLTAGE, V
1−(150ns • f)
where f = operating frequency, Hz.
Boost Region (V < V
C
Figure 2. Switch Control vs Control Voltage, VC
)
OUT
IN
Buck Region (V > V
)
IN
OUT
Switch A is always on and switch B is always off during
Switch D is always on and switch C is always off during
this mode. When the control voltage, V , is above voltage
C
this mode. When the control voltage, V , is above voltage
C
V3, switch pair CD will alternately switch to provide a
boosted output voltage. This operation is typical to a
synchronous boost regulator. The maximum duty cycle
of the converter is limited to 90% typical and is reached
V1,switchAbeginstoswitch.Duringtheofftimeofswitch
A, synchronous switch B turns on for the remainder of
the period. Switches A and B will alternate similar to a
typical synchronous buck regulator. As the control voltage
increases, the duty cycle of switch A increases until the
maximumdutycycleoftheconverterinbuckmodereaches
when V is above V4.
C
D
, given by:
MAX_BUCK
D
= 100 – D4
%
MAX_BUCK
SW
3533fc
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For more information www.linear.com/LTC3533
LTC3533
operation
BURST MODE OPERATION
Programmable Automatic Burst Mode Operation
Burst Mode operation reduces the LTC3533’s quiescent
current consumption at light loads and improves overall
conversionefficiency, increasingbatterylife. DuringBurst
Mode operation the LTC3533 delivers energy to the out-
put until it is regulated and then goes into a sleep mode
where the outputs are off and the quiescent current drops
to 40µA. In this mode the output ripple has a variable
frequency component that depends upon load current,
and will typically be about 2% peak-to-peak. Burst Mode
operation ripple can be reduced slightly by using more
output capacitance. Another method of reducing Burst
Mode operation ripple is to place a small feed-forward
Burst Mode operation can be automatic or digitally con-
trolled with a single pin. In automatic mode, the LTC3533
entersBurstModeoperationattheprogrammedthreshold
and returns to fixed frequency operation when the load
demand increases. The load current at which the mode
transition occurs is programmed using a single external
resistorfromBURSTtoground,accordingtothefollowing
equations:
17
Enter Burst Mode Operation: IBURST
Exit Burst Mode Operation: IBURST
=
RBURST
19
RBURST
=
capacitor across the upper resistor in the V
feedback
OUT
divider network (as in Type III compensation).
Where R
is in kW and I
BURST
is the load transition
BURST
During the period where the device is delivering energy
to the output, the peak switch current will rise to 900mA
typical and the inductor current will terminate at zero
current for each cycle. In this mode, the typical maximum
average output currents are given by:
current in Amps. Do not use values of R
greater
BURST
than 250kW.
For automatic operation a filter capacitor must also be
connected from BURST to ground. The equation for the
minimum capacitor value is:
I
I
≈ 450mA; V
< V
MAX(BURST)BUCK
OUT IN
≈ 450mA • (V /V ); V
> V
IN
COUT • VOUT
MAX(BURST)BOOST
IN OUT
OUT
CBURST(MIN)
where C
≥
60,000
I
≈700mA;V ≈V ,sincetheinput
OUT IN
MAX(BURST)BUCK-BOOST
and output are connected together for most of the cycle.
and C
are in µF.
BURST(MIN)
OUT
The efficiency below 1mA becomes dominated primarily
by the quiescent current. The Burst Mode operation effi-
ciency is given by:
In the event that a load transient causes FB to drop by
more than 4% from the regulation value while in Burst
Mode operation, the LTC3533 will immediately switch
to fixed frequency mode and an internal pull-up will be
η•ILOAD
Efficiency ≅
momentarily applied to BURST, rapidly charging C
.
BURST
40µA +ILOAD
This prevents the IC from immediately re-entering Burst
mode operation once the output achieves regulation.
where h is typically 90% during Burst Mode operation
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For more information www.linear.com/LTC3533
LTC3533
operation
Manual Burst Mode Operation
incorporates an active clamp circuit that holds the voltage
on V at an optimal voltage during Burst Mode operation.
C
For manual control of Burst Mode operation, the RC
network connected to BURST can be eliminated. To force
fixed frequency mode, BURST should be connected to
This minimizes any output transient when returning to
fixed frequency mode operation. For optimum transient
response, Type 3 compensation is also recommended
to broad band the control loop and roll off past the two
pole response of the output LC filter. (See Closing the
Feedback Loop).
V . To force Burst Mode operation, BURST should be
IN
grounded. When commanding Burst Mode operation
manually, the circuit connected to BURST should be able
to sink up to 2mA.
Foroptimumtransientresponsewithlargedynamicloads,
the operating mode should be controlled digitally by the
host. By commanding fixed frequency operation prior to a
sudden increase in load, output voltage droop can be min-
imized. Note that if the load current applied during forced
Burst Mode operation (BURST pin is grounded) exceeds
the current that can be supplied, the output voltage will
starttodroopandtheLTC3533willautomaticallycomeout
of Burst Mode operation and enter fixed frequency mode,
Soft-Start
The soft-start function is combined with shutdown. When
the RUN/SS pin is brought above 1V typical, the LTC3533
is enabled but the error amplifier duty cycle is clamped
from V . A detailed diagram of this function is shown in
C
Figure 3. The components R and C provide a slow
SS
SS
rampingvoltageonRUN/SStoprovideasoft-startfunction.
To ensure that V is not being clamped, RUN/SS must be
C
raised above 1.6V.
raising V . Once regulation is achieved, the LTC3533
OUT
V
IN
will then enter Burst Mode operation once again (since the
user is still commanding this by grounding BURST), and
the cycle will repeat, resulting in about 4% output ripple.
RUN/SS
V
C
Burst Mode Operation to Fixed Frequency Transient
Response
In Burst Mode operation, the compensation network is
3533 F03
not used and V is disconnected from the error amplifier.
C
During long periods of Burst Mode operation, leakage
currents in the external components or on the PC board
could cause the compensation capacitor to charge (or
discharge), which could result in a large output transient
whenreturningtofixedfrequencymodeofoperation,even
at the same load current. To prevent this, the LTC3533
Figure 3.
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For more information www.linear.com/LTC3533
LTC3533
applications inForMation
COMPONENT SELECTION
where f = switching frequency, Hz
∆I = maximum allowable inductor ripple current
L
1
2
3
4
5
6
7
R
14
13
12
11
10
9
V
T
C
V
V
V
= minimum input voltage
= maximum input voltage
IN(MIN)
IN(MAX)
BURST
SGND
SW1
FB
RUN/SS
= output voltage
OUT
For high efficiency, choose a ferrite inductor with a high
frequency core material to reduce core losses. The induc-
tor should have low ESR (equivalent series resistance) to
PV
IN
V
IN
V
V
PGND
PGND
SW2
IN
2
reduce the I R losses, and must be able to handle the peak
PV
V
OUT
OUT
inductorcurrentwithoutsaturating.Moldedchokesorchip
inductors usually do not have enough core to support the
peak inductor currents in the 4A to 6A region. To minimize
radiated noise, use a shielded inductor. See Table 1 for a
suggested list of inductor suppliers.
OUT
8
GND
MULTIPLE VIAS
3533 F04
Figure 4. Recommended Component Placement. Traces Carrying
High Current Should be Short and Wide. Trace Area at FB and VC
Pins are Kept Low. Lead Length to Battery Should be Kept Short.
PVOUT and PVIN Ceramic Capacitors Close to the IC Pins.
Output Capacitor Selection
The bulk value of the output filter capacitor is set to reduce
the ripple due to charge into the capacitor each cycle. The
steady state ripple due to charge is given by:
Inductor Selection
The high frequency operation of the LTC3533 allows the
use of small surface mount inductors. The inductor ripple
current is typically set to 20% to 40% of the maximum
inductor current. For a given ripple the inductance terms
are given as follows:
IOUT(MAX) •(VOUT − VIN(MIN))•100
%Ripple_Boost =
%Ripple_Buck =
%
COUT • VOUT2 • f
(VIN(MAX) − VOUT)•100
%
8L COUT • VIN(MAX) • f2
V
IN(MIN) •(VOUT − V
)
IN(MIN)
LBOOST
>
H
where C
= output filter capacitor
OUT
f • ΔIL • VOUT
OUT •(VIN(MAX) − VOUT
I
= maximum output load current
OUT(MAX)
V
)
LBUCK
>
H
The output capacitance is usually many times larger than
theminimumvalueinordertohandlethetransientresponse
f • ΔIL • V
IN(MAX)
Table 1. Inductor Vendor Information
SUPPLIER
Coilcraft
PHONE
FAX
WEB SITE
(847) 639-6400
(800) 227-7040
(847) 639-1469
(650) 361-2508
(814) 238-0409
www.coilcraft.com
CoEv Magnetics
Murata
www.circuitprotection.com/magnetics.asp
www.murata.com
(814) 237-1431
(800) 831-9172
Sumida
USA: (847) 956-0666
Japan: 81(3) 3607-5111
USA: (847) 956-0702
Japan: 81(3) 3607-5144
www.sumida.com
TDK
(847) 803-6100
(847) 297-0070
(847) 803-6296
(847) 699-7864
www.component.tdk.com
www.tokoam.com
TOKO
3533fc
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For more information www.linear.com/LTC3533
LTC3533
applications inForMation
requirements of the converter. As a rule of thumb, the ratio
of the operating frequency to the unity-gain bandwidth of
the converter is the amount the output capacitance will
have to increase from the above calculations in order to
maintain the desired transient response.
to provide the conduction path to the output. Note that
BurstModeoperationisinhibitedatoutputvoltagesbelow
1V typical.
Output Voltage > 4.3V
A Schottky diode from SW2 to V
is required for output
The other component of ripple is due to the ESR (equiv-
alent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple.Forsurfacemountapplications,TaiyoYudenorTDK
ceramic capacitors, AVX TPS series tantalum capacitors
or Sanyo POSCAP are recommended. See Table 2 for
contact information.
OUT
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage
on SW2 due to parasitic lead and trace inductances.
Input Voltage > 4.5V
For applications with input voltages above 4.5V which
could exhibit an overload or short-circuit condition, a
2W/1nF series snubber is required between SW1 and
Input Capacitor Selection
GND. A Schottky diode from SW1 to PV should also be
Since PV is the supply voltage for the IC it is recom-
IN
IN
added as close to the pins as possible. For the higher input
mended to place at least a 4.7µF, low ESR ceramic bypass
voltages,V bypassingbecomesmorecritical.Therefore,
capacitor close to PV and GND. It is also important to
IN
IN
a ceramic bypass capacitor as close to the PV and GND
minimize any stray resistance from the converter to the
IN
pins as possible is also required.
battery or other power source.
Operating Frequency Selection
Optional Schottky Diodes
Higher operating frequencies allow the use of a smaller
inductor and smaller input and output filter capacitors,
thus reducing board area and component height. How-
ever, higher operating frequencies also increase the IC’s
total quiescent current due to the gate charge of the four
switches, as given by:
Schottky diodes across the synchronous switches B and
D are not required, but do provide a lower drop during the
break-before-make time (typically 15ns), thus improving
efficiency. Use a surface mount Schottky diode such as an
MBRM120T3 or equivalent. Do not use ordinary rectifier
diodes since their slow recovery times will compromise
efficiency.
Buck:
I = (600e – 12 • V • f ) mA
Q IN
Boost:
I = [800e – 12 • (V + V ) • f ] mA
Q IN OUT
Output Voltage < 1.8V
Buck/Boost: I = [(1400e – 12 • V + 400e – 12 •
The LTC3533 can operate as a buck converter with output
voltages as low as 400mV. The part is specified at 1.8V
minimum to allow operation without the requirement of a
Schottky diode; Since synchronous switch D is powered
Q
IN
V
) • f ] mA
OUT
where f = switching frequency in Hz. Therefore frequency
selection is a compromise between the optimal efficiency
and the smallest solution size.
from PV , and the R
will increase at low output
OUT
DS(ON)
voltages, a Schottky diode is required from SW2 to V
OUT
Table 2. Capacitor Vendor Information
SUPPLIER
AVX
PHONE
FAX
WEB SITE
(803) 448-9411
(619) 661-6322
(408) 573-4150
(847) 803-6100
(803) 448-1943
(619) 661-1055
(408) 573-4159
(847) 803-6296
www.avxcorp.com
www.sanyovideo.com
www.t-yuden.com
www.component.tdk.com
Sanyo
Taiyo Yuden
TDK
3533fc
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For more information www.linear.com/LTC3533
LTC3533
applications inForMation
Closing the Feedback Loop
to stabilize the loop, but at a cost of reduced bandwidth
and slower transient response. To ensure proper phase
margin using Type I compensation, the loop must be
crossedoveradecadebeforetheLCdoublepole.Referring
to Figure 5, the unity-gain frequency of the error amplifier
with the Type I compensation is given by:
TheLTC3533incorporatesvoltagemodePWMcontrol.The
control to output gain varies with operation region (buck,
boost, buck/boost), but is usually no greater than 15. The
output filter exhibits a double pole response, as given by:
1
f FILTER_POLE
=
Hz
1
f UG
=
Hz
2• π • L •COUT
2• π •R1•CP1
(in buckm ode)
f FILTER_POLE
Mostapplicationsdemandanimprovedtransientresponse
toallowasmalleroutputfiltercapacitor.Toachieveahigher
bandwidth, Type III compensation is required, providing
two zeros to compensate for the double-pole response of
the output filter. Referring to Figure 6, the location of the
poles and zeros are given by:
V
IN
=
Hz
2• VOUT • π • L •COUT
(in boostm ode)
where L is in Henries and C
is in Farads.
OUT
The output filter zero is given by:
1
f POLE1
=
Hz
2• π •10e3 •R1•CP1
1
f FILTER_ZERO
=
Hz
2• π •RESR •COUT
(which is a very low frequency)
1
where R
is the equivalent series resistance of the
ESR
f ZERO1
f ZERO2
f POLE2
=
=
=
Hz
Hz
Hz
2• π •RZ •CP1
output capacitor.
1
Atroublesomefeatureinboostmodeistheright-halfplane
zero (RHP), given by:
2• π •R1•CZ1
1
2• π •RZ •CP2
2
V
IN
f RHPZ
=
Hz
2• π •IOUT •L • VOUT
where resistance is in Ohms and capacitance is in Farads.
The loop gain is typically rolled off before the RHP zero
frequency.
AsimpleTypeIcompensationnetworkcanbeincorporated
V
OUT
1.22V
+
–
C
R1
Z1
V
OUT
ERROR
AMP
FB
12
1.22V
+
–
ERROR
AMP
R1
FB
12
C
R2
P1
V
C
R
Z
11
C
R2
P1
C
V
C
P2
11
3533 F06
3533 F05
Figure 5. Error Amplifier with Type I Compensation
Figure 6. Error Amplifier with Type III Compensation
3533fc
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For more information www.linear.com/LTC3533
LTC3533
typical applications
High Efficiency, High Current LED Driver
3.3μH
4
7
SW1
SW2
11
10
9
8
V
IN
PV
PV
OUT
OUT
IN
3V TO 4.2V
ILED = 1A
V
V
IN
4.7μF
LTC3533
RUN/SS
12
1
13
OFF ON
FB
1nF
14
2
10μF
R
V
C
T
100k
100k
BURST
SGND PGND
47pF
44.2k
95.3k
301k
3
5
6
3533 TA02
3533fc
15
For more information www.linear.com/LTC3533
LTC3533
package Description
Please refer to http://www.linear.com/product/LTC3533#packaging for the most recent package drawings.
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 ±0.05
3.30 ±0.05
1.70 ±0.05
3.60 ±0.05
2.20 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
0.40 ±0.10
4.00 ±0.10
(2 SIDES)
8
14
R = 0.05
TYP
3.30 ±0.10
3.00 ±0.10
(2 SIDES)
1.70 ±0.10
PIN 1 NOTCH
R = 0.20 OR
PIN 1
TOP MARK
(SEE NOTE 6)
0.35 × 45°
CHAMFER
(DE14) DFN 0806 REV B
7
1
0.25 ±0.05
0.75 ±0.05
0.200 REF
0.50 BSC
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3533fc
16
For more information www.linear.com/LTC3533
LTC3533
revision history (Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
01/16 Corrected part number in Order Information
Modified Burst Mode Operation
2
10
18
2
Moved application circuit to back page
C
08/16 Corrected part number in Order Information
3533fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However,noresponsibilityisassumedforitsuse.LinearTechnologyCorporationmakesnorepresentation
that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTC3533
typical application
1MHz Li-Ion to 3.6V at 2A, Pulsed, with Manual Mode Control
6.8μH
4
7
SW1
SW2
11
10
9
8
V
V
OUT
IN
PV
PV
IN
OUT
OUT
3V TO 4.2V
3.6V AT 2A
388k
2.2k
220pF
V
V
IN
LTC3533
12
1
13
OFF ON
RUN/SS
FB
470pF
15k
14
2
BURST
10μF
200μF
R
T
V
C
BURST
SGND PGND
FIXED
FREQUENCY
64.9k
200k
3
5
6
3533 TA03
relateD parts
PART NUMBER
DESCRIPTION
COMMENTS
LTC3113
3A Low Noise Buck-Boost DC/DC Converter
V : 1.8V to 5.5V, V : 1.8V to 5.5V, I = 300µA,
SD
IN
OUT
Q
I
< 1µA, 20-Pin TSSOP Package, 4mm × 5mm DFN
LTC3127
1A Buck-Boost DC/DC Converter with Programmable Input Current
Limit
V : 1.8V to 5.5V, V : 1.8V to 5.25V, I = 35µA,
SD
IN
OUT
Q
I
< 4mA, 12-Pin MSOP Package, 3mm × 3mm DFN
LTC3401/LT3402
LTC3411
1A/2A (I ), 3MHz Synchronous Step-Up DC/DC Converter
V : 0.5V to 5V, V
SD
= 6V, I = 38mA,
OUT(MAX) Q
SW
IN
I
< 1µA, MS Package
1.25A (I ), 4MHz Synchronous Step-Up DC/DC Converter
V : 2.5V to 5.5V, V
= 0.8V, I = 60µA,
Q
OUT
IN
SD
OUT(MIN)
OUT(MIN)
I
≤ 1µA, MS Package
LTC3412
2.5A (I ), 4MHz Synchronous Step-Up DC/DC Converter
V : 2.5V to 5.5V, V
= 0.8V, I = 60µA,
Q
OUT
IN
SD
I
≤ 1µA, TSSOP16E Package
LTC3421
3A (I ), 3MHz Synchronous Step-Up DC/DC Converter
V : 0.5V to 4.5V, V
SD
= 5.25V, I = 12µA,
Q
SW
IN
OUT(MAX)
OUT(MAX)
I
< 1µA, QFN Package
LTC3440
600mA (I ), 2MHz Synchronous Buck-Boost DC/DC Converter
V : 2.5V to 5.5V, V
: 2.5V to 5.5V, I = 25µA,
Q
OUT
IN
SD
I
< 1µA, MS, DFN Package
LTC3441
1.2A (I ), 1MHz Synchronous Buck-Boost DC/DC Converter
V : 2.5V to 5.5V, V
SD
: 2.4V to 5.5V, I = 25µA,
OUT(MAX) Q
OUT
IN
I
< 1µA, DFN Package
LTC3442/LTC3443 1.2A (I ), Synchronous Buck-Boost DC/DC Converters,
V : 2.4V to 5.5V, V
SD
: 2.4V to 5.25V, I = 28µA,
OUT(MAX) Q
OUT
IN
LTC3442 (1MHz), LTC3443 (600kHz)
I
< 1µA, DFN Package
LTC3444
LTC3530
LTC3532
LTC3536
500mA (I ), Synchronous Buck-Boost DC/DC Converter
V : 2.7V to 5.5V, V
= 0.5V to 5V, DFN Package,
OUT
OUT
IN
Internal Compensation
600mA (I ), 2MHz Synchronous Buck-Boost DC/DC Converter
V : 1.8V to 5.5V, V : 1.8V to 5.25V, I = 40µA,
OUT
IN
SD
OUT
Q
I
< 1µA, 10-Pin MSOP Package, 3mm × 3mm DFN
500mA (I ), 2MHz Synchronous Buck-Boost DC/DC Converter
V : 2.4V to 5.5V, V : 2.4V to 5.5V, I = 35µA,
OUT
IN
SD
OUT
Q
I
< 1µA, 10-Pin MSOP Package, 3mm × 3mm DFN
1A (I ) Low Noise Buck-Boost DC/DC Converter
V : 1.8V to 5.5V, V : 1.8V to 5.5V, I = 32µA,
OUT
IN
SD
OUT
Q
I
< 1µA, 12-Pin MSOP Package, 3mm × 3mm DFN
Thin SOT is a trademark of Linear Technology Corporation.
3533fc
LT 0816 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
18
●
●
LINEAR TECHNOLOGY CORPORATION 2007
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3533
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