OP193FSZ-REEL [ADI]
Precision, Micropower Single Operational Amplifier;型号: | OP193FSZ-REEL |
厂家: | ADI |
描述: | Precision, Micropower Single Operational Amplifier 放大器 光电二极管 |
文件: | 总20页 (文件大小:389K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Precision, Micropower
Operational Amplifiers
Data Sheet
OP193/OP293
FEATURES
PIN CONFIGURATIONS
Operates from +1.7 V to 18 V
Low supply current: 15 µA/amplifier
Low offset voltage: 100 µV maximum
Outputs sink and source: 8 mA
No phase reversal
NULL
–IN A
+IN A
V–
1
2
3
4
8
7
6
5
NC
OP193
V+
OUT A
NULL
TOP VIEW
(Not to Scale)
NC = NO CONNECT
Single- or dual-supply operation
High open-loop gain: 600 V/mV
Unity-gain stable
Figure 1. 8-Lead SOIC_N
(S Suffix)
APPLICATIONS
OUT A
–IN A
+IN A
V–
1
2
3
4
8
7
6
5
V+
Digital scales
Strain gages
Portable medical equipment
Battery-powered instrumentation
Temperature transducer amplifier
OP293
OUT B
–IN B
+IN B
TOP VIEW
(Not to Scale)
Figure 2. 8-Lead SOIC_N
(S Suffix)
GENERAL DESCRIPTION
The OP193/OP293 are single-supply operational amplifiers that
feature a combination of high precision, low supply current, and
the ability to operate at low voltages. For high performance in
single-supply systems, the input and output ranges include
ground, and the outputs swing from the negative rail to within
600 mV of the positive supply. For low voltage operation, the
OP193/OP293 can operate down to +1.7 V or 0.85 V.
The combination of high accuracy and low power operation
make the OP193/OP293 useful for battery-powered equipment.
The part’s low current drain and low voltage operation allow it
to continue performing long after other amplifiers have ceased
functioning either because of battery drain or headroom.
The OP193/OP293 are specified for single +2 V through dual
15 V operation over the extended (−40°C to +125°C) temperature
range. They are available in SOIC surface-mount packages.
Rev. D
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Tel: 781.329.4700 ©1995–2015 Analog Devices, Inc. All rights reserved.
Technical Support
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OP193/OP293
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Input Overvoltage Protection................................................... 14
Output Phase Reversal—OP193............................................... 14
Output Phase Reversal—OP293............................................... 14
Battery-Powered Applications.................................................. 14
A Micropower False-Ground Generator................................. 15
A Battery-Powered Voltage Reference..................................... 15
A Single-Supply Current Monitor............................................ 15
A Single-Supply Instrumentation Amplifier .......................... 16
A Low Power, Temperature to 4 mA to 20 mA Transmitter...16
A Micropower Voltage Controlled Oscillator ........................ 17
Outline Dimensions....................................................................... 18
Ordering Guide .......................................................................... 18
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Specifications............................................................... 3
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution.................................................................................. 8
Typical Performance Characteristics ............................................. 9
Functional Description.................................................................. 13
Driving Capacitive Loads.......................................................... 13
REVISION HISTORY
1/15—Rev. C to Rev. D
Changes to Figure 3 to Figure 6.......................................................9
Changes to Figure 10 and Figure 12............................................. 10
Changes to Functional Description Section and Figure 26 ...... 13
Deleted A Micropower, Single-Supply Quad Voltage Output
8-Bit DAC Section.......................................................................... 13
Deleted Figure 13; Renumbered Sequentially ............................ 14
Deleted A Single-Supply Micropower Quad Programmable-
Gain Amplifier Section.................................................................. 14
Changes to Output Phase Reversal—OP293 Section, Battery-
Powered Applications Section, and Figure 27 ............................ 14
Deleted Figure 14............................................................................ 15
Changes to Figure 31, A Single-Supply Current Monitor
Section, and Figure 32.................................................................... 15
Changes to A Low Power, Temperature to 4 mA to 20 mA
Transmitter Section and Figure 35............................................... 16
Updated Outline Dimensions....................................................... 18
Changes to Ordering Guide.......................................................... 18
Changed Minimum Output Voltage Swing High Parameter
from 4.0 V to 3.9 V; Table 2............................................................. 4
Changes to Ordering Guide .......................................................... 18
9/09—Rev. B to Rev. C
Updated Format..................................................................Universal
Deleted OP493 ....................................................................Universal
Changes to Features and General Description Sections.............. 1
Deleted 8-Lead Epoxy DIP Pin Configurations for OP193 and
OP293, and 14-Lead Epoxy DIP and 16-Lead Wide Body SOL
Pin Configurations for OP493........................................................ 1
Changes to Offset Voltage Parameter and Large Signal Voltage
Gain, RL = 100 kΩ, −10 V ≤ VOUT ≤ +10 V Parameter, and
Power Supply Rejection Ratio Parameter, Table 1........................ 3
Changes to Offset Voltage Parameter and Power Supply
Rejection Ratio Parameter, Table 2 ................................................ 4
Changes to Offset Voltage Parameter and Power Supply
Rejection Ratio Parameter, Table 3 ................................................ 6
Changes to Offset Voltage Parameter and Power Supply
Rejection Ratio Parameter, Table 4 ................................................ 7
Changes to Table 5 and Table 6....................................................... 8
1/02—Rev. A to Rev. B
Deletion of Wafer Test Limits Table................................................5
Deletion of Dice Characteristics Images ........................................6
Edits to Ordering Guide ...................................................................6
Rev. D | Page 2 of 20
Data Sheet
OP193/OP293
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
VS = 15.0 V, TA = 25°C, unless otherwise noted.
Table 1.
E Grade
Typ
F Grade
Typ
Parameter
Symbol Conditions
Min
Max
Min
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
OP193
150
250
250
350
20
μV
μV
μV
μV
nA
nA
V
OP193, −40°C ≤ TA ≤ +125°C
OP293
OP293, −40°C ≤ TA ≤ +125°C
VCM = 0 V, −40°C ≤ TA ≤ +125°C
VCM = 0 V, −40°C ≤ TA ≤ +125°C
100
200
15
Input Bias Current
IB
IOS
VCM
CMRR
Input Offset Current
Input Voltage Range
Common-Mode Rejection
2
4
−14.9
100
97
+13.5 −14.9
+13.5
−14.9 V ≤ VCM ≤ +14 V
−14.9 V ≤ VCM ≤ +14 V,
−40°C ≤ TA ≤ +125°C
116
97
94
116
dB
dB
Large Signal Voltage Gain
Large Signal Voltage Gain
Large Signal Voltage Gain
AVO
AVO
AVO
RL = 100 kΩ,
−10 V ≤ VOUT ≤ +10 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ,
−10 V ≤ VOUT ≤ +10 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
RL = 2 kΩ,
500
300
600
300
500
300
600
300
V/mV
V/mV
V/mV
350
200
350
200
V/mV
V/mV
V/mV
150
150
100
−10 V ≤ VOUT ≤ +10 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
200
125
200
125
V/mV
V/mV
V/mV
μV
100
0.2
Long-Term Offset Voltage1
Offset Voltage Drift2
VOS
ΔVOS/ΔT
150
1.75
300
μV/°C
OUTPUT CHARACTERISTICS
Output Voltage Swing High
VOH
IL = 1 mA
14.1
14.2
14.1
−14.7 −14.6
−14.4
14.1
14.0
13.9
14.2
V
V
V
V
V
IL = 1 mA, −40°C ≤ TA ≤ +125°C 14.0
IL = 5 mA
IL = −1 mA
IL = −1 mA,
13.9
14.1
Output Voltage Swing Low
VOL
−14.7 −14.6
−14.4
−40°C ≤ TA ≤ +125°C
IL = −5 mA
+14.2 −14.1
25
+14.2 −14.1
25
V
mA
Short-Circuit Current
POWER SUPPLY
ISC
Power Supply Rejection Ratio PSRR
VS = 1.5 V to 18 V
−40°C ≤ TA ≤ +125°C
VOUT = 0 V, VS = 18 V,
100
97
120
97
94
120
dB
dB
μA
Supply Current per Amplifier
ISY
30
30
−40°C ≤ TA ≤ +125°C, RL = ∞
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
Voltage Noise
en
in
en p-p
f = 1 kHz
f = 1 kHz
0.1 Hz to 10 Hz
65
0.05
3
65
0.05
3
nV/√Hz
pA/√Hz
μV p-p
Rev. D | Page 3 of 20
OP193/OP293
Data Sheet
E Grade
Typ
F Grade
Typ
Parameter
Symbol Conditions
Min
Max
Min
Max
Unit
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Channel Separation
SR
GBP
RL = 2 kΩ
15
35
120
15
35
120
V/ms
kHz
dB
VOUT = 10 V p-p, RL = 2 kΩ,
f = 1 kHz
1 Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3.
2 Offset voltage drift is the average of the −40°C to +25°C delta and the +25°C to +125°C delta.
VS = 5.0 V, VCM = 0.1 V, TA = 25°C, unless otherwise noted.
Table 2.
E Grade
Typ
F Grade
Typ
Parameter
Symbol Conditions
Min
Max
Min
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
OP193
150
250
250
350
20
μV
μV
μV
μV
nA
nA
V
OP193, −40°C ≤ TA ≤ +125°C
OP293
OP293, −40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
100
200
15
2
Input Bias Current
IB
IOS
VCM
CMRR
Input Offset Current
Input Voltage Range
Common-Mode Rejection
4
4
0
100
92
4
0
96
92
0.1 V ≤ VCM ≤ 4 V
0.1 V ≤ VCM ≤ 4 V,
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ,
0.03 V ≤ VOUT ≤ 4.0 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ,
0.03 V ≤ VOUT ≤ 4.0 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
116
130
116
dB
dB
Large Signal Voltage Gain
Large Signal Voltage Gain
AVO
200
125
200
125
V/mV
V/mV
V/mV
130
70
AVO
75
50
75
50
V/mV
V/mV
V/mV
μV
70
Long-Term Offset Voltage1
Offset Voltage Drift2
VOS
ΔVOS/ΔT
150
1.25
300
0.2
μV/°C
OUTPUT CHARACTERISTICS
Output Voltage Swing High
VOH
IL = 100 μA
IL = 1 mA
4.4
4.4
4.4
4.4
V
V
4.1
4.1
IL = 1 mA,
−40°C ≤ TA ≤ +125°C
IL = 5 mA
4.0
3.9
4.0
3.9
V
V
4.4
4.4
Output Voltage Swing Low
VOL
IL = −100 μA
140
160
220
140
160
220
mV
IL = −100 μA,
−40°C ≤ TA ≤ +125°C
No load
IL = −1 mA
IL = −1 mA, −40°C ≤ TA ≤ +125°C
IL = –5 mA
mV
mV
mV
mV
mV
mA
5
280
5
280
400
500
900
400
500
900
700
8
700
8
Short-Circuit Current
POWER SUPPLY
ISC
Power Supply Rejection Ratio
PSRR
ISY
VS = 1.7 V to 6.0 V
−40°C ≤ TA ≤ +125°C
VCM = 2.5 V, RL = ∞
100
94
120
97
90
120
dB
dB
μA
Supply Current per Amplifier
14.5
14.5
Rev. D | Page 4 of 20
Data Sheet
OP193/OP293
E Grade
Typ
F Grade
Typ
Parameter
Symbol Conditions
Min
Max
Min
Max
Unit
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
Voltage Noise
en
in
en p-p
f = 1 kHz
f = 1 kHz
0.1 Hz to 10 Hz
65
0.05
3
65
0.05
3
nV/√Hz
pA/√Hz
μV p-p
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
SR
GBP
RL = 2 kΩ
12
35
12
35
V/ms
kHz
1 Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3.
2 Offset voltage drift is the average of the −40°C to +25°C delta and the +25°C to +125°C delta.
Rev. D | Page 5 of 20
OP193/OP293
Data Sheet
VS = 3.0 V, VCM = 0.1 V, TA = 25°C, unless otherwise noted.
Table 3.
E Grade
F Grade
Parameter
Symbol
Conditions
Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
OP193
150
250
250
350
20
μV
μV
μV
μV
nA
nA
V
OP193, −40°C ≤ TA ≤ +125°C
OP293
OP293, −40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
100
200
15
2
Input Bias Current
IB
IOS
VCM
CMRR
Input Offset Current
Input Voltage Range
Common-Mode Rejection
4
2
0
97
90
2
0
94
87
0.1 ≤ VCM ≤ 2 V
0.1 ≤ VCM ≤ 2 V,
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ,
0.03 V ≤ VOUT ≤ 2 V
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
116
116
100
dB
dB
Large Signal Voltage Gain
AVO
100
75
100
75
V/mV
V/mV
V/mV
μV
100
0.2
Long-Term Offset Voltage1
Offset Voltage Drift2
VOS
ΔVOS/ΔT
150
1.25
300
μV/°C
OUTPUT CHARACTERISTICS
Output Voltage Swing High
VOH
IL = 1 mA
IL = 1 mA, –40°C ≤ TA ≤ +125°C
IL = 5 mA
2.1
1.9
1.9
2.14
2.1
2.1
1.9
1.9
2.14
2.1
V
V
V
Output Voltage Swing Low
VOL
IL = −1 mA
IL = −1 mA, −40°C ≤ TA ≤ +125°C
IL = −5 mA
280 400
500
700 900
8
280 400
500
700 900
8
mV
mV
mV
mA
Short-Circuit Current
POWER SUPPLY
ISC
Power Supply Rejection Ratio
PSRR
ISY
VS = +1.7 V to +6 V
−40°C ≤ TA ≤ +125°C
VCM = 1.5 V, RL = ∞
−40°C ≤ TA ≤ +125°C
100
94
97
90
dB
dB
μA
μA
V
Supply Current per Amplifier
14.5 22
22
14.5 22
22
18
Supply Voltage Range
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
Voltage Noise
VS
+2
18 +2
en
in
en p-p
f = 1 kHz
f = 1 kHz
0.1 Hz to 10 Hz
65
0.05
3
65
0.05
3
nV/√Hz
pA/√Hz
μV p-p
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Channel Separation
SR
GBP
RL = 2 kΩ
10
25
120
10
25
120
V/ms
kHz
dB
VOUT = 10 V p-p, RL = 2 kΩ,
f = 1 kHz
1 Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3.
2 Offset voltage drift is the average of the –40°C to +25°C delta and the +25°C to +125°C delta.
Rev. D | Page 6 of 20
Data Sheet
OP193/OP293
VS = 2.0 V, VCM = 0.1 V, TA = 25°C, unless otherwise noted.
Table 4.
E Grade
Min Typ
F Grade
Max Min Typ
Parameter
Symbol
Conditions
Max Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
OP193
150
250
250
350
20
μV
μV
μV
μV
nA
nA
V
OP193, −40°C ≤ TA ≤ +125°C
OP293
OP293, −40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
100
175
15
2
1
Input Bias Current
IB
IOS
VCM
AVO
Input Offset Current
Input Voltage Range
Large Signal Voltage Gain
4
1
0
0
RL = 100 kΩ,
0.03 V ≤ VOUT ≤ 1 V
−40°C ≤ TA ≤ +125°C
60
60
V/mV
V/mV
μV
70
70
Long-Term Offset Voltage
POWER SUPPLY
Power Supply Rejection Ratio
VOS
PSRR
ISY
150
300
VS = 1.7 V to 6 V
100
94
97
90
dB
dB
μA
μA
V
−40°C ≤ TA ≤ +125°C
VCM = 1.0 V, RL = ∞
−40°C ≤ TA ≤ +125°C
Supply Current/Amplifier
13.2 20
25
13.2 20
25
Supply Voltage Range
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
Voltage Noise
VS
+2
18
+2
18
en
in
f = 1 kHz
f = 1 kHz
0.1 Hz to 10 Hz
65
0.05
3
65
0.05
3
nV/√Hz
pA/√Hz
μV p-p
en p-p
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
SR
GBP
RL = 2 kΩ
10
25
25
V/ms
kHz
Rev. D | Page 7 of 20
OP193/OP293
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 5.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Parameter
Rating
Supply Voltage1
18 V
18 V
18 V
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
Input Voltage1
Differential Input Voltage1
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
1 For supply voltages less than 18 V, the input voltage is limited to the
supply voltage.
Table 6. Thermal Resistance
Package Type
1
θJA
θJC
Unit
8-Lead SOIC_N (S)
158
43
°C/W
1 θJA is specified for the worst-case conditions. θJA is specified for a device
soldered in a circuit board for the SOIC package.
ESD CAUTION
Rev. D | Page 8 of 20
Data Sheet
OP193/OP293
TYPICAL PERFORMANCE CHARACTERISTICS
200
150
120
90
60
30
0
V
= ±15V
= 25°C
V = ±15V
S
S
A
T
–40°C ≤ T ≤ +125°C
A
160
120
80
40
0
–75 –60 –45 –30 –15
0
15
30
45
60
75
0
0.2
0.4
0.6
0.8
1.0
OFFSET (µV)
TCV (µV/°C)
OS
Figure 3. Offset Distribution, VS = 15 V
Figure 6. TCVOS Distribution, VS = 15 V
200
160
120
80
1
V
= 3V
= 0.1V
V
= 5V
S
S
V
CM
= 25°C
T
A
0
–1
–2
–40°C
+125°C
40
–3
–4
+25°C
0
–75 –60 –45 –30 –15
0
15
30
45
60
75
0
1
2
3
4
5
OFFSET (µV)
COMMON-MODE VOLTAGE (V)
Figure 4. Offset Distribution, VS = +3 V
Figure 7. Input Bias Current vs. Common-Mode Voltage
150
120
90
60
30
0
120
100
80
V
V
= 3V
S
5V ≤ V ≤ 30V
S
= 0.1V
CM
T
= 25°C
A
–40°C ≤ T ≤ +125°C
A
–PSRR
+PSRR
60
40
20
0
0
0.2
0.4
0.6
0.8
1.0
10
10k
100
1k
TCV (µV/°C)
OS
FREQUENCY (Hz)
Figure 5. TCVOS Distribution, VS = +3 V
Figure 8. PSRR vs. Frequency
Rev. D | Page 9 of 20
OP193/OP293
Data Sheet
120
100
80
0
–0.05
–0.10
–0.15
T
= 25°C
A
V
V
= ±15V
= +5V
S
V
V
= +2V
S
= 0.1V
60
CM
S
40
–0.20
–0.25
V
= ±15V
S
20
0
10
10k
125
125
–50
–25
0
25
50
75
100
125
125
125
100
FREQUENCY (Hz)
1k
TEMPERATURE (°C)
Figure 9. CMRR vs. Frequency
Figure 12. Input Offset Current vs. Temperature
25
20
15
10
0
–1
–2
–3
+SR = –SR
= ±15V
V
S
+SR = –SR
= +5V
V
= ±15V
= +2V
S
V
S
V
V
S
= 0.1V
CM
5
0
–4
–5
–50
–50
–25
0
25
50
75
100
–25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 10. Slew Rate vs. Temperature
Figure 13. Input Bias Current vs. Temperature
40
30
20
25
20
15
10
+I
V
= ±18V
SC
S
V
= ±15V
S
| –I
SC
V
|
= ±15V
S
V
V
= +2V
S
= 1V
CM
| –I
|
10
0
SC
V
= +5V
S
+I
5
0
SC
= +5V
V
S
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Short-Circuit Current vs. Temperature
Figure 14. Supply Current vs. Temperature
Rev. D | Page 10 of 20
Data Sheet
OP193/OP293
1k
2500
2000
1500
1000
5V ≤ V ≤ 30V
S
T
= 25°C
A
V
= ±15V
S
–10V ≤ V
≤ +10V
100
10
OUT
V
= +5V
S
0.03V ≤ V
≤ 4V
OUT
500
0
1
0.1
1
10
100
1k
–50
125
–25
0
25
50
75
100
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 15. Voltage Noise Density vs. Frequency
Figure 18. Voltage Gain (RL = 100 kΩ) vs. Temperature
1000
800
600
400
1k
5V ≤ V ≤ 30V
S
T
= 25°C
A
V
= ±15V
S
–10V ≤ V
≤ +10V
OUT
100
10
V = +5V
S
0.03V ≤ V
≤ 4V
OUT
200
0
1
0.1
–50
125
–25
0
25
50
75
100
1
10
100
1k
TEMPERATURE (°C)
FREQUENCY (Hz)
Figure 19. Voltage Gain (RL = 10 kΩ) vs. Temperature
Figure 16. Current Noise Density vs. Frequency
60
40
20
10k
1k
V
T
= 5V
= 25°C
5V ≤ V ≤ 30V
S
S
T
= 25°C
A
A
DELTA
FROM V
CC
DELTA
FROM V
100
10
1
EE
0
–20
10
100
1k
10k
100k
0.1
1
10
100
1k
10k
FREQUENCY (Hz)
CURRENT LOAD (µA)
Figure 20. Closed-Loop Gain vs. Frequency, VS = 5 V
Figure 17. Delta Output Swing vs. Current Load
Rev. D | Page 11 of 20
OP193/OP293
Data Sheet
60
60
40
V
T
= ±15V
= 25°C
V
= 5V
S
A
S
PHASE
GAIN
90
45
0
40
20
20
0
0
–20
–40
–45
–90
–20
10
100
1k
10k
100k
100
1k
10k
FREQUENCY (Hz)
100k
1M
FREQUENCY (Hz)
Figure 21. Closed-Loop Gain vs. Frequency, VS = 15 V
Figure 23. Open-Loop Gain and Phase vs. Frequency
60
50
40
30
20
60
40
V
= 5V
= 25°C
= 1
S
V = ±15V
S
T
A
A
V
50mV ≤ V ≤ 150mV
LOADS TO GND
90
45
0
IN
+OS = | –OS |
= 50kΩ
PHASE
GAIN
R
L
20
0
+OS
L
R
=
∞
–20
–40
–45
–90
+OS = | –OS |
10
0
R
= 10kΩ
L
–OS
L
R
=
∞
10
100
1k
10k
100
1k
10k
FREQUENCY (Hz)
100k
1M
CAPACITIVE LOAD (pF)
Figure 22. Small Signal Overshoot vs. Capacitive Load
Figure 24. Open-Loop Gain and Phase vs. Frequency
Rev. D | Page 12 of 20
Data Sheet
OP193/OP293
FUNCTIONAL DESCRIPTION
V+
The OP193/OP293 operational amplifiers are single-supply,
micropower, precision amplifiers whose input and output ranges
both include ground. Input offset voltage (VOS) is only 100 μV
maximum, while the output delivers ±± mꢀ to a load. Supply
current is only 1± μꢀ.
Q4
FROM
INPUT
STAGE
Q1
Q5
ꢀ simplified schematic of the input stage is shown in Figure 26.
The input transistors, Q1 and Q2, are PNP devices, which permit
the inputs to operate down to ground potential. The input transis-
tors have resistors in series with the base terminals to protect
the junctions from overvoltage conditions. The second stage is
an NPN cascode that is buffered by an emitter follower before
driving the final PNP gain stage.
OUTPUT
Q3
Q2
I3
I2
I1
V–
Figure 25. OP193/OP293 Equivalent Output Circuit
By operating as an emitter follower, Q1 offers a high impedance
load to the final PNP collector of the input stage. Base drive to
Q2 is derived by monitoring Q1’s collector current. Transistor
Q± tracks the collector current of Q1. When Q1 is on, Q± keeps
Q4 off, and Current Source I1 keeps Q2 turned off. When Q1 is
driven to cutoff (that is, the output must move toward V−), Q±
allows Q4 to turn on. Q4’s collector current then provides the
base drive for Q3 and Q2, and the output low voltage swing is
set by Q2’s VCE,SꢀT, which is about ± mV.
The OP193 includes connections to taps on the input load resis-
tors, which can be used to null the input offset voltage, VOS.
The OP293 have two additional transistors, Q7 and Q8. The
behavior of these transistors is discussed in the Output Phase
Reversal— and Output Phase Reversal— sections.
The output stage, shown in Figure 2±, is a noninverting NPN
totem-pole configuration. Current is sourced to the load by
Emitter Follower Q1, while Q2 provides current sink capability.
When Q2 saturates, the output is pulled to within ± mV of
ground without an external pull-down resistor. The totem-pole
output stage supplies a minimum of ± mꢀ to an external load,
even when operating from a single 3.0 V power supply.
DRIVING CAPACITIVE LOADS
The OP193/OP293 amplifiers are unconditionally stable with
capacitive loads less than 200 pF. However, the small signal,
unity-gain overshoot improves if a resistive load is added. For
example, transient overshoot is 20% when driving a 1000 pF,
10 kΩ load. When driving large capacitive loads in unity-gain
configurations, an in-the-loop compensation technique is
recommended, as illustrated in Figure 30.
V+
I1
I2
I3
I4
+INPUT
–INPUT
2kΩ
2kΩ
Q5
Q1
Q2
Q6
Q4
OP293
ONLY
Q3
Q7
TO
Q8
OUTPUT
STAGE
D1
R1
R2
A
A
I5
I6
R1
R2
B
B
V–
NULLING
TERMINALS
(OP193 ONLY)
Figure 26. OP193/OP293 Equivalent Input Circuit
Rev. D | Page 13 of 20
OP193/OP293
Data Sheet
OP193/OP293 can be operated over the entire useful life of the
cell. Figure 27 shows the typical discharge characteristic of a
1 Ah lithium cell powering the OP193 and OP293, with each
amplifier, in turn, driving 2.1 V into a 100 kΩ load.
4
INPUT OVERVOLTAGE PROTECTION
As previously mentioned, the OP193/OP293 op amps use a
PNP input stage with protection resistors in series with the
inverting and noninverting inputs. The high breakdown of the
PNP transistors, coupled with the protection resistors, provides
a large amount of input protection from overvoltage conditions.
The inputs can therefore be taken 20 V beyond either supply
without damaging the amplifier.
3
2
OUTPUT PHASE REVERSAL—OP193
The OP193’s input PNP collector-base junction can be forward-
biased if the inputs are brought more than one diode drop (0.7 V)
below ground. When this happens to the noninverting input,
Q4 of the cascode stage turns on and the output goes high. If
the positive input signal can go below ground, phase reversal
can be prevented by clamping the input to the negative supply
(that is, GND) with a diode. The reverse leakage of the diode
does add to the input bias current of the amplifier. If input bias
current is not critical, a 1N914 diode adds less than 10 nA of
leakage. However, its leakage current doubles for every 10°C
increase in ambient temperature. For critical applications, the
collector-base junction of a 2N3906 transistor adds only about
10 pA of additional bias current. To limit the current through
the diode under fault conditions, a 1 kΩ resistor is recommended
in series with the input. (The OP193’s internal current limiting
resistors do not protect the external diode.)
OP293
OP193
1
0
0
1000
2000
3000
4000
5000
6000
7000
HOURS
Figure 27. Lithium Sulfur Dioxide Cell Discharge Characteristic with
OP193/OP293 and 100 kΩ Loads Input Offset Voltage Nulling
The OP193 provides two offset nulling terminals that can be
used to adjust the OP193’s internal VOS. In general, operational
amplifier terminals should never be used to adjust system offset
voltages. The offset nulling circuit of Figure 28 provides about
7 mV of offset adjustment range. A 100 kΩ resistor placed in
series with the wiper arm of the offset null potentiometer, as shown
in Figure 29, reduces the offset adjustment range to 400 μV and
is recommended for applications requiring high null resolution.
Offset nulling does not adversely affect TCVOS performance,
providing that the trimming potentiometer temperature coeffi-
cient does not exceed 100 ppm/°C.
OUTPUT PHASE REVERSAL—OP293
The OP293 includes two lateral PNP transistors, Q7 and Q8, to
protect against phase reversal. If an input is brought more than
one diode drop (≈0.7 V) below ground, Q7 and Q8 combine to
level shift the entire cascode stage, including the bias to Q3 and
Q4, simultaneously. In this case, Q4 does not saturate and the
output remains low.
V+
7
2
The OP293 does not exhibit output phase reversal for inputs up
to −5 V below V− at +25°C. The phase reversal limit at +125°C
is about −3 V. If the inputs can be driven below these levels, an
external clamp diode, as discussed in the previous section,
should be added.
6
OP193
4
3
5
1
100kΩ
BATTERY-POWERED APPLICATIONS
V–
OP193/OP293 series op amps can be operated on a minimum
supply voltage of 1.7 V, and draw only 13 μA of supply current
per amplifier from a 2.0 V supply. In many battery-powered cir-
cuits, OP193/OP293 devices can be continuously operated for
thousands of hours before requiring battery replacement, thus
reducing equipment downtime and operating cost.
Figure 28. Offset Nulling Circuit
V+
7
2
High performance portable equipment and instruments fre-
quently use lithium cells because of their long shelf life, light
weight, and high energy density relative to older primary cells.
Most lithium cells have a nominal output voltage of 3 V and are
noted for a flat discharge characteristic. The low supply voltage
requirement of the OP193/OP293, combined with the flat
discharge characteristic of the lithium cell, indicates that the
6
OP193
4
3
5
1
100kΩ
100kΩ
V–
Figure 29. High Resolution Offset Nulling Circuit
Rev. D | Page 14 of 20
Data Sheet
OP193/OP293
A MICROPOWER FALSE-GROUND GENERATOR
V+
R1
R2
1.5MΩ
(2.5V TO 36V)
240kΩ
Some single-supply circuits work best when inputs are biased
above ground, typically at ½ of the supply voltage. In these
cases, a false ground can be created by using a voltage divider
buffered by an amplifier. One such circuit is shown in Figure 30.
7
2
3
C1
1000pF
6
OP193
V
OUT
(1.23V @ 25°C)
5
4
This circuit generates a false-ground reference at ½ of the supply
voltage, while drawing only about 27 μA from a 5 V supply.
The circuit includes compensation to allow for a 1 μF bypass
capacitor at the false-ground output. The benefit of a large
capacitor is that not only does the false ground present a very
low dc resistance to the load, but its ac impedance is low as well.
The OP193 can both sink and source more than 5 mA, which
improves recovery time from transients in the load current.
5V OR 12V
MAT01AH
1
7
Q2
Q1
2
6
+
+
V
V
3
–
5
–
BE2
BE1
R3
68kΩ
V1
–
+
ΔV
BE
R4
130kΩ
R5, 20kΩ
OUTPUT
ADJUST
10kΩ
0.022µF
240kΩ
Figure 31. A Battery-Powered Voltage Reference
7
2
A SINGLE-SUPPLY CURRENT MONITOR
100Ω
6
2.5V OR 6V
OP193
Current monitoring essentially consists of amplifying the voltage
drop across a resistor placed in series with the current to be
measured. The difficulty is that only small voltage drops can be
tolerated, and with low precision op amps, this greatly limits the
overall resolution. The single-supply current monitor of Figure 32
has a resolution of 10 μA and is capable of monitoring 30 mA
of current. This range can be adjusted by changing the current
sense resistor, R1. When measuring total system current, it may
be necessary to include the supply current of the current monitor,
which bypasses the current sense resistor, in the final result.
This current can be measured and calibrated (together with the
residual offset) by adjustment of the offset trim potentiometer,
R2. This produces a deliberate temperature dependent offset.
However, the supply current of the OP193 is also proportional
to temperature, and the two effects tend to track. Voltage devel-
oped at the noninverting input and amplified by (1 + R4/R5)
3
4
+
+
1µF
1µF
240kΩ
Figure 30. A Micropower False-Ground Generator
A BATTERY-POWERED VOLTAGE REFERENCE
The circuit of Figure 31 is a battery-powered voltage reference
that draws only 17 μA of supply current. At this level, two AA
alkaline cells can power this reference for more than 18 months.
At an output voltage of 1.23 V at 25°C, drift of the reference is
only 5.5 μV/°C over the industrial temperature range. Load
regulation is 85 μV/mA with line regulation at 120 μV/V.
Design of the reference is based on the Brokaw band gap core
technique. Scaling of Resistor R1 and Resistor R2 produces
unequal currents in Q1 and Q2. The resulting ΔVBE across R3
creates a temperature-proportional voltage (PTAT), which, in
turn, produces a larger temperature-proportional voltage across
R4 and R5, V1. The temperature coefficient of V1 cancels (first
order) the complementary to absolute temperature (CTAT)
coefficient of VBE1. When adjusted to 1.23 V at 25°C, output
voltage temperature coefficient is at a minimum. Band gap
references can have start-up problems. With no current in R1
and R2, the OP193 is beyond its positive input range limit and
has an undefined output state. Shorting Pin 5 (an offset adjust
pin) to ground forces the output high under these circumstances
and ensures reliable startup without significantly degrading the
OP193’s offset drift.
appears at VOUT
.
V+
+
TO CIRCUIT
UNDER TEST
7
–
3
2
6
OP193
I
TEST
V
=
OUT
100mV/mA(I
4
)
TEST
5
1
R4
9.9kΩ
R1
1Ω
R2
100kΩ
R5
100Ω
R3
100kΩ
Figure 32. Single-Supply Current Monitor
Rev. D | Page 15 of 20
OP193/OP293
Data Sheet
R1
20kΩ
R2
1.98MΩ
A SINGLE-SUPPLY INSTRUMENTATION AMPLIFIER
Designing a true single-supply instrumentation amplifier with
zero-input and zero-output operation requires special care. The
traditional configuration, shown in Figure 33, depends upon
Amplifier A1’s output being at 0 V when the applied common-
mode input voltage is at 0 V. Any error at the output is multiplied
by the gain of A2. In addition, current flows through Resistor R3
as A2’s output voltage increases. A1’s output must remain at 0 V
while sinking the current through R3, or a gain error results. With
a maximum output voltage of 4 V, the current through R3 is
only 2 μA, but this still produces an appreciable error.
5V
V+
R3
R4
–
20kΩ
1.98MΩ
A1
1/2 OP293
–IN
+
V–
5V
10kΩ
5V
Q1
Q2
V+
–
V
OUT
A2
1/2 OP293
VN2222
+IN
+
V–
R1
R2
20kΩ
1.98MΩ
Figure 34. An Improved Single-Supply, 0 VIN, 0 VOUT Instrumentation Amplifier
5V
A LOW POWER, TEMPERATURE TO 4 mA TO 20 mA
TRANSMITTER
–
V+
R3
R4
20kΩ
1.98MΩ
A1
1/2 OP293
5V
–IN
+IN
+
V–
A simple temperature to 4 mA to 20 mA transmitter is shown
in Figure 35. After calibration, this transmitter is accurate to
0.5°C over the −50°C to +150°C temperature range. The
transmitter operates from 8 V to 40 V with supply rejection
better than 3 ppm/V. One half of the OP293 is used to buffer
the TEMP pin, and the other half regulates the output current
to satisfy the current summation at its noninverting input.
I
SINK
V+
–
V
OUT
A2
1/2 OP293
+
V–
Figure 33. A Conventional Instrumentation Amplifier
One solution to this problem is to use a pull-down resistor. For
example, if R3 = 20 kΩ, then the pull-down resistor must be less
than 400 Ω. However, the pull-down resistor appears as a fixed
load when a common-mode voltage is applied. With a 4 V
common-mode voltage, the additional load current is 10 mA,
which is unacceptable in a low power application.
VTEMP
×
(
R6 + R7
)
− VSET
R2 + R6 + R7
R2 × R10
IOUT
+
R2 × R10
The change in output current with temperature is the derivative
of the following transfer function:
Figure 34 shows a better solution. A1’s sink current is provided
by a pair of N-channel FET transistors, configured as a current
mirror. With the values shown, the sink current of Q2 is about
340 μA. Thus, with a common-mode voltage of 4 V, the addi-
tional load current is limited to 340 μA vs. 10 mA with a 400 Ω
resistor.
∆VTEMP
∆T
R2 × R10
(
R6 + R7
)
∆IOUT
∆T
=
1N4002
V+
8V TO 40V
SPAN TRIM
R6
3kΩ
R4
20kΩ
REF43GPZ
R7
2
2
6
3
8
V
–
R2
5kΩ
IN
V
1kΩ
1
1/2
OP293
TEMP
6
V
–
R8
OUT
1kΩ
1/2
7
3
2N1711
+
4
TEMP
GND
OP293
V
R3
100kΩ
R5
5kΩ
R1, 10kΩ
SET
5
+
4
R9
100kΩ
ZERO
TRIM
R10
100Ω
1%, 1/2 W
I
OUT
R
LOAD
NOTES
1. ALL RESISTORS 1/4 W, 5% UNLESS OTHERWISE NOTED.
Figure 35. Temperature to 4 mA to 20 mA Transmitter
Rev. D | Page 16 of 20
Data Sheet
OP193/OP293
C1
5V
From the formulas, it can be seen that if the span trim is adjusted
before the zero trim, the two trims are not interactive, which
greatly simplifies the calibration procedure.
75nF
R5
200kΩ
5V
R1
200kΩ
2
8
–
V
CONTROL
A1
1/2 OP293
1
6
SQUARE
OUT
–
Calibration of the transmitter is simple. First, the slope of the
output current vs. temperature is calibrated by adjusting the
span trim, R7. A couple of iterations may be required to be sure
the slope is correct.
A2
7
3
4
1/2 OP293
+
R2
200kΩ
5
+
TRIANGLE
OUT
R3
R4
200kΩ
100kΩ
R6
200kΩ
R7
200kΩ
When the span trim has been adjusted, the zero trim can be
made. Adjusting the zero trim does not affect the gain.
R8
200kΩ
5V
DD
The zero trim can be set at any known temperature by adjusting
R5 until the output current equals:
CD4066
∆IFS
∆TOPERATING
1
2
3
4
5
6
7
IN/OUT
OUT/IN
OUT/IN
IN/OUT
CONT
14
5V
V
IOUT
=
(
TAMBIENT −TMIN + 4 mA
)
S1
CONT 13
CONT 12
Table 7 shows the values of R6 required for various temperature
ranges.
S2
IN/OUT 11
OUT/IN 10
Table 7. R6 Values vs. Temperature
Temp Range
R6
S3
S4
0°C to 70°C
−40°C to +85°C
−55°C to +150°C
10 kΩ
6.2 kΩ
3 kΩ
CONT
OUT/IN
IN/OUT
9
8
5V
V
SS
A MICROPOWER VOLTAGE CONTROLLED
OSCILLATOR
Figure 36. Micropower Voltage Controlled Oscillator
The OP293 CMOS analog switch forms the precision VCO of
Figure 36. This circuit provides triangle and square wave
outputs and draws only 50 μA from a single 5 V supply. A1 acts
as an integrator; S1 switches the charging current symmetrically
to yield positive and negative ramps. The integrator is bounded
by A2, which acts as a Schmitt trigger with a precise hysteresis
of 1.67 V, set by Resistor R5, Resistor R6, and Resistor R7, and
associated CMOS switches. The resulting output of A1 is a
triangle wave with upper and lower levels of 3.33 V and 1.67 V.
The output of A2 is a square wave with almost rail-to-rail swing.
With the components shown, frequency of operation is given by
the equation:
f
OUT = VCONTROL V × 10 Hz/V
However, the frequency can easily be changed by varying C1.
The circuit operates well up to 500 Hz.
Rev. D | Page 17 of 20
OP193/OP293
Data Sheet
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 37. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
Temperature Range
−40°C to +125°C
Package Description
Package Option
OP193FS-REEL
OP193FSZ
OP193FSZ-REEL
OP193FSZ-REEL7
OP293ESZ
OP293ESZ-REEL
OP293ESZ-REEL7
OP293FSZ
OP293FSZ-REEL
OP293FSZ-REEL7
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
1 Z = RoHS Compliant Part.
Rev. D | Page 18 of 20
Data Sheet
NOTES
OP193/OP293
Rev. D | Page 19 of 20
OP193/OP293
NOTES
Data Sheet
©1995–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00295-0-1/15(D)
Rev. D | Page 20 of 20
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