SSM2135S [ADI]
Dual Single-Supply Audio Operational Amplifier; 双路单电源音频运算放大器
| 型号： | SSM2135S |
| 厂家： | 
ADI |
| 描述： | Dual Single-Supply Audio Operational Amplifier |
| 文件： | 总12页 (文件大小：301K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual Single-Supply
Audio Operational Amplifier
a
SSM2135
P IN CO NNECTIO NS
FEATURES
Excellent Sonic Characteristics
High Output Drive Capability
5.2 nV/ √Hz Equivalent Input Noise @ 1 kHz
0.001% THD+N (VO = 2.5 V p-p @ 1 kHz)
3.5 MHz Gain Bandw idth
Unity-Gain Stable
8-Lead Epoxy D IP
(P -Suffix)
8-Lead Narrow-Body SO IC
(S Suffix)
1
2
3
4
8
7
6
5
OUT A
–IN A
V+
OUT A
–IN A
V+
Low Cost
OUT B
–IN B
+IN B
OUT B
–IN B
+IN B
SSM2135
+IN A
APPLICATIONS
+IN A
V–/GND
Multim edia Audio System s
Microphone Pream plifier
Headphone Driver
V–/GND
SSM2135
Differential Line Receiver
Balanced Line Driver
Audio ADC Input Buffer
Audio DAC l-V Converter and Filter
Pseudo-Ground Generator
under moderate load conditions. Under severe loading, the
SSM2135 still maintains a wide output swing with ultralow
distortion.
Particularly well suited for computer audio systems and
portable digital audio units, the SSM2135 can perform
preamplification, headphone and speaker driving, and balanced
line driving and receiving. Additionally, the device is ideal for
input signal conditioning in single-supply sigma-delta analog-
to-digital converter subsystems such as the AD1878/AD1879.
GENERAL D ESCRIP TIO N
T he SSM2135 Dual Audio Operational Amplifier permits
excellent performance in portable or low power audio systems,
with an operating supply range of +4 V to +36 V or ±2 V to
±18 V. T he unity gain stable device has very low voltage noise
of 4.7 nV/√Hz, and total harmonic distortion plus noise below
0.01% over normal signal levels and loads. Such characteristics
are enhanced by wide output swing and load drive capability. A
unique output stage* permits output swing approaching the rail
T he SSM2135 is available in 8-lead plastic DIP and SOIC
packages, and is guaranteed for operation over the extended
industrial temperature range of –40°C to +85°C.
*Protected by U. S. Patent No. 5,146,181.
FUNCTIO NAL BLO CK D IAGRAM
V+
OUT
+IN
9V
9V
–IN
V–/GND
REV. D
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700
Fax: 617/ 326-8703
(V = +5 V, –40؇C < T < +85؇C unless otherwise noted.
S
A
SSM2135–SPECIFICATIONS
Typical specifications apply at T = +25؇C.)
A
P aram eter
Sym bol
Conditions
Min
Typ
Max
Units
AUDIO PERFORMANCE
Voltage Noise Density
Current Noise Density
Signal-T o-Noise Ratio
Headroom
en
in
f = 1 kHz
f = 1 kHz
5.2
0.5
121
5.3
nV/√Hz
pA/√Hz
dBu
SNR
HR
T HD+N
20 Hz to 20 kHz, 0 dBu = 0.775 V rms
Clip Point = 1% THD+N, f = 1 kHz, RL = 10 kΩ
AV = +1, VO = 1 V p-p, f = 1 kHz, 80 kHz LPF
RL = 10 kΩ
dBu
T otal Harmonic Distortion
0.003
0.005
%
%
RL = 32 Ω
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling T ime
SR
GBW
tS
RL = 2 kΩ, T A = +25°C
0.6
0
0.9
3.5
5.8
V/µs
MHz
µs
to 0.1%, 2 V Step
INPUT CHARACT ERIST ICS
Input Voltage Range
Input Offset Voltage
Input Bias Current
Input Offset Current
VCM
VOS
IB
+4.0
2.0
750
50
V
mV
nA
VOUT = 2 V
VCM = 0 V, VOUT = 2 V
VCM = 0 V, VOUT = 2 V
0.2
300
IOS
nA
Differential Input Impedance
Common-Mode Rejection
Large Signal Voltage Gain
ZIN
CMR
AVO
4
112
MΩ
dB
V/µV
0 V ≤ VCM ≤ 4 V, f = dc
0.01 V ≤ VOUT ≤ 3.9 V, RL = 600 Ω
87
2
OUT PUT CHARACT ERIST ICS
Output Voltage Swing High
VOH
VOL
ISC
RL = 100 kΩ
RL = 600 Ω
RL = 100 kΩ
RL = 600 Ω
4.1
3.9
V
V
mV
mV
mA
Output Voltage Swing Low
Short Circuit Current Limit
3.5
3.0
±30
POWER SUPPLY
Supply Voltage Range
VS
Single Supply
Dual Supply
VS = +4 V to +6 V, f = dc
VOUT = 2.0 V, No Load
VS = +5 V
+4
±2
90
+36
±18
V
V
dB
Power Supply Rejection Ratio
Supply Current
PSRR
ISY
120
2.8
3.7
6.0
7.6
mA
mA
VS = ±18 V, VOUT = 0 V, No Load
TH ERMAL CH ARACTERISTICS
ABSO LUTE MAXIMUM RATINGS
T hermal Resistance1
Supply Voltage
Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +36 V
Dual Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 10 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage T emperature Range . . . . . . . . . . . . –65°C to +150°C
Operating T emperature Range . . . . . . . . . . . –40°C to +85°C
Junction T emperature Range (TJ) . . . . . . . . –65°C to +150°C
Lead T emperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
8-Lead Plastic DIP
θJA
103°C/W
θJC
θJA
θJC
43°C/W
158°C/W
43°C/W
8-Lead SOIC
1θJA is specified for worst case conditions, i.e., θJA is specified for device in
socket for P-DIP and device soldered in circuit board for SOIC package.
O RD ERING GUID E
Tem perature
Range
P ackage
D escription
P ackage
O ption
ESD RATINGS
883 (Human Body) Model . . . . . . . . . . . . . . . . . . . . . . . 1 kV
EIAJ Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 V
Model
SSM2135P –40°C to +85°C
SSM2135S –40°C to +85°C
8-Lead Plastic DIP N-8
8-Lead SOIC SO-8
–2–
REV. D
SSM2135
10
1
+5V
VS = +5V
AV = +1, ƒ = 1kHz
VIN = 1Vp-p
500µF
+
RL = 10kΩ
WITH 80kHz FILTER
RL
0.1
0.01
+2.5Vdc
Figure 1. Test Circuit for Figures 2–4
0.001
10
100
1k
10k
LOAD RESISTANCE – Ω
Figure 4. THD+N vs. Load (See Test Circuit)
1
V
= +5V
S
R
V
= 100kΩ
L
NONINVERTING
= 2.5Vp-p
OUT
ƒ = 1kHz
WITH 80kHz FILTER
0.1
0.01
INVERTING
Figure 2. THD+N vs. Am plitude (See Test Circuit; AV = +1,
VS = +5 V, f = 1 kHz, with 80 kHz Low-Pass Filter)
0.001
0
20
40
60
10
30
50
GAIN – dB
Figure 5. THD+N vs. Gain
1
V
= +5V
S
A
V
= +1, ƒ = 1kHz
= 1Vp-p
V
IN
R
= 10kΩ
L
WITH 80kHz FILTER
0.1
0.01
Figure 3. THD+N vs. Frequency (See Test Circuit;
AV = +1, VIN = 1 V p-p, with 80 kHz Low-Pass Filter)
0.001
5
10
15
20
25
30
SUPPLY VOLTAGE – V
Figure 6. THD+N vs. Supply Voltage
REV. D
–3–
SSM2135
5
4
3
2
VS = +5V
A = +25°C
T
1
0
1
10
100
FREQUENCY – Hz
1k
Figure 7. SMPTE Interm odulation Distortion (AV = +1,
Figure 10. Current Noise Density vs. Frequency
VS = +5 V, f = 1 kHz, RL = 10 kΩ)
1s
100
90
10
0%
Figure 8. Input Voltage Noise (20 nV/div)
Figure 11. Frequency Response (AV = +1, VS = +5 V,
VIN = 1 V p-p, RL = 10 kΩ)
30
VS = +5V
A = +25°C
25
T
100
90
20
15
10
5
10
0%
500m V
1µS
0
1
10
100
FREQUENCY – Hz
1k
Figure 9. Voltage Noise Density vs. Frequency
Figure 12. Square Wave Response (VS = +5 V, AV = +1,
RL = ∞)
–4–
REV. D
SSM2135
60
40
50
40
30
20
10
0
V
T
= +5V
VS = +5V
S
TA = +25°C
= +25°C
A
20
0
A
= +100
= +10
= +1
V
–20
–40
–60
–80
–100
–120
A
A
V
V
105
–10
–20
10
100
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 13. Crosstalk vs. Frequency (RL = 10 kΩ)
Figure 16. Closed-Loop Gain vs. Frequency
140
100
80
V
= +5V
V
T
= +5V
S
S
T
= +25°C
= +25°C
A
A
120
100
80
0
45
90
60
GAIN
40
PHASE
60
θm = 57°
135
180
225
20
0
40
20
0
–20
100
1k
10k
100k
1M
1k
10k
100k
FREQUENCY – Hz
1M
10M
FREQUENCY – Hz
Figure 14. Com m on-Mode Rejection vs. Frequency
Figure 17. Open-Loop Gain and Phase vs. Frequency
140
50
V
= +5V
S
45
40
35
30
25
20
15
10
5
V
= +5V
= +1
R
V
= 2kΩ
S
L
120
100
80
A
T
= 100mVp–p
V
IN
A
= +25°C
A
T
= +25
= +1
°C
A
V
NEGATIVE
EDGE
60
–PSRR
+PSRR
40
POSITIVE
EDGE
20
0
0
–20
100
200
300
400
500
0
10
100
1k
10k
100k
1M
FREQUENCY – Hz
LOAD CAPACITANCE – pF
Figure 15. Power Supply Rejection vs. Frequency
Figure 18. Sm all Signal Overshoot vs. Load Capacitance
REV. D
–5–
SSM2135
40
35
30
25
20
15
10
5
50
V
= +5V
= +1
VS = +5V
S
45
40
35
30
25
20
15
10
5
A
R
TA = +25°C
V
= 10k
L
ƒ = 1kHz
THD+N = 1%
T
= +25°C
AVCL = +100
A
AVCL = +10
AVCL = +1
100k 1M
0
0
0
5
10
15
20
25
30
35
40
10
100
1k
10k
SUPPLY VOLTAGE – Volts
FREQUENCY – Hz
Figure 22. Output Swing vs. Supply Voltage
Figure 19. Output Im pedance vs. Frequency
5.0
2.0
1.5
1.0
0.5
0
5
VS = +5.0V
V
= +5V
= +25°C
= +1
S
T
A
4
3
2
1
0
A
V
4.5
4.0
3.5
3.0
ƒ = 1kHz
THD+N = 1%
+SWING
RL= 2kΩ
–SWING
RL= 2kΩ
+SWING
RL= 600Ω
–SWING
RL= 600Ω
–75
–50
–25
0
25
50
75
100
125
1
10
100
1k
10k
100k
LOAD RESISTANCE – Ω
TEMPERATURE –
°
C
Figure 20. Maxim um Output Voltage vs. Load Resistance
Figure 23. Output Swing vs. Tem perature and Load
6
2.0
V
= +5V
V
= +5V
S
S
R
T
= 2kΩ
+0.5V ≤ V
≤ +4.0V
L
OUT
5
4
3
= +25°C
= +1
A
A
V
1.5
1.0
0.5
0
+SLEW RATE
–SLEW RATE
2
1
0
1k
10k
100k
1M
10M
–75
–50
–25
0
25
50
75
100
125
FREQUENCY – Hz
TEMPERATURE – °C
Figure 21. Maxim um Output Swing vs. Frequency
Figure 24. Slew Rate vs. Tem perature
–6–
REV. D
SSM2135
5
4
3
2
1
0
20
18
16
14
12
10
8
V
V
= +5.0V
= 3.9V
S
O
R
R
= 2kΩ
L
V
= ±18V
S
V
= ±15V
S
V
= +5.0V
S
= 600Ω
L
6
4
2
0
–75
–50
–25
0
25
50
75
100
125
–75
–50
–25
0
25
50
75
100
125
TEMPERATURE – °C
TEMPERATURE – °C
Figure 25. Open-Loop Gain vs. Tem perature
Figure 27. Supply Current vs. Tem perature
70
65
60
55
50
5
4
3
2
1
500
400
V
= +5V
S
V
= +5.0V
S
GBW
300
200
100
0
V
= ±15V
S
θm
–75
–50
–25
0
25
50
75
100
125
–75
–50
–25
0
25
50
75
C
100
125
TEMPERATURE –
°
C
TEMPERATURE –
°
Figure 26. Gain Bandwidth Product and Phase Margin vs.
Tem perature
Figure 28. Input Bias Current vs. Tem perature
AP P LICATIO N INFO RMATIO N
T he SSM2135 is fully protected from phase reversal for inputs
going to the negative supply rail. However, an internal ESD
protection diodes will turn “on” when either input is forced
more than 0.5 V below the negative rail. Under this condition,
input current in excess of 2 mA may cause erratic output
behavior, in which case a current limiting resistor should be
included in the offending input if phase integrity is required
with excessive input voltages. A 500 Ω or higher series input
resistor will prevent phase inversion even with the input pulled 1
volt below the negative supply.
T he SSM2135 is a low voltage audio amplifier that has
exceptionally low noise and excellent sonic quality even when
driving loads as small as 25 Ω. Designed for single supply use,
the SSM2135’s inputs common-mode and output swing to zero
volts. T hus with a supply voltage at +5 V, both the input and
output will swing from 0 V to +4 V. Because of this, signal
dynamic range can be optimized if the amplifier is biased to a
+2 V reference rather than at half the supply voltage.
T he SSM2135 is unity-gain stable, even when driving into a fair
amount of capacitive load. Driving up to 500 pF does not cause
any instability in the amplifier. However, overshoot in the
frequency response increases slightly.
“Hot” plugging the input to a signal generally does not present a
problem for the SSM2135, assuming the signal does not have
any voltage exceeding the device’s supply voltage. If so, it is
advisable to add a series input resistor to limit the current, as
well as a Zener diode to clamp the input to a voltage no higher
than the supply.
T he SSM2135 makes an excellent output amplifier for +5 V
only audio systems such as a multimedia workstation, a CD
output amplifier, or an audio mixing system. T he amplifier has
large output swing even at this supply voltage because it is
designed to swing to the negative rail. In addition, it easily
drives load impedances as low as 25 Ω with low distortion.
REV. D
–7–
SSM2135
AP P LICATIO N CIRCUITS
A Low Noise Micr ophone P r eam plifier
A Low Noise Ster eo H eadphone D r iver Am plifier
Figure 29 shows the SSM2135 used in a stereo headphone
driver for multimedia applications with the AD1848, a 16-bit
stereo codec. T he SSM2135 is equally well suited for the serial-
bused AD1849 stereo codec. T he headphone’s impedance can
be as low as 25 Ω, which covers most commercially available high
fidelity headphones. Although the amplifier can operate at up to
±18 V supply, it is just as efficient powered by a single +5 V. At
this voltage, the amplifier has sufficient output drive to deliver
distortion-free sound to a low impedance headphone.
T he SSM2135’s 4.7 nV/√Hz input noise in conjunction with
low distortion makes it an ideal device for amplifying low level
signals such as those produced by microphones. Figure 31 illus-
trates a stereo microphone input circuit feeding a multimedia
sound codec. As shown, the gain is set at 100 (40 dB), although
it can be set to other gains depending on the microphone output
levels. Figure 32 shows the preamplifier’s harmonic distortion
performance with 1 V rms output while operating from a single
+5 V supply.
T he SSM2135 is biased to 2.25 V by the VREF pin of the
AD1848 codec. T he same voltage is buffered by the 2N4124
transistor to provide “phantom power” to the microphone. A
typical electret condenser microphone with an impedance range
of 100 Ω to 1 kΩ works well with the circuit. T his power booster
circuit may be omitted for dynamic microphone elements.
10kΩ
8.66kΩ
40
L
OUT
35/36
2
3
470µF
+5V
V
CC
1
0.1µF
34/37
32
1/2
SSM2135
10µF
GND
L CH
R CH
V
REF
10kΩ
0.1µF
10µF
8
4
0.1µF
7
+5V
5
6
AGND
10µF
AD1848
100Ω
L CHANNEL
MIC IN
2
3
8
1/2
SSM2135
470µF
29
1
10µF
LMIC
1/2
SSM2135
35/36
+5V
V
4
CC
8.66kΩ
10kΩ
41
2kΩ
10kΩ
R
OUT
0.1µF
34/37
32
+5V
GND
2N4124
V
REF
Figure 29. A Stereo Headphone Driver for Multim edia
Sound Codec
10µF
R CHANNEL
MIC IN
0.1µF
AD1848
RMIC
10kΩ
2kΩ
5
6
Figure 30 shows the total harmonic distortion characteristics
versus frequency driving into a 32 Ω load, which is a very typical
impedance for a high quality stereo headphone. T he SSM2135
has excellent power supply rejection, and as a result, is tolerant
of poorly regulated supplies. However, for best sonic quality, the
power supply should be well regulated and heavily bypassed to
minimize supply modulation under heavy loads. A minimum of
10 µF bypass is recommended.
28
7
10µF
1/2
SSM2135
100Ω
10kΩ
Figure 31. Low Noise Microphone Pream p for Multim edia
Sound Codec
Figure 32. MIC Pream p THD+N Perform ance (VS = +5 V,
AV = 40 dB, VOUT = 1 V rm s, with 80 kHz Low-Pass Filter)
Figure 30. Headphone Driver THD+N vs. Frequency into a
32 Ω Load (VS = +5 V, with 80 kHz Low-Pass Filter)
–8–
REV. D
SSM2135
An 18-Bit Ster eo CD -D AC O utput Am plifier
A Single Supply D iffer ential Line Receiver
T he SSM2135 makes an ideal single supply stereo output
amplifier for audio D/A converters because of its low noise and
distortion. Figure 33 shows the implementation of an 18-bit ste-
reo DAC channel. T he output amplifier also provides low-pass
filtering for smoothing the oversampled audio signal. T he filter’s
cutoff frequency is set at 22.5 kHz and it has a maximally flat
response from dc to 20 kHz.
Receiving a differential signal with minimum distortion is
achieved using the circuit in Figure 35. Unlike a difference
amplifier (a subtractor), the circuit has a true balanced input
impedance regardless of input drive levels. T hat is, each input
always presents a 20 kΩ impedance to the source. For best
common-mode rejection performance, all resistors around the
differential amplifier must be very well matched. Best results
can be achieved using a 10 kΩ precision resistor network.
As mentioned above, the amplifier’s outputs can drive directly
into a stereo headphone that has impedance as low as 25 Ω with
no additional buffering required.
10kΩ
+5V
10µF+0.1µF
+5V SUPPLY
20kΩ
1/2
SSM2135
2
3
8
1
18-BIT
DAC
VBL
VL
LL
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1/2
8
4
220µF
47kΩ
3
2
LEFT
CHANNEL
OUTPUT
10kΩ
DIFFERENTIAL
AUDIO IN
SSM2135
4
1
20kΩ
18-BIT
SERIAL
REG.
7.68kΩ
9.76kΩ
DL
CK
DR
LR
VOL
330pF
20kΩ
6
5
VREF
10µF
10Ω
7
AUDIO
OUT
7.68kΩ
7.68kΩ
100pF
AGND
AD1868
1/2
SSM2135
+5V
18-BIT
SERIAL
REG.
VREF
2.0V
1µF
VOR
VS
7.5kΩ
DGND
VBR
3
2
8
1
+5V
100pF
7
100Ω
7.68kΩ
9.76kΩ
18-BIT
DAC
220µF
47kΩ
6
5
RIGHT
CHANNEL
OUTPUT
330pF
5kΩ
4
0.1µF
1/2
1/2
SSM2135
SSM2135
2.5kΩ
Figure 33. +5 V Stereo 18-Bit DAC
A Single Supply D iffer ential Line D r iver
Signal distribution and routing is often required in audio
systems, particularly portable digital audio equipment for
Figure 35. Single Supply Balanced Differential Line
Receiver
A P seudo-Refer ence Voltage Gener ator
professional applications. Figure 34 shows a single supply line
driver circuit that has differential output. T he bottom amplifier
provides a 2 V dc bias for the differential amplifier in order to
maximize the output swing range. T he amplifier can output a
maximum of 0.8 V rms signal with a +5 V supply. It is capable
of driving into 600 Ω line termination at a reduced output
amplitude.
For single supply circuits, a reference voltage source is often
required for biasing purposes or signal offsetting purposes. T he
circuit in Figure 36 provides a supply splitter function with low
output impedance. T he 1 µF output capacitor serves as a charge
reservoir to handle a sudden surge in demand by the load as
well as providing a low ac impedance to it. T he 0.1 µF feedback
capacitor compensates the amplifier in the presence of a heavy
capacitive load, maintaining stability.
1kΩ
T he output can source or sink up to 12 mA of current with
+5 V supply, limited only by the 100 Ω output resistor. Reduc-
ing the resistance will increase the output current capability.
Alternatively, increasing the supply voltage to 12 V also
improves the output drive to more than 25 mA.
+5V
10µF+0.1µF
2
8
1
100µF
3
AUDIO
IN
1/2
4
DIFFERENTIAL
AUDIO OUT
SSM2135
1kΩ
1kΩ
+
V
= +5V → +12V
S
R3
2.5kΩ
6
5
7
10kΩ
C1
0.1µF
1/2
SSM2135
2.0V
2.5kΩ
R1
5kΩ
+5V
8
+5V
7.5kΩ
2
R4
100Ω
0.1µF
100Ω
+
8
2
3
1/2
SSM2135
V
S
1
OUTPUT
1
2
C2
3
1µF
4
1/2
SSM2135
1µF
R2
5kΩ
4
5kΩ
Figure 36. Pseudo-Reference Generator
Figure 34. Single Supply Differential Line Driver
REV. D
–9–
SSM2135
A D igital Volum e Contr ol Cir cuit
A Logar ithm ic Volum e Contr ol Cir cuit
Working in conjunction with the AD7528/PM7528 dual 8-bit
D/A converter, the SSM2135 makes for an efficient audio
attenuator, as shown in Figure 37. T he circuit works off a single
+5 V supply. T he DAC’s are biased to a 2 V reference level
which is sufficient to keep the DAC’s internal R-2R ladder
switches operating properly. T his voltage is also the optimal
midpoint of the SSM2135’s common-mode and output swing
range. With the circuit as shown, the maximum input and
output swing is 1.25 V rms. T otal harmonic distortion measures
a respectable 0.01% at 1 kHz and 0.1% at 20 kHz. T he fre-
quency response at any attenuation level is flat to 20 kHz.
Figure 38 shows a logarithmic version of the volume control
function. Similar biasing is used. With an 8-bit bus, the
AD7111 provides an 88.5 dB attenuation range. Each bit
resolves a 0.375 dB attenuation. Refer to AD7111 data sheet for
attenuation levels for each input code.
+5V
0.1µF
+5V
10µF+0.1µF
3
14
16
FB
OUTA
1
2
2
3
47µF
10
8
47µF
DGND
V
15
DD
1
L AUDIO
IN
L AUDIO
OUT
V
IN
1/2
AGND
AD7111
SSM2135
4
Each DAC can be controlled independently via the 8-bit parallel
data bus. T he attenuation level is linearly controlled by the
binary weighting of the digital data input. T otal attenuation
ranges from 0 dB to 48 dB.
+5V
0.1µF
1/2
SSM2135
3
14
16
47µF
15
6
5
1
2
47µF
FB
OUTA
DGND
V
DD
R AUDIO
IN
7
R AUDIO
OUT
V
IN
AGND
AD7111
2kΩ
3
10
10
+5V
AD/PM-7528
+5V
10µF+0.1µF
0.1µF
DATA IN &
CONTROL
+5V
8
2
3
2
2
3
4
8
7.5kΩ
5kΩ
FB
OUTA
47µF
100Ω
L AUDIO
IN
1
REF A
1
L AUDIO
OUT
2.0V
1µF
47µF
4
1/2
DAC A
4
SSM2135
1/2
SSM2135
DATA IN
6
DACA/
19
DACB
CS
Figure 38. Single Supply Logarithm ic Volum e Control
CONTROL
SIGNAL
15
16
1/2
SSM2135
WR
6
5
20
1
18
47µF
FB
OUTB
47µF
R AUDIO
IN
REF B
7
R AUDIO
OUT
DAC B
2kΩ
V
DGND
DD
+5V
0.1µF
17
5
+5V
8
0.1µF
2
7.5kΩ
100Ω
1
2.0V
3
2.0V
+5V
4
1µF
5kΩ
1/2
SSM2135
Figure 37. Digital Volum e Control
–10–
REV. D
SSM2135
* CMRR ST AGE & POLE AT 6 kHZ
SP ICE MACRO MO D EL
ECM
CCM
RCM1 50
50
50
4
POLY(2)
26.5E–12
1E6
3
60
2
60
0
1.6 1.6
*
*
SSM2135 SPICE Macro-Model
9/92, Rev. A
JCB/ADI
51
51
4
*Copyright 1993 by Analog Devices, Inc.
*
RCM2 51
1
*
*
*Node Assignments
*
OUT PUT ST AGE
R12 37 36 1E3
R13 38 36 500
*
*
*
*
*
Noninverting Input
Inverting Input
Positive Supply
Negative Supply
C4 37
6
20E–12
C5 38 39 20E–12
Output
M1 39 36 4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9
M2 45 36 4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9
.SUBCKT SSM2135
3
2
7
4
6
5
39 47 DX
*
D6 47 45 DX
* INPUT ST AGE
Q3 39 40 41 QPA 8
R3
R4
C1
I1
4
4
19
7
2
19
20
20
18
3
1.5E3
1.5E3
5.311E–12
106E–6
VB
R14 7 41 375
Q4 41 43 QNA 1
R17 7 43 15
7
40 DC 0.861
7
IOS
25E–09
Q5 43 39
Q6 46 45
6
6
15
4
QNA 20
QPA 20
EOS 12
5
3
12
2
1
1
2
2
3
POLY(1)
51
4
25E–06
1
Q1
Q2
CIN
D1
19
20
3
18
18
PNP1
PNP1
R18 46
4
Q7 36 46
QNA 1
3E–12
DY
DY
22
25
28
M3
*
6
36 4 4 MN L=9E–6 W=2000E–6 AD=30E–9 AS=30E–9
3
D2
2
* NONLINEAR MODELS USED
EN
GN1
GN2
*
5
0
0
0
0
0
1
*
1E–5
1E–5
.MODEL DX D (IS=1E–15)
.MODEL DY D (IS=1E–15 BV=7)
.MODEL PNP1 PNP (BF=220)
* VOLT AGE NOISE SOURCE WIT H FLICKER NOISE
.MODEL DEN D(IS=1E–12 RS=1016 KF=3.278E–15 AF=1)
.MODEL DIN D(IS=1E–12 RS=100019 KF=4.173E–15 AF=1)
.MODEL QNA NPN(IS=1.19E–16 BF=253 VAF=193 VAR=15 RB=2.0E3
+ IRB=7.73E–6 RBM=132.8 RE=4 RC=209 CJE=2.1E–13 VJE=0.573
+ MJE =0.364 CJC=1.64E–13 VJC=0.534 MJC=0.5 CJS=1.37E–12
+ VJS=0.59 MJS=0.5 T F=0.43E–9 PT F=30)
DN1 21
DN2 22
VN1 21
22
23
0
DEN
DEN
DC 2
DC 2
VN2
*
0
23
* CURRENT NOISE SOURCE WIT H FLICKER NOISE
.MODEL QPA PNP(IS=5.21E–17 BF=131 VAF=62 VAR=15 RB=1.52E3
+ IRB=1.67E 5–RBM=368.5 RE=6.31 RC=354.4 CJE=1.1E–13
+ VJE=0.745 MJE=0.33 CJC=2.37E–13 VJC=0.762 MJC=0.4
+ CJS=7.11E–13 VJS=0.45 MJS=0.412 T F=1.0E–9 PT F=30)
.MODEL MN NMOS(LEVEL=3 VTO=1.3 RS=0.3 RD=0.3 TOX=8.5E–8
+ LD=1.48E–6WD=1E–6 NSUB=1.53E16UO=650 DELTA= 10VMAX=2E5
+ XJ=1.75E–6 KAPPA=0.8 ETA=0.066 THET A=0.01T PG=1 CJ=2.9E–4
+ PB=0.837 MJ=0.407 CJSW=0.5E–9 MJSW=0.33)
*
DN3 24
DN4 25
VN3 24
25
26
0
DIN
DIN
DC 2
DC 2
VN4
*
0
26
* SECOND CURRENT NOISE SOURCE
DN5 27
DN6 28
VN5 27
28
29
0
DIN
DIN
DC 2
DC 2
.ENDS SSM-2135
VN6
*
0
29
* GAIN ST AGE & DOMINANT POLE AT .2000E+01 HZ
G2
R7
V3
D4
VB2
*
34
34
35
36
34
36
36
4
35
4
19
39E+06
DC
DX
1.6
20 2.65E–04
6
* SUPPLY/2 GENERAT OR
ISY
R10
R11
C3
*
7
7
60
60
4
60
4
0.2E–3
40E+3
40E+3
1E–9
0
REV. D
–11–
SSM2135
O UTLINE D IMENSIO NS
D imensions shown in inches and (mm).
8-Lead P lastic D IP (N-8)
8
5
4
0.280 (7.11)
0.240 (6.10)
1
0.070 (1.77)
0.045 (1.15)
0.430 (10.92)
0.348 (8.84)
0.325 (8.25)
0.300 (7.62)
0.015
0.210
(5.33)
MAX
0.195 (4.95)
0.115 (2.93)
(0.381) TYP
0.130
(3.30)
MIN
0.015 (0.381)
0.008 (0.204)
0.160 (4.06)
0.115 (2.93)
SEATING
0°- 15°
0.100
(2.54)
BSC
0.022 (0.558)
0.014 (0.356)
PLANE
8-Lead Narrow-Body (SO -8)
8
1
5
0.2440 (6.20)
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
4
0.0196 (0.50)
0.0099 (0.25)
0.1968 (5.00)
0.1890 (4.80)
× 45°
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
0°- 8°
0.0500 (1.27)
0.0160 (0.41)
0.0098 (0.25)
0.0075 (0.19)
0.0192 (0.49)
0.0138 (0.35)
0.0500 (1.27) BSC
SEATING
PLANE
–12–
REV. D
相关型号：
SSM2135SZ
DUAL OP-AMP, 2000 uV OFFSET-MAX, 3.5 MHz BAND WIDTH, PDSO8, ROHS COMPLIANT, PLASTIC, MS-012AA, SOIC-8
ROCHESTER
SSM2135SZ-REEL7
DUAL OP-AMP, 2000 uV OFFSET-MAX, 3.5 MHz BAND WIDTH, PDSO8, ROHS COMPLIANT, PLASTIC, MS-012AA, SOIC-8
ROCHESTER
SSM2139S
IC DUAL OP-AMP, 500 uV OFFSET-MAX, 30 MHz BAND WIDTH, PDSO16, SOL-16, Operational Amplifier
ADI
©2020 ICPDF网 联系我们和版权申明