AK7756VF [AKM]
DSP with Mono CODEC + Mic/Lineout Amp; DSP与单声道编解码器+麦克风/线路输出放大器
| 型号： | AK7756VF |
| 厂家： | 
ASAHI KASEI MICROSYSTEMS |
| 描述： | DSP with Mono CODEC + Mic/Lineout Amp |
| 文件： | 总27页 (文件大小：446K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
[AK7756]
AK7756
DSP with Mono CODEC + Mic/Lineout Amp
GENERAL DESCRIPTION
The AK7756 is a highly integrated digital signal processor, including a mono voice audio codec, a MIC
pre-amplifier and digital audio I/F. The audio DSP has 9216step at fs = 8kHz parallel processing power.
As the AK7756 is a RAM based DSP, it is programmable for user requirements such as hands free and
acoustic effect. The AK7756EN is available in a space saving small 28pin QFN package and the
AK7756VF is available in a 30pin VSOP package.
FEATURES
DSP
- Word length: 24bit (Data RAM 24bit floating point)
- Instruction cycle: 13.6 ns (9216 steps at fs=8 kHz)
- Multiplier 20 x 20 → 36bit (double precision available)
- Divider 20 / 20 → 20bit
- ALU: 36bit arithmetic operation (with overflow margin 4bit) 24bit floating point
arithmetic and logic operation
- Program RAM: 3072 x 36bit
- Coefficient RAM: 2048 x 20bit
- Data RAM: 1024 x 24-bit (24bit floating point)
- Delay RAM: 3072 x 20bit, 3072 x 20bit
- Master Clock: 4.6MHz ~ 73.7MHz
- JX pins (Interrupt)
Audio Serial I/F
- Master / Slave operation
- Right / Left justified and I2S
- PCM (Short / Long Frame)
- 16bit linear, 8bit A-law, 8bit µ-law
Mono CODEC
- Sampling Rate 8KHz, 16KHz
- DAC S/N: 91dB, S/(N+D): 83dB (fs:16kHz)
- ADC S/N: 86dB, S/(N+D): 77dB (fs:16kHz)
Microphone interface
- Differential or single-ended input
- Programmable Gain (+33dB ~ +15dB and 0dB, 3dB step)
- Low Noise Microphone Bias
Automatic Power Down (CODEC, DSP)
μP I/F : SPI, I2C-slave
I2C bootloader
Power supply
Analog (AVDD)
Digital1 (DVDD)
Digital2 (DVDD18)
: 3.0V ~ 3.6V (typ.3.3V)
: 3.0V ~ 3.6V (typ.3.3V)
: 1.7V ~ 1.9V (typ.1.8V)
Operating temperature range: -20°C ~ 85°C (AK7756EN), -40°C ~ 85°C (AK7756VF)
Package: 28pin QFN (AK7756EN)
30pin VSOP (AK7756VF)
MS1218-E-00-PB
2010/08
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[AK7756]
■ Block Diagram
MPRF
DVDD18
DVDD
VSS1
VSS2
VCOM
AVDD
PMMB
MICBIAS
AKM
DSP
Core
MIC Power
Supply
XTO
XTI
PLL
LFLT
BICK
I2S or
PCM
Interface
PMADC
Mic
AIN/INP
INN
SELDI2
LRCK
A/D
DIN2
DIN1
DOUT1
SDIN1
SDOUT1
JX0E
JX1E
SELDO1
JX0
JX1
JX0/SDIN2
JX1
WDT/
CRC
STO/RDY/SDOUT1
SELDO2
DOUT2
SDOUT2/RDY
EXTEEP/RQN
RDY
PMDAC
D/A
μP
Line Out
(I2C,SPI)/
EEPROM
(I2C)
AOUT
SCL/SCLK
SDA/SO
I2CSEL
DOUT3
Interface
I2CSEL pin
SI
EEST/SDOUT3/SI
EEST
SELDO3
PMOSC
OSC
Memory
IRSTN
Figure 1. Block Diagram
MS1218-E-00-PB
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[AK7756]
■ Ordering Guide
AK7756EN
AK7756VF
-20 ∼ +85°C
-40 ∼ +85°C
28pin QFN
30pin VSOP
AKD7756HFS
Evaluation Board for AK7756
■ Pin Layout
AK7756EN
21 20 19 18 17 16 15
MPRF
22
23
24
25
26
27
28
14
13
12
11
10
9
STO/RDY/SDOUT1
VCOM
VSS2
SDA/SO
SCL/SCLK
AVDD
EEST/SDOUT3/ SI
EXTEEP/RQN
JX0/SDIN2
SDOUT1
Top View
MICBIAS
INP/AIN
INN
8
1 2
3
4
5
6
7
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[AK7756]
AK7756VF
DVDD18
1
2
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
XTI
VSS1
XTO
DVDD
3
I2CSEL
LFLT
SDOUT1
4
JX0/SDIN2
5
INN
EXTEEP/RQN
6
INP/AIN
MICBIAS
AVDD
AVDD
VSS2
VCOM
AK7756VF
Top View
EEST/SDOUT3/SI
7
8
SCL/SCLK
SDA/SO
9
STO/RDY/SDOUT1
10
11
12
13
14
15
SDOUT2/RDY
NC
MPRF
AOUT
JX1
LRCK
BICK
SDIN1
IRSTN
MS1218-E-00-PB
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[AK7756]
■ DSP Block Diagram
DLRAM
Address
Pointer
DLP0, DLP1
DLRAM
CP0, CP1
DP0, DP1
DRAM
OFREG
CRAM
512w × 24-Bit
512w × 24-Bit
3072w x 20-Bit
3072w x 20-Bit
32w x 13-Bit
2048w x 20-Bit
CBUS(20-Bit)
DBUS(24-Bit)
µP I/F
MPX20
X
MPX20
Control
Serial I/F
PRAM
DEC
Y
3072w x 36-Bit
Multiply
20 x 20 → 36-Bit
PC
Stack: 5 level(max)
TMP 12 x 24-Bit
24-Bit
36-Bit
PTMP(LIFO) 6 x 24-Bit
MUL
DBUS
SHIFT
40-Bit
40-Bit
A
B
ALU
1 x 24-Bit
2 x 24-Bit
DIN2 (ADC or SDIN2 pin)
DIN1
40-Bit
Overflow Margin: 4-Bit
40-Bit
∼
DR0
3
40-Bit
1 x 24-Bit
2 x 24-Bit
DOUT3 (DAC or SDOUT3pin)
DOUT2
Over Flow Data
Generator
DOUT1
2 x 24-Bit
Division 20÷20→20
Peak Detector
MS1218-E-00-PB
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[AK7756]
PIN/FUNCTION (AK7756EN)
Function
No. Pin Name
I/O
O
Output Pin for Loop Filter of PLL Circuit
1
LFLT
This pin must be connected to VSS2 with 8.2KΩ and 33nF in series.
Outputs “L” during initial reset.
2
3
4
5
6
7
8
I2CSEL
XTO
XTI
DVDD18
VSS1
DVDD
SDOUT1
JX0
I
O
I
-
-
-
O
I
μP Control Mode Select Pin
“H”: I2C, “L”: SPI
Master Clock Output Pin. Outputs Hi-Z during initial reset.
External Master Clock Input Pin
Digital Power Supply 2 Pin. 1.7 ∼ 1.9V
Ground Pin
Digital Power Supply 1 Pin. 3.0 ∼ 3.6V
Audio Serial Data Output1 Pin.
Outputs “L” during initial reset.
Conditional Jump Pin0
(JXOE bit = “1”)
9
SDIN2
I
Audio Serial Data Input 2 Pin (JXOE bit = “0”)
Start to Download from external EEPROM (I2CSEL pin = “H” : I2C Bus Mode)
“H”: start download (download from external memory)
“L”: normal operation
EXTEEP
RQN
I
I
10
μP I/F Write Request Pin (I2CSEL pin = “L” : SPI Mode)
When initial reset and μP I/F are not in use, leave the RQN pin High level.
EEPROM download busy output (I2CSEL pin = “H” and SELDO3 bit = “0”)
H: Download is busy. L: download is complete.
Outputs “L” during initial reset.
Audio Serial Data Output Pin3 (I2CSEL pin = “H” and SELDO3 bit = “1”)
Outputs “L” during initial reset.
Control Data Input Pin (I2CSEL pin = “L”: SPI Mode)
Control Data Clock Pin (I2CSEL pin = “H”: I2C Bus Mode)
Outputs Hi-Z during initial reset.
Control Data Clock Pin (I2CSEL pin = “L”: SPI Mode)
Set this pin to “H” when there are no clock inputs.
Control Data Input /Output Pin (I2CSEL pin = “H”: I2C Bus Mode)
Outputs Hi-Z during initial reset.
Control Data output Pin (I2CSEL pin = “L”: SPI Mode)
Outputs “L” during initial reset.
EEST
O
11
SDOUT3
SI
O
I
SCL
I
12
13
SCLK
SDA
SO
I
I/O
O
STO
RDY
SDOUT1
O
O
O
Status Output Pin
Data Write Ready Output Pin for μP Interface
Audio Serial Data Output Pin1
14
15
Outputs “H” during initial reset.
Audio Serial Data Output2 Pin
SDOUT2
RDY
O
O
Data Write Ready Output Pin for μP Interface
Outputs “L” during initial reset.
16 LRCK
17 BICK
18 SDIN1
I/O Audio channel select Pin
I/O Audio Serial Data Clock Pin
I
Audio Serial Data Input 1 Pin
Reset Pin (active low) The AK7756 must be reset once upon power-up.
“H”: Power-up, “L”: Initialize the control register.
Conditional Jump Pin1
19 IRSTN
I
20 JX1
I
21 AOUT
O
Analog Output Outputs. Outputs VSS2 during initial reset.
Output Pin for Ripple Filter of MICBIAS Circuit
Connect 1.0μF capacitor to VSS2. Outputs AVDD during initial reset.
22 MPRF
O
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[AK7756]
Analog Common Voltage Output Pin
23 VCOM
O
Connect 0.1μF and 2.2μF capacitor to VSS2. Outputs VSS2 during initial reset.
24 VSS2
25 AVDD
26 MICBIAS
-
-
O
I
I
I
Ground Pin
Analog Power Supply Pin 3.0 ∼ 3.6V
Microphone bias. Outputs Hi-Z during initial reset.
Single-ended Analog Input pin (MDIF bit = “0”)
Positive Microphone input pin (MDIF bit = “1”)
Negative Microphone input pin (MDIF bit = “1”)
AIN
INP
27
28 INN
Note 1. All digital input pins must not be left floating.
Note 2. DVDD or VSS1 voltage must be input to the I2CSEL pin.
Note 3. All analog input pins (INP/AIN, INN pins) must be supplied signal via AC-coupling capacitor.
Note 4. Analog output pins (AOUT pin) must deliver signal via AC-coupling capacitor
PIN/FUNCTION (AK7756VF)
No. Pin Name
I/O
Function
Digital Power Supply 2 Pin. 1.7 ∼ 1.9V
Ground Pin
Digital Power Supply 1 Pin. 3.0 ∼ 3.6V
Audio Serial Data Output1 Pin.
Outputs “L” during initial reset.
1
2
3
DVDD18
VSS1
DVDD
-
-
-
4
5
SDOUT1
O
JX0
SDIN2
I
I
Conditional Jump Pin0
(JXOE bit = “1”)
Audio Serial Data Input 2 Pin (JXOE bit = “0”)
Start to Download from external EEPROM (I2CSEL pin = “H” : I2C Bus Mode)
“H”: start download (download from external memory)
“L”: normal operation
μP I/F Write Request Pin (I2CSEL pin = “L” : SPI Mode)
When initial reset and μP I/F are not in use, leave the RQN pin High level.
EEPROM download busy output (I2CSEL pin = “H” and SELDO3 bit = “0”)
H: Download is busy. L: download is complete.
Outputs “L” during initial reset.
Audio Serial Data Output Pin3 (I2CSEL pin = “H” and SELDO3 bit = “1”)
Outputs “L” during initial reset.
Control Data Input Pin (I2CSEL pin = “L”: SPI Mode)
Control Data Clock Pin (I2CSEL pin = “H”: I2C Bus Mode)
Outputs Hi-Z during initial reset.
Control Data Clock Pin (I2CSEL pin = “L”: SPI Mode)
Set this pin to “H” when there are no clock inputs.
Control Data Input /Output Pin (I2CSEL pin = “H”: I2C Bus Mode)
Outputs Hi-Z during initial reset.
Control Data output Pin (I2CSEL pin = “L”: SPI Mode)
Outputs “L” during initial reset.
EXTEEP
RQN
I
I
6
7
EEST
O
SDOUT3
SI
O
I
SCL
I
8
9
SCLK
SDA
SO
I
I/O
O
STO
RDY
SDOUT1
O
O
O
Status Output Pin
Data Write Ready Output Pin for μP Interface
10
11
Audio Serial Data Output Pin1
Outputs “H” during initial reset.
Audio Serial Data Output2 Pin
Data Write Ready Output Pin for μP Interface.
Outputs “L” during initial reset.
No Connect Pin.
SDOUT2
RDY
O
O
12 NC
-
This pin must be connected to VSS1.
MS1218-E-00-PB
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[AK7756]
13 LRCK
14 BICK
15 SDIN1
I/O Audio channel select Pin
I/O Audio Serial Data Clock Pin
I
Audio Serial Data Input 1 Pin
Reset Pin (active low) The AK7756VF must be reset once upon power-up.
“H”: Power-up, “L”: Initialize the control register.
Conditional Jump Pin1
16 IRSTN
I
17 JX1
I
18 AOUT
O
Analog Output Outputs. Outputs VSS2 during initial reset.
Output Pin for Ripple Filter of MICBIAS Circuit
Connect 1.0μF capacitor to VSS2. Outputs AVDD during initial reset.
Analog Common Voltage Output Pin
19 MPRF
20 VCOM
O
O
Connect 0.1μF and 2.2μF capacitor to VSS2. Outputs VSS2 during initial reset.
21 VSS2
-
-
-
O
I
I
Ground Pin
Analog Power Supply Pin 3.0 ∼ 3.6V
Analog Power Supply Pin 3.0 ∼ 3.6V
Microphone bias. Outputs Hi-Z during initial reset.
Single-ended Analog Input pin (MDIF bit = “0”)
Positive Microphone input pin (MDIF bit = “1”)
Negative Microphone input pin (MDIF bit = “1”)
Output Pin for Loop Filter of PLL Circuit
22 AVDD
23 AVDD
24 MICBIAS
AIN
INP
25
26 INN
I
27 LFLT
O
This pin must be connected to VSS2 with 8.2KΩ and 33nF in series.
Outputs “L” during initial reset.
μP Control Mode Select Pin
Master Clock Output Pin. Outputs Hi-Z during initial reset.
External Master Clock Input Pin
28 I2CSEL
29 XTO
30 XTI
I
O
I
“H”: I2C, “L”: SPI
Note 1. All digital input pins must not be left floating.
Note 2. DVDD or VSS1 voltage must be input to the I2CSEL pin.
Note 3. All analog input pins (INP/AIN, INN pins) must be supplied signal via AC-coupling capacitor.
Note 4. Analog output pins (AOUT pin) must deliver signal via AC-coupling capacitor
■ Handling of Unused Pin
The unused I/O pins must be processed appropriately as below.
Classification
Analog
Pin Name
Setting
These pins must be open.
MICBIAS, INP/AIN, INN, AOUT, MPRF
SDOUT1, STO/RDY/SDOUT1, SDOUT2/RDY,
SDOUT3/EEST/ SI, XTO
These pins must be open.
Digital
EXTEEP/RQN, SDIN1, XTI, JX0/SDIN2, JX1
These pins must be connected to VSS1.
MS1218-E-00-PB
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[AK7756]
ABSOLUTE MAXIMUM RATINGS
(VSS1=VSS2=0V; Note 5)
Parameter
Power Supplies: Analog
Digital 1
Symbol
min
−0.3
−0.3
−0.3
-0.3
-
−0.3
−0.3
−20
−40
−65
max
4.3
4.3
2.5
0.3
Units
V
V
V
V
AVDD
DVDD
DVDD18
ΔGND
IIN
VINA
VIND1
Ta
Digital 2
Difference(VSS1~VSS2)
Input Current, Any Pin Except Supplies
Analog Input Voltage (Note 6)
Digital Input Voltage (Note 7)
mA
V
V
°C
°C
°C
±10
(AVDD+0.3) or 4.3
(DVDD+0.3) or 4.3
AK7756EN
AK7756VF
85
85
150
Ambient Temperature (powered applied)
Ta
Tstg
Storage Temperature
Note 5. All voltages with respect to ground. VSS1 and VSS2 must be the same voltage.
Note 6. INP/AIN, INN pins
Note 7. IRSTN, I2CSEL, EXTEEP, SI/EEST, SDA/SO, SCL/SCLK, JX1, JX0, SDIN1, LRCK, and BICK pins
Note 8.Pull-up resistors at SDA and SCL pins must be connected to the DVDD voltage or less.
Do not turn off the power supplies when the SDA and SCL pins are pulled-up to DVDD.
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS
(VSS1=VSS2=0V; Note 5)
Parameter
Symbol
min
typ
max
Units
Power Supplies
(Note 9)
Analog
Digital
Digital
AVDD
DVDD
DVDD18
3.0
3.0
1.7
3.3
3.3
1.8
0
3.6
3.6
1.9
V
V
V
V
Difference1
AVDD – DVDD
-0.3
+0.3
Note 5. All voltages with respect to ground. VSS1 and VSS2 must be the same voltage.
Note 9. The power-up sequence between AVDD, DVDD and DVDD18 is not critical. But all power supplies must be
ON before starting operation of the AK7756.
* AKM assumes no responsibility for the usage beyond the conditions in this datasheet.
MS1218-E-00-PB
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[AK7756]
ANALOG CHARACTERISTICS (CODEC)
■ ADC Characteristics
(Ta=25ºC; AVDD=DVDD=3.3V, DVDD18=1.8V; VSS1=VSS2=0V; BICK=64fs; Signal Frequency 1kHz;
Measurement frequency =20Hz~8 kHz, fs=16 kHz, CKM mode 6, unless otherwise specified.)
Parameter
min
typ
max
Units
MIC Input Programmable Gain Amplifier
Input Resistance (INP, INN pins)
(MGAIN = 0dB)
22.5
30
37.5
kΩ
Gain
Min (MGAIN2-0 bit = “0H”)
Max (MGAIN2-0 bit = “7H”)
Step size (MGAIN2-0bit = “1H” ~ “7H”)
Microphone Bias Supply: MICBIAS pin
Bias Output Voltage (Note 10)
Load Resistance
-
-
0
+33
3
-
-
dB
dB
dB
2.32
-
-
V
kΩ
pF
2.0
-
-
30
24
Load Capacitance
Mono
ADC
Resolution
Dynamic Characteristics
Bits
AIN pin→ Mono ADC→ SDOUT1
MGAIN=21dB
72
77
77
86
77
86
dB
dB
dB
S/(N+D) (-1dBFS)
Dynamic Range
S/N
MGAIN= 0dB
MGAIN=21dB
MGAIN= 0dB
MGAIN=21dB
MGAIN= 0dB
69
78
78
Microphone Analog Inputs INP,INN (Note 11)
Differential
MGAIN= 0dB
±2.0
2.0
±2.2
2.2
±2.4
2.4
Vpp
VPP
Full-scale Input
Voltage
Single-ended MGAIN= 0dB
Note 10. The output voltage is proportional to AVDD. Vmic bias=0.70 * AVDD, Iout=1mA
Note 11. The input voltage is proportional to AVDD. Vin=0.67 x AVDD (typ.) @MGAIN = 0dB
MS1218-E-00-PB
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[AK7756]
■ DAC Characteristics
(Ta=25ºC; AVDD=DVDD=3.3V, DVDD18=1.8V; VSS1=VSS2=0V; BICK=64fs; Signal frequency 1 kHz;
Measurement frequency=20Hz~8 kHz, fs=16 kHz, CKM mode 6, unless otherwise specified.)
Parameter
min
typ
max
Unit
Mono
DAC
Resolution
Dynamic Characteristics; Mono DAC→AOUT pin
24
Bits
S/(N+D)
S/N
(0dBFS)
75
83
83
91
dB
dB
Analog Output
Full-scale Output Voltage (Note 12)
Load Resistance
Load Capacitance
2.09
10
2.2
2.31
30
Vpp
kΩ
pF
Note 12. Full scale output voltage. The output voltage is proportional to AVDD. Vout=0.67 x AVDD (typ.)
MS1218-E-00-PB
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[AK7756]
DC CHARACTERISTICS
(Ta=Tmin~Tmax; AVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V; VSS1=VSS2=0V)
Parameter
Symbol
VIH
VIL
VIH
VIL
VOH
VOL
VOL
Iin
min
80%DVDD
typ
max
Unit
V
V
V
V
V
V
V
μA
μA
High level input voltage
Low level input voltage
(Note 13)
(Note 13)
20%DVDD
30%DVDD
SCL, SDA High level input voltage
SCL, SDA Low level input voltage
High level output voltage: Iout=-100μA (Note 14)
Low level output voltage: Iout=100μA (Note 14)
SDA Low level output voltage Iout=3mA
70%DVDD
DVDD-0.4
0.4
0.4
±10
Input leak current
(Note 15)
Input leak current XTI pin
Iix
26
Note 13. Except for the SCL/SCLK, SDA/SO pins.
Note 14. Except for the SDA/SO pin.
Note 15. Except for the XTI pin.
POWER CONSUMPTION
(Ta=25ºC; AVDD=DVDD=3.3V; DVDD18=1.8V; VSS1=VSS2=0V, fin=1 KHz, 24 bit, fs=8 KHz (CKM mode = 0),
DSPS=BITFS=PMOSC bits= “0” PMMB bit=“1”, DSP running with programmed connecting DIN2 with DOUT1 and
DIN1 with DOUT3.)
Parameter
min
typ
max
Units
Power Supplies: (Note 16)
Power-Up (IRSTN pin = “H”) CODEC+DSP
All Circuit Power-up
AVDD+DVDD
DVDD18
Power Consumption
AVDD+DVDD
DVDD18
11.0
6
47
-
-
mA
mA
mW
mA
mA
AVDD=DVDD=3.3V
DVDD18=1.8V
15
60
AVDD=DVDD=3.6V
DVDD18=1.9V
Reset (IRSTN pin = “L”), Power-down condition (Note 17, Note 18)
AVDD+DVDD
DVDD18
-
1
3
10
200
μA
μA
Note 16. The Consumption of DVDD18 depends on the master clock frequency and the step size of the DSP program.
(BITFS bit = “2h” and DSPS bit = “0”)
Note 17. All digital input pins are fixed to each supply pin (DVDD or VSS1).
Note 18. The condition of maximum values specifies Ta=Tmin~Tmax, AVDD=DVDD=3.0~3.6V and
DVDD18=1.7~1.9V.
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[AK7756]
DIGITAL FILTER CHARACTERISTICS
■ ADC Block
1. fs=8kHz
(Ta= Tmin~Tmax, AVDD= DVDD=3.0~3.6V, DVDD18=1.7~1.9V, VSS1=VSS2=0V; fs=8 kHz)
Parameter
Passband (±0.1dB) (Note 19, Note 20)
Symbol
min
0
typ
max
3.15
Unit
kHz
kHz
kHz
kHz
dB
dB
μs
Ts
PB
(-0.02dB)
(-3.0dB)
3.63
3.83
Stopband
Passband Ripple
SB
PR
SA
ΔGD
GD
4.66
68
(Note 20)
±0.1
0
Stopband Attenuation (Note 21, Note 22)
Group Delay Distortion
Group Deley
(Ts=1/fs)
16
Note 19. The characteristic of the high pass filter is not included.
Note 20. The passband is from DC to 3.15kHz
Note 21. The stopband is 4.66kHz to 507.34kHz.
Note 22. The analog modulator samples the input signal at 512kHz.
2. fs=16kHz
(Ta= Tmin~Tmax, AVDD= DVDD=3.0~3.6V, DVDD18=1.7~1.9V, VSS1=VSS2=0V; fs=16 kHz)
Parameter
Passband (±0.1dB) (Note 23, Note 24)
Symbol
min
0
typ
max
6.3
Unit
kHz
kHz
kHz
kHz
dB
dB
μs
Ts
PB
(-0.02dB)
(-3.0dB)
7.26
7.66
Stopband
Passband Ripple
SB
PR
SA
ΔGD
GD
9.32
68
(Note 24)
±0.1
0
Stopband Attenuation (Note 25,Note 26)
Group Delay Distortion
Group Deley
(Ts=1/fs)
16
Note 23. The characteristic of the high pass filter is not included.
Note 24. The passband is from DC to 6.3kHz
Note 25. The stopband is 9.32kHz to 1014.68kHz.
Note 26. The analog modulator samples the input signal at 1024kHz.
MS1218-E-00-PB
2010/08
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[AK7756]
■ DAC Block
1. fs=8kHz
(Ta= Tmin~Tmax, AVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V; VSS1=VSS2=0V; fs=8 kHz)
Parameter
Passband (±0.05dB)
Symbol
min
0
typ
max
3.62
Unit
kHz
kHz
kHz
dB
(Note 27)
PB
(-6.0dB)
4
Stopband
(Note 27)
SB
PR
SA
GD
4.37
64
Passband Ripple
±0.01
Stopband Attenuation
Group Delay (Ts=1/fs)
Digital Filter + Analog Filter
Amplitude characteristic
dB
Ts
(Note 28)
24
20Hz~3.5kHz
±0.5
dB
Note 27. Pass band and stop band parameters are related to sampling frequency (fs). PB=0.4535fs (at-0.05dB),
SB=0.5465fs.
Note 28. The digital filter’s delay is calculated as the time from setting 16-bit data into the input register until an analog
signal is output.
2. fs=16kHz
(Ta= Tmin~Tmax, AVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V; VSS1=VSS2=0V; fs=16kHz)
Parameter
Passband (±0.05dB)
Symbol
min
0
typ
max
7.24
Unit
kHz
kHz
kHz
dB
(Note 27)
PB
(-6.0dB)
8
Stopband
(Note 27)
SB
PR
SA
GD
8.74
64
Passband Ripple
±0.01
Stopband Attenuation
Group Delay (Ts=1/fs)
Digital Filter + Analog Filter
Amplitude characteristic
dB
Ts
(Note 28)
24
20Hz~7.0kHz
±0.5
dB
MS1218-E-00-PB
2010/08
14
[AK7756]
SWITCHING CHARACTERISTICS
■ System Clock
(Ta= Tmin~Tmax, AVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V, VSS1=VSS2=0V, CL=20pF)
Parameter
Symbol
min
typ
max
Unit
Master operation
a) XTI/XTO with a X’tal, External Clock input
CKM[2:0]bits=6h(768x16KHz)
Duty Cycle
fXTI
11.0
40
12.288
50
12.4
60
MHz
%
Slave mode operation
LRCK Frequency
BICK Frequency
fs
8
16
1.1
60
kHz
MHz
%
fBICK
Duty
0.1
40
32fs/48fs/64fs
■ Reset
(Ta= Tmin~Tmax, AVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V; VSS1=VSS2=0V)
Parameter
Reset pulse width
(Note 29)
Symbol
tRST
min
600
typ
max
Unit
ns
Note 29. The IRSTN pin must be put to “H” after all power supplies are powered up.
MS1218-E-00-PB
2010/08
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[AK7756]
■ Digital Audio Interface (SDIN1, SDOUT1, 2)
1) SDIN1/2, SDOUT1/2/3
(Ta= Tmin~Tmax, AVDD=DVDD= 3.0V ~ 3.6V, DVDD18= 1.7V ~ 1.9V, VSS1=VSS2=0V, CL=20pF)
Parameter
Symbol
min
typ
max
Unit
I2S and PCM Interface Input Timing
Delay Time from BICK “↑” to LRCK (Note 30)
Delay Time from LRCK to BICK “↑” (Note 30)
Serial Data Input Latch Setup Time
tBLRD
tLRBD
tBSIDS
tBSIDH
20
20
80
80
ns
ns
ns
ns
Serial Data Input Latch Hold Time
Delay Time from LRCK to Serial Data Output (Note 31)
Delay Time from BICK “↓” or “↑”to LRCK Output
I2S and PCM Interface Output Timing SDOUT1/2
tLRD
tBSOD
80
80
ns
ns
BICK Frequency
BICK Duty cycle
Delay Time from BITCLK “↓” to LRCK Output
Serial Data Input Latch Setup Time
Serial Data Input Latch Hold Time
Delay Time from LRCK to Serial Data Output (Note 31)
Delay Time from BICK “↓” or “↑”to LRCK Output
Note 30. BICK edge must not occur at the same time as LRCK edge.
Note 31. Except I2S.
fBICK
64
50
fs
%
ns
ns
ns
ns
ns
tMBL
-20
80
80
40
tBSIDS
tBSIDH
tLRD
80
80
tBSOD
MS1218-E-00-PB
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[AK7756]
■ μP Interface (SPI mode)
(Ta= Tmin~Tmax; AVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V, VSS1=VSS2=0V; CL=20pF)
Parameter
Symbol
min
typ
max
Unit
μP Interface Timing (SPI mode)
RQN Fall Time
RQN Rise Time
SCLK Fall Time
SCLK Rise Time
tWRF
tWRR
tSF
30
30
30
30
2.1
ns
ns
ns
ns
MHz
ns
ns
ns
ns
μs
ns
tSR
SCLK Frequency
fSCLK
tSCLKL
tSCLKH
tWRQH
tRST1
tIRRQ
tWSC
tSCW
SCLK Low Level Width
SCLK High Level Width
RQN High Level Width
From RQN “↑” to IRSTN “↑”
From IRSTN “↑” to RQN “↓”
From RQN “↓” to SCLK “↓”
From SCLK “↑” to RQN “↑”
200
200
500
600
100
500
800
ns
SI Latch Setup Time
SI Latch Hold Time
tSIS
tSIH
200
200
ns
ns
AK7756 → μP
Delay Time from SCLK “↓”to SO Output
Hold Time from SCLK “↑” to SO Output (Note 32)
tSOS
tSOH
200
ns
ns
200
Note 32. Except when writing to the 8th bit of command code.
■ μP/EEPROM Interface (I2C BUS mode)
(Ta= Tmin~Tmax; AVDD=DVDD=3.0~3.6V, DVDD18=1.7~1.9V, VSS1=VSS2=0V; CL=20pF)
Parameter
Symbol
min
typ
max
Unit
I2C Timing
SCL clock frequency
Bus Free Time Between Transmissions
Start Condition Hold Time
(prior to first Clock pulse)
Clock Low Time
fSCL
tBUF
400
kHz
μs
1.3
0.6
tHD:STA
μs
1.3
0.6
0.6
0
tLOW
μs
μs
μs
μs
μs
μs
μs
μs
Clock High Time
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
Pulse Width of Spike Noise Suppressed
by Input Filter
0.9
0.1
0.3
0.3
tF
0.6
0
tSU:STO
tSP
Cb
50
ns
Capacitive load on bus
Note 33. I2C-bus is a trademark of NXP B.V.
400
pF
MS1218-E-00-PB
2010/08
17
[AK7756]
■ Timing Diagram
1/fXTI
1/fXTI
tXTI=1/fXTI
XTI
VIH
VIL
1/fs
1/fs
ts=1/fs
LRCK
VIH
VIL
1/fBICK
1/fBICK
tBICK=1/fBICK
VIH
VIL
BICK
tBICKH
tBICKL
Figure 2. System Clock
IRSTN
tRST
VIL
Figure 3. Reset Timing
Note 34. Set the IRSTN pin = “L” when power up and down the AK7756.
MS1218-E-00-PB
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[AK7756]
VIH
VIL
LRCK
tBLRD
tLRBD
VIH
VIL
BICK
tBSIDS
tBSIDH
VIH
VIL
SDIN1/2
Figure 4. Audio Interface (Slave Mode Input)
VIH
VIL
LRCK
tLRD
VIH
VIL
BICK
tBSOD
tLRD
tBSOD
50%VDD
SDOUT1/2/3
Figure 5. Audio Interface (Slave Mode Output)
MS1218-E-00-PB
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[AK7756]
50%DVDD
50%DVDD
LRCK
BICK
tMBL
tMBL
tBSIDS
tBSIDH
VIH
VIL
SDIN1/2
Figure 6. Audio Interface (Master Mode Input)
LRCK
50%DVDD
50%DVDD
50%DVDD
tLRD
BICK
tBSOD
tLRD
tBSOD
SDOUT1/2/3
Figure 7. Audio Interface (Master Mode Output)
MS1218-E-00-PB
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[AK7756]
VIH
VIL
RQN
tWRF
tSF
tWRR
tSR
VIH
VIL
SCLK
tSCLKL
1/fSCLK
tSCLKH
1/fSCLK
VIH
VIL
IRSTN
RQN
VIH
VIL
tRST1
tIRRQ
Figure 8. μP Interface 1 (SPI )
VIH
VIL
tWRQH
RQN
VIH
SI
VIL
VIH
VIL
tSIH
tSIS
SCLK
tWSC
tSCW
tWSC
tSCW
Figure 9. μP Interface 2 (SPI)
MS1218-E-00-PB
2010/08
21
[AK7756]
VIH
SCLK
SO
VIL
VIH
VIL
tSOH
tSOS
Figure 10. μP Interface 3 (SPI)
VIH
VIL
SDA
SCL
tLOW tR
tHIGH
tBUF
tF
tSP
VIH
VIL
tHD:STA
Stop Start
tHD:DAT
tSU:DAT tSU:STA
Start
tSU:STO
Stop
Figure 11. μP Interface (I2C Bus)
MS1218-E-00-PB
2010/08
22
[AK7756]
PACKAGE (AK7756EN)
28Pin QFN (Unit: mm)
3.10
5.0±0.07
21
15
14
22
A
28
1
8
7
B
M
0.05
S A B
C0.30
2.50
0.23±0.05
S
[Detail A]
A
0.05
S
0.5
0.18~0.28
Note: The exposed pad on the bottom surface of the package must be open or connected to the ground.
■ Package & Lead frame material
Package molding compound: Epoxy
Lead frame material: Cu
Lead frame surface treatment: Solder (Pb free) plate
MS1218-E-00-PB
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[AK7756]
PACKAGE (AK7756VF)
30Pin VSOP (Unit: mm)
9.70±0.10
30
16
1
15
0°~8˚
0.12
M
0.65
0.30
0.24±0.06
S
S
0.08
10.00MAX
■ Package & Lead frame material
Package molding compound: Epoxy
Lead frame material: Cu
Lead frame surface treatment: Solder (Pb free) plate
MS1218-E-00-PB
2010/08
24
[AK7756]
MARKING (AK7756EN)
7756
XXXX
1
XXXX : Date code identifier (4 digits)
MARKING (AK7756VF)
AKM
A K 77 56V F
XXXBYYYYC
1) AKM Logo
2) Marketing Code: AK7756VF
3) Pin #1 identification
4) Date Code: XXXBYYYYC
XXXB: Lot number (X: Digit number, B: Alpha character)
YYYYC: Assembly date (Y: Digit number, C: Alpha character)
MS1218-E-00-PB
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25
[AK7756]
REVISION HISTORY
Page Contents
Date (YY/MM/DD) Revision Reason
10/08/18 00 First Edition
IMPORTANT NOTICE
z These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei
Microdevices Corporation (AKM) or authorized distributors as to current status of the products.
z Descriptions of external circuits, application circuits, software and other related information contained in this
document are provided only to illustrate the operation and application examples of the semiconductor products.
You are fully responsible for the incorporation of these external circuits, application circuits, software and other
related information in the design of your equipments. AKM assumes no responsibility for any losses incurred by
you or third parties arising from the use of these information herein. AKM assumes no liability for infringement of
any patent, intellectual property, or other rights in the application or use of such information contained herein.
z Any export of these products, or devices or systems containing them, may require an export license or other official
approval under the law and regulations of the country of export pertaining to customs and tariffs, currency
exchange, or strategic materials.
z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or
other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use
approved with the express written consent by Representative Director of AKM. As used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to
result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system
containing it, and which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of
safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to
function or perform may reasonably be expected to result in loss of life or in significant injury or damage to
person or property.
z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise
places the product with a third party, to notify such third party in advance of the above content and conditions, and
the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from
any and all claims arising from the use of said product in the absence of such notification.
MS1218-E-00-PB
2010/08
26
[AK7756]
Thank you for your access to AKM products information.
More detail product information is available, please contact our
sales office or authorized distributors.
MS1218-E-00-PB
2010/08
27
相关型号：
AK7832AB
Audio Amplifier, 2W, 2 Channel(s), 1 Func, PBGA24, 2.50 X 2.50 MM, 0.50 MM PITCH, WLCSP-24
AKM
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