AKD4629-A [AKM]

Evaluation board Rev.1 for AK4629; 评估板Rev.1号为AK4629


型号：	AKD4629-A
厂家：	ASAHI KASEI MICROSYSTEMS
描述：	Evaluation board Rev.1 for AK4629 评估板Rev.1号为AK4629
文件：	总68页 (文件大小：1689K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

[AKD4629-A]

AKD4629-A

Evaluation board Rev.1 for AK4629

GENERAL DESCRIPTION

The AKD4629-A is an evaluation board for the AK4629, a single chip CODEC that includes four channels

of ADC and six channels of DAC. The AKD4629-A also has the digital audio interface and can achieve the

interface with digital audio systems via opt-connector or BNC connector.

Ordering guide

AKD4629-A

--- AK4629 Evaluation Board

(Cable for connecting with printer port of IBM-AT compatible PC

and control software are packed with this.) This control software can’t operate

on Windows NT.

FUNCTION

• On-board analog output buffer circuit

• Compatible with 2 types of interface

- AK4118 (DIT&DIR) with optical output/input and BNC output/input

- Direct interface with AC3 decoder by 10pin header

• 10pin header for serial control interface

-12V +12V

TVDD GND

AV DD DVDD

Regulator

+5V

LOUT1

ROUT1

+3.3V

LOUT2

ROUT2

LOUT3

Output

Buffer

BNC In

Opt In

AK4118

(DIT&DIR)

Opt Out

AK4629

ROUT3

LOUT4

ROUT4

BNC Out

AC3

10pin Header

LIN1+/LIN1

LIN1-

Control Data

10pin Header

LIN2+/LIN2

LIN2-

Figure 1 AKD4629-A Block Diagram

*Circuit diagram and PCB layout are attached at the end of this manual.

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Evaluation Board Manual

Operation sequence

1) Set up the power supply lines.

(1-1) In case of using separate power supply lines <Default>

Set up the jumper pins.

JP82

JP83

JP84

AVDD

DVDD

TVDD

REG JACK REG JACK REG JACK

Set up the power supply lines.

Name

+12V

-12V

AVDD Orange

DVDD Orange

TVDD

AGND

DGND

Color

Red

Voltage

+12V

-12V

+5V

Comments

Regulator, Power Supply for Op-amp

Power Supply for Op-amp

Power supply for AVDD of the AK4629

Power supply for DVDD of the AK4629

Power supply for TVDD of the AK4629

Analog ground

Attention

Should be connected.

Orange

Black

Digital ground

Table 1 Set up of power supply lines

(1-2) In case of using the regulator

Set up the jumper pins.

JP82

JP83

JP84

AVDD

DVDD

TVDD

REG JACK REG JACK REG JACK

Set up the power supply lines.

Name

+12V

-12V

AVDD Orange

DVDD Orange

TVDD

AGND

DGND

Color

Red

Voltage

+12V

-12V

+5V

Comments

Regulator, Power Supply for Op-amp

Power Supply for Op-amp

Power supply for AVDD of the AK4629

Power supply for DVDD of the AK4629

Power supply for TVDD of the AK4629

Analog ground

Attention

Should be connected.

Should be open.

Orange

Black

Should be connected.

Digital ground

Table 2 Set up of power supply lines

2) Set up the evaluation mode, jumper pins. (See the followings)

3) Power on.

The AK4629 and AK4118 should be reset once bringing SW1 “L” upon power-up.

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Control mode

(1)Parallel control mode <Default>

(1-1) Set up Parallel/Serial select pin

Set up SW2-6 (PS) to “H”. (See Table 3)

(1-2) Set up the jumper pins

JP61

SEL1

JP63

SEL2

JP62

SEL3

CSN

DIF0

SCL/CCLK DIF1

SDA/CDTI TDM0

(2)Serial control mode

(1-1) Set up Parallel/Serial select pin

Set up SW2-6 (PS) to “L”. (See Table 3)

(1-2) Set up the jumper pins

JP61

SEL1

JP63

SEL2

JP62

SEL3

CSN

DIF0

SCL/CCLK DIF1

SDA/CDTI TDM0

Audio I/F evaluation mode

(1) Evaluation of ADC using DIT of AK4118

(1-1) Set up analog inputs

(1-1-1) Evaluation of ADC using DIT of AK4118 when single-ended inputs

PORT2 (DIT) or J2 (BNC_TX) is used. Nothing should be connected to PORT4 (AC3).

Set up SW2-2 (SGL) to H (See Table 3).

Set up the jumper pins.

JP33

JP34

LIN1-

JP37

JP38

LIN1+

RIN1+

RIN1-

Canon RCA Canon GND CanonRCA

CanonGND

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JP31

JP32

LIN2-

JP35

JP36

LIN2+

RIN2+

RIN2-

Canon RCA Canon GND CanonRCA

CanonGND

(1-1-2) Evaluation of ADC using DIT of AK4118 when differential inputs <Default>

PORT2 (DIT) or J2 (BNC_TX) is used. Nothing should be connected to PORT4 (AC3).

Set up SW2-2 (SGL) to L (See Table 3).

Set up the jumper pins.

JP33

JP34

LIN1-

JP37

JP38

LIN1+

RIN1+

RIN1-

Canon RCA Canon GND CanonRCA

CanonGND

JP31

JP32

LIN2-

JP35

JP36

LIN2+

RIN2+

RIN2-

Canon RCA Canon GND CanonRCA

CanonGND

(1-2) Set up the digital output

(1-2-1) In case of selecting SDTO1 <Default>

Set up the jumper pin.

JP13

SDTO-SEL

SDTO1 SDTO2

(1-2-2) In case of selecting SDTO2

Set up the jumper pin.

JP13

SDTO-SEL

SDTO1 SDTO2

(1-3) Set up the audio interface.

Set up the jumper pins.

JP14

JP16

JP17

SDTO-SEL

BICK-SEL LRCK-SEL

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(2) Evaluation of DAC using DIR of AK4118 <Default>

J1 (BNC_RX) or PORT1 (DIR) is used. Nothing should be connected to PORT4 (AC3).

(2-1) Set up the digital inputs

Set up the jumper pins (When SDTI1, SDTI2, SDTI3, SDTI4 are selected at the same time).

JP66

JP67

JP68

JP65

SDTI1

SDTI3

SDTI4

SDTI2

(2-2) Set up the audio interface

Set up the jumper pins.

JP16

JP17

BICK-SEL LRCK-SEL

(2-3) Set up the SMUTE pin

Set up the jumper pin.

JP64

SMUTE

When JP64 (SMUTE) is open, soft mute cycle is initialized.

When JP64 (SMUTE) is short, the output mute releases.

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DIP Switch set up

[SW2] (MODE1): Mode settings for AK4629.

About the TDM mode of AK4629, please refer to Page 18 of AK4629’s datasheet.

No.

Name

TDM0

“H”

“L”

Default

TDM Mode

ADC Single-ended

Input Mode

I2C Bus

Normal Mode

ADC Differential

Input Mode

3-wire Serial

Normal Speed

SGL

I2C

DFS0

Double Speed

Zero Input Detect.

Refer to the datasheet P23 of the AK4629.

Parallel Control mode Serial Control mode

DZFE

CAD1

CAD0

Chip Address Select. Refer to Table 9

Table 3 Mode Setting for AK4629

[SW3] (AK4118 Mode_setting): Mode setting for AK4118.

No.

Name

DIF2

DIF1

“H”

“L”

Default

AK4118’s Audio Data Format Settings, and

AK4629’s Audio Data Format Settings when

Parallel Control Mode. See Table 5 and Table 6

AK4118’s Master Clock Settings.

See Table 7

DIF0

OCKS1

OCKS0

CM1

AK4118’s Clock Operation Mode Select.

See Table 8

CM0

Table 4 Mode Setting for AK4118

AK4118’s audio data format and AK4629’s audio data format are set up at the same time by settings of SW3-1

(DIF2), SW3-2 (DIF1) and SW3-3 (DIF0) when AK4629 is on Parallel Control Mode.

SW3-1 SW3-2 SW3-3 AK4629 AK4629

AK4118

DAUX

24bit, Left

justified

24bit, Left

justified

AK4118

SDTO

20bit, Right

justified

24bit, Right

justified

LRCK

H/L

BICK

64fs

DIF2

DIF1

DIF0

DIF1

DIF0

H/L

L/H

64fs

24bit, Left

justified

24bit, Left

justified

(Default)

24bit, I²S

Table 5 AK4114’s Audio Data Format (Parallel control mode <Default>)

Both of settings of DIF1-0 bits of AK4629’s registers and settings of SW3-1 (DIF2), SW3-2 (DIF1), SW3-3

(DIF0) are necessary when AK4629 is on Serial Control Mode.

DIF1

bit

DIF0

bit

Mode

SDTO1-2

SDTI1-3

24bit, Left justified 20bit, Right justified

24bit, Left justified 24bit, Right justified

24bit, Left justified

24bit, Left justified (Default)

24bit, I²S

Table 6 AK4629’s Audio data formats (Serial control mode)

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AK4118 supplies AK4629’s Master Clock with MCKO1.

No. OCKS1 OCKS0

MCKO1

256fs

512fs

128fs

MCKO2

256fs

128fs

256fs

64fs

X’tal

256fs

512fs

128fs

fs (max)

96 kHz

48 kHz

192 kHz

(default)

Table 7 AK4118’s Master Clock Frequency Select (Stereo mode)

Mode

CM1

CM0

PLL

OFF

X'tal

Clock source SDTO

PLL

X'tal

PLL

X'tal

DAUX

(default)

ON: Oscillation (Power-up), OFF: STOP (Power-Down)

Table 8 AK4118’s Clock Operation Mode select

Other jumper pins set up

1. JP81 (GND) : Connection between AGND and DGND.

OPEN : AGND and DGND are separated on the board.

SHORT : AGND and DGND are connected on the board. <Default>

2. JP11 (RX3) : Digital input connector selection for AK4118.

OPT

: Optical connector (PORT1) is used, except when Quad Speed Mode for DAC evaluation.

BNC : BNC Jack (J1) is used. <Default>

3. JP12 (TX)

OPT

: Digital output connector selection for AK4118.

: Optical connector (PORT2) is used.

BNC : BNC Jack (J2) is used. <Default>

4. JP15 (MCLK_SEL): This jumper pin is fixed to SHORT. <Default>

The function of the toggle SW

[SW1] (PDN): Power down of AK4629 and AK4118. Keep “H” during normal operation.

The indication content for LED

[LE1] Monitor DZF1 pin of the AK4629.

[LE2] Monitor DZF2 pin of the AK4629.

About zero detection of AK4629, please refer to Page 23 of AK4629’s datasheet.

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Serial Control

The AK4629 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT3

(CTRL) with PC by 10 wire flat cable packed with the AKD4629-A.

PORT3

CTRL

10 wire

flat Cable

CSN

Connect

CCLK/SCL

CDTI/SDA

CDTO/SDA(ACK)

AKD4627-A

Red

▲

10pin Connector

10pin Header

Figure 2 Connect of 10 wire flat cable

The AK4629 supports 3-wire serial control mode and I2C-bus control mode (fast-mode, max : 400kHz).

Please set the jump pins: JP61 (SEL1), JP63 (SEL2) and JP62 (SEL3), referred to (2) Serial Control Mode.

SW2-7

(CAD1)

SW2-8

(CAD0)

Mode

Chip Address

R/W

Write only

R/W

(default)

3-wire

R/W

I2C

Table 9 Select Interface and Chip Address

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Analog Input/Output Circuits

1. Analog Input Circuits

LINA1

canon

JP33

LIN1+/LIN1

LIN1+ _RCA

canon

JP34

J9 LINB1

MR-552LS

LIN1-

GND

RINA1

canon

JP37

RIN1+/RIN1

RIN1+ _RCA

canon

JP38

J10 RINB1

MR-552LS

RIN1-

GND

LINA2

canon

JP31

LIN2+/LIN2

LIN2+ _RCA

canon

JP32

J7 LINB2

MR-552LS

LIN2-

GND

RINA2

canon

JP35

RIN2+/RIN2

RIN2+ _RCA

canon

JP36

J8 RINB2

MR-552LS

RIN2-

GND

Figure 3 AKD4629-A Analog Input Circuits

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2. Analog Output Circuits

+12V

U5B

C43

22u

+12V

C41

22u

R48 C102

J12

OP275GPZ 220 (short)

ROUT2

U4B

R44 C101

J11

ROUT1

OP275GPZ 220 (short)

ROUT1

R45

10k

R116

(open)

R41

10k

R115

(open)

-12V

330p C44

330p C42

R46

4.7K

R47

4.7k

R42

4.7K

R43

4.7k

+12V

U5A

C49

22u

+12V

U4A

C47

22u

R96 C105

J15

LOUT2

R92 C104

J14

LOUT1

LOUT2

OP275GPZ 220 (short)

LOUT1

R93

10k

R89

10k

R119

(open)

R118

(open)

-12V

C50

C48

330p

R94

4.7K

R95

4.7k

R91

4.7k

R90

4.7K

+12V

U6B

C45

22u

+12V

C53

22u

R88 C103

J13

ROUT3

U7B

R114 C107

J17

ROUT4

OP275GPZ 220 (short)

ROUT3

OP275GPZ 220 (short)

ROUT4

R49

10k

R17

10k

R117

(open)

R121

(open)

-12V

330p C46

330p C54

R50

4.7K

R87

4.7k

R15

4.7K

R16

4.7k

+12V

U7A

+12V

C55

22u

C51

22u

R18 C108

J18

LOUT4

U6A

OP275GPZ 220

R113 C106

J16

LOUT3

OP275GPZ 220 (short)

(short)

LOUT4

LOUT3

R19

10k

R97

10k

R122

(open)

R120

(open)

-12V

330p C56

330p C52

R31

4.7K

R29

4.7k

R98

4.7K

R99

4.7k

Figure 4 AKD4629-A Analog Output Circuits

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Control Soft Manual

■ Evaluation Board and Control Soft Settings

1. Set an evaluation board properly.

2. Connect the evaluation board to an IBM PC/AT compatible PC by a 10 wire flat cable. Be aware of the direction of

the 10pin header. When running this control soft on the Windows 2000/XP, the driver which is included in the CD

must be installed. Refer to the “Driver Control Install Manual for AKM Device Control Software” for installing the

driver. When running this control soft via an AKDUSBIF-B interface board, driver installing is not necessary.

3. Continue the evaluation by following the process below.

■ Operation Screen

1. Start up the control program following the process above.

The operation screen is shown below.

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■ Operation Overview

Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching

tab window. Refer to the “Dialog Boxes” for details of each dialog box setting.

1. [Port Reset]: For when connecting to USB I/F board (AKDUSBIF-A/B)

Click this button after the control soft starts up when connecting USB I/F board (AKDUSBIF-A/B).

2. [Write Default]: Register Initializing

When the device is reset by a hardware reset, use this button to initialize the registers.

3. [All Write]: Executing write commands for all registers displayed.

4. [All Read]: Executing read commands for all registers displayed.

5. [Save]: Saving current register settings to a file.

6. [Load]: Executing data write from a saved file.

7. [All Reg Write]: “All Reg Write” dialog box is popped up.

8. [Data R/W]: “Data R/W” dialog box is popped up.

9. [Sequence]: “Sequence” dialog box is popped up.

10. [Sequence(File)]: “Sequence(File)” dialog box is popped up.

11. [Read]: Reading current register settings and display on to the Register area (on the right of the main window).

This is different from [All Read] button, it does not reflect to a register map, only displaying

hexadecimal.

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1. [REG]: Register Map

This tab is for a register writing and reading.

Each bit on the register map is a push-button switch.

Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).

Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)

The registers which is not defined in the datasheet are indicated as “---”.

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[Write]: Data Writing Dialog

It is for when changing two or more bits on the same address at the same time.

Click [Write] button located on the right of the each corresponded address for a pop-up dialog box.

When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”.

Click [OK] to write setting value to the registers, or click [Cancel] to cancel this setting.

[Read]: Data Read

Click [Read] button located on the right of the each corresponded address to execute register reading.

After register reading, the display will be updated regarding to the register status.

Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).

Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)

Please be aware that button statuses will be changed by Read command.

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2. [Tool]: Testing Tools

This tab screen is for evaluation testing tool.

Click buttons for each testing tool.

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2-1. [Repeat Test]: Repeat Test Dialog

Click [Repeat Test] button in the Test tab to open the repeat test dialog shown below.

Repeat writing test can be executed by this dialog.

[Start] Button

: Starts the repeat test.

A dialog for saving a file of the test result will open when clicking this button.

Name the file.

Test will start after specifying a saving file.

: Closes this dialog and finishes the process.

: Data writing address in hexadecimal numbers.

: Start data in hexadecimal numbers.

: End data in hexadecimal numbers.

: Data write step interval.

[Close] Button

[Address] Box

[Start Data] Box

[End Data] Box

[Step] Box

[Repeat Count] Box : Repeat count of the test writing.

[Up and Down] Box : Data write flow is changed as below.

• Checked: Writes in step interval from the start data to the end data and turn back from the end data to

the start data.

[Example]

Data flow:

Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.

[00→01→02→03→04→05→05→04→03→02→01→00] x Repeat Count Number

• Not checked: Writes in step interval from the start data to the end data and finishes writing.

[Example]

Data flow:

Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.

[00→01→02→03→04→05] x Repeat Count Number

[Sampling Frequency] Box: Selects sampling frequency 44.1kHz/48kHz

[Count] Box : Indicates the count number during a repeat test.

[Lch Level] Box : Indicates the Lch Level during a repeat test.

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2-2. [Loop Setting]: Loop Dialog

Click [Loop Setting] button in the Tool tab to open the loop setting dialog as shown below.

Writing test can be executed.

[ OK ] Button

: Starts the test.

[ Cancel ] Button

[ Address ] Box

[ Start Data ] Box

[ End Data ] Box

[ Interval ] Box

[ Step ] Box

: Closes the dialog and finishes the process.

: Data writing address in hexadecimal numbers.

: Start data in hexadecimal numbers.

: End data in hexadecimal numbers.

: Data write interval time.

: Data write step interval.

[ Mode Select ] Box : Mode select check box.

• Checked: Writes in step interval from the start data to the end data and turn back from the end data to

the start data.

[Example]

Start Data = 00, End Data = 05, Step = 1

Data flow: 00→01→02→03→04→05→05→04→03→02→01→00

• Not Checked: Writes in step interval from the start data to the end data and finishes writing.

[Example]

Start Data = 00, End Data = 05, Step = 1

Data flow: 00→01→02→03→04→05

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Dialog Boxes

1. [All Reg Write]: All Register Write dialog box

Click [All Reg Write] button in the main window to open register setting files.

[Open (left)]: Selecting a register setting file (*.akr).

[Write]: Executing register writing.

[Write All]: Executing all register writings.

Writings are executed in descending order.

[Help]: Help window is popped up.

[Save]: Saving the register setting file assignment. The file name is “*.mar”.

[Open (right)]: Opening a saved register setting file assignment “*. mar”.

[Close]: Closing the dialog box and finish the process.

*Operating Suggestions

(1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should be

stored in the same folder.

(2) When register settings are changed by [Save] button in the main window, re-read the file to reflect new register

settings.

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2. [Data R/W]: Data R/W Dialog Box

Click the [Data R/W] button in the main window for data read/write dialog box.

Data write is available to specified address.

Address Box: Input data address in hexadecimal numbers for data writing.

Data Box: Input data in hexadecimal numbers.

Mask Box: Input mask data in hexadecimal numbers.

This is “AND” processed input data.

[Write]: Writing to the address specified by “Address” box.

[Read]: Reading from the address specified by “Address” box.

The result will be shown in the Read Data Box in hexadecimal numbers.

[Close]: Closing the dialog box and finish the process.

Data writing can be cancelled by this button instead of [Write] button.

*The register map will be updated after executing [Write] or [Read] commands.

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3. [Sequence]: Sequence Dialog Box

Click [Sequence] button to open register sequence setting dialog box.

Sequence Setting

Set register sequence by following process bellow.

(1)Select a command

Use [Select] pull-down box to choose commands.

Corresponding boxes will be valid.

< Select Pull-down menu >

· No_use: Not using this address

· Register: Register writing

· Reg(Mask): Register writing (Masked)

· Interval: Taking an interval

· Stop: Pausing the sequence

· End: Finishing the sequence

(1) Input sequence

[Address]: Data address

[Data]: Writing data

[Mask]: Mask

[Data] box data is ANDed with [Mask] box data. This is the actual writing data.

When Mask = 0x00, current setting is hold.

When Mask = 0xFF, the 8bit data which is set in the [Data] box is written.

When Mask =0x0F, lower 4bit data which is set in the [Data] box is written.

Upper 4bit is hold to current setting.

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[ Interval ]: Interval time

Valid boxes for each process command are shown bellow.

· No_use: None

· Register: [Address], [Data], [Interval]

· Reg(Mask): [Address], [Data], [Mask], [Interval]

· Interval: [Interval]

· Stop: None

· End: None

Control Buttons

The function of Control Button is shown bellow.

[Start]: Executing the sequence

[Help]: Opening a help window

[Save]: Saving sequence settings as a file. The file name is “*.aks”.

[Open]: Opening a sequence setting file “*.aks”.

[Close]: Closing the dialog box and finish the process.

Stop of the sequence

When “Stop” is selected in the sequence, processing is paused and it starts again when [Start] button is clicked.

Restarting step number is shown in the “Start Step” box. When finishing the process until the end of sequence, “Start

Step” will return to “1”.

The sequence can be started from any step by writing the step number to the “Start Step” box.

Write “1” to the “Start Step” box and click [Start] button, when restarting the process from the beginning.

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4. [Sequence(File)]: Sequence Setting File Dialog Box

Click [Sequence(File)] button to open sequence setting file dialog box.

Those files saved in the “Sequence setting dialog” can be applied in this dialog.

[Open (left)]: Opening a sequence setting file (*.aks).

[Start]: Executing the sequence setting.

[Start All]: Executing all sequence settings.

Sequences are executed in descending order.

[Help]: Pop up the help window.

[Save]: Saving sequence setting file assignment. The file name is “*.mas”.

[Open(right)]: Opening a saved sequence setting file assignment “*. mas”.

[Close]: Closing the dialog box and finish the process.

*Operating Suggestions

(1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mas” should be

stored in the same folder.

(2) When “Stop” is selected in the sequence the process will be paused and a pop-up message will appear. Click “OK”

to continue the process.

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MEASUREMENT RESULTS

1) ADC part

[Measurement condition]

• Measurement unit : Audio Precision, System two, Cascade

• MCLK

• BICK

: 512fs at 48kHz, 256fs at 96kHz

: 64fs

• fs

: 48kHz, 96kHz

• BW

: 20Hz∼20kHz at fs=48kHz, 20Hz∼40kHz at 96kHz

• Bit

: 24bit

• Power Supply

• Interface

• Temperature

: AVDD=DVDD= TVDD=5V

: DIT (AK4118)

: Room

a) Single-ended Inputs

fs=48kHz

Parameter Input signal

Measurement filter

20kHz LPF

LIN1

95.7

RIN1

96.3

Units

1kHz,

S/(N+D)

-0.5dBFS

1kHz,

-60dBFS

20kHz LPF+A-weighted

102.7

103.0

102.6

103.0

S/N

No signal 20kHz LPF+A-weighted

fs=96kHz

Parameter Input signal

Measurement filter

40kHz LPF

LIN1

91.6

RIN1

92.3

Units

1kHz,

S/(N+D)

-0.5dBFS

1kHz,

-60dBFS

40kHz LPF+A-weighted

105.0

105.2

105.0

105.2

S/N

No signal 40kHz LPF+A-weighted

b) Differential Inputs

fs=48kHz

Parameter Input signal

Measurement filter

20kHz LPF

LIN1

96.9

RIN1

96.7

Units

1kHz,

S/(N+D)

-0.5dBFS

1kHz,

-60dBFS

20kHz LPF+A-weighted

103.2

103.5

103.1

103.5

S/N

No signal 20kHz LPF+A-weighted

fs=96kHz

Parameter Input signal

Measurement filter

40kHz LPF

LIN1

93.5

RIN1

94.5

Units

1kHz,

S/(N+D)

-0.5dBFS

1kHz,

-60dBFS

40kHz LPF+A-weighted

105.9

106.2

105.7

106.2

S/N

No signal 40kHz LPF+A-weighted

2011/01

-23-

[AKD4629-A]

2) DAC part

[Measurement condition]

• Measurement unit : Audio Precision, System two, Cascade

• MCLK

• BICK

: 512fs at 48kHz, 256fs at 96kHz, 128fs at 192kHz

: 64fs

• fs

: 48kHz, 96kHz, 192kHz

• BW

: 20Hz∼20kHz at fs=48kHz, 20Hz∼40kHz at 96kHz, 20Hz~40kHz at 192kHz

• Bit

: 24bit

• Power Supply

• Interface

• Temperature

: AVDD=DVDD= TVDD=5V

: DIR (AK4118)

: Room

fs=48kHz

Parameter Input signal

Measurement filter

LOUT1

100.5

ROUT1

97.0

Units

1kHz,

S/(N+D)

20kHz Brick-wall LPF

0dBFS

1kHz,

20kHz Brick-wall LPF

A-weighted

105.5

105.6

-60dBFS

20kHz Brick-wall LPF

A-weighted

S/N

No signal

fs=96kHz

Parameter Input signal

Measurement filter

LOUT1

98.6

ROUT1

95.9

Units

1kHz,

S/(N+D)

40kHz Brick-wall LPF

0dBFS

1kHz,

40kHz Brick-wall LPF

A-weighted

105.3

105.4

-60dBFS

40kHz Brick-wall LPF

A-weighted

S/N

No signal

fs=192kHz

Parameter Input signal

Measurement filter

LOUT1

97.6

ROUT1

95.8

Units

1kHz,

S/(N+D)

40kHz Brick-wall LPF

0dBFS

1kHz,

40kHz Brick-wall LPF

A-weighted

105.3

105.4

105.5

-60dBFS

40kHz Brick-wall LPF

A-weighted

S/N

No signal

2011/01

-24-

[AKD4629-A]

1.1.1 ADC (fs=48kHz, Single-ended Inputs)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

FFT (Input=-0.5dBr, fin=1kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

FFT (Input=-60dBr, fin=1kHz)

2011/01

-25-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

FFT (noise floor)

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBr

THD + N vs. Input Level (fin=1kHz)

2011/01

-26-

[AKD4629-A]

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

100

200

500

10k 20k

THD + N vs. Input Frequency (Input=-0.5dBr)

⁺⁰T

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBr

Linearity (fin=1kHz)

2011/01

-27-

[AKD4629-A]

+0.75

+0.5

+0.25

-0.25

-0.5

-0.75

-1

-1.25

-1.5

-1.75

-2

100

200

500

10k 20k

Frequency Response (Input Level=-0.5dBr)

-80

-85

-90

-95

-100

-105

-110

-115

-120

-125

-130

-135

-140

100

200

500

10k 20k

Crosstalk (Input Level=-0.5dBr)

2011/01

-28-

[AKD4629-A]

1.1.2 ADC (fs=96kHz, Single-ended Inputs)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

FFT (Input=-0.5dBr, fin=1kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

FFT (Input=-60dBr, fin=1kHz)

2011/01

-29-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

FFT (Noise floor)

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBr

THD + N vs. Input Level (fin=1kHz)

2011/01

-30-

[AKD4629-A]

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

100

200

500

10k

20k 40k

THD + N vs. Input Frequency (Input Level=-0.5dBr)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBr

Linearity (fin=1kHz)

2011/01

-31-

[AKD4629-A]

+0.5

-0.5

-1

-1.5

-2

100

200

500

10k

20k 40k

Frequency Response (Input Level=-0.5dBr)

-80

-90

-100

-110

-120

-130

-140

-150

-160

100

200

500

10k

20k 40k

Crosstalk

2011/01

-32-

[AKD4629-A]

1.2.1 ADC (fs=48kHz, Differential Inputs)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

FFT (Input=-0.5dBr, fin=1kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

FFT

(Input=-60dBr, fin=1kHz)

2011/01

-33-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

FFT (noise floor)

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBr

THD + N vs. Input Level (fin=1kHz)

2011/01

-34-

[AKD4629-A]

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

100

200

500

10k 20k

THD + N vs. Input Frequency (Input=-0.5dBr)

TT TT

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBr

Linearity (fin=1kHz)

2011/01

-35-

[AKD4629-A]

+0.75

+0.5

+0.25

-0.25

-0.5

-0.75

-1

-1.25

-1.5

-1.75

-2

100

200

500

10k 20k

Frequency Response (Input Level=-0.5dBr)

-80

-90

-100

-110

-120

-130

-140

-150

-160

100

200

500

10k 20k

Crosstalk (Input Level=-0.5dBr)

2011/01

-36-

[AKD4629-A]

1.2.2 ADC (fs=96kHz, Differential Inputs)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

FFT (Input=-0.5dBr, fin=1kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

FFT (Input=-60dBr, fin=1kHz)

2011/01

-37-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

FFT (Noise floor)

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBr

THD + N vs. Input Level (fin=1kHz)

2011/01

-38-

[AKD4629-A]

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

100

200

500

10k

20k 40k

THD + N vs. Input Frequency (Input Level=-0.5dBr)

TT T T

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBr

Linearity (fin=1kHz)

2011/01

-39-

[AKD4629-A]

+0.75

+0.5

+0.25

-0.25

-0.5

-0.75

-1

-1.25

-1.5

-1.75

-2

100

200

500

10k

20k 40k

Frequency Response (Input Level=-0.5dBr)

-80

-90

-100

-110

-120

-130

-140

-150

-160

100

200

500

10k

20k 40k

Crosstalk (Input Level=-0.5dBr)

2011/01

-40-

[AKD4629-A]

2.1 DAC (fs=48kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

FFT (Input=0dBFS, fin=1kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

FFT (Input=-60dBFS, fin=1kHz)

2011/01

-41-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

FFT (Noise floor)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100 200

500

10k 20k

50k 100k

FFT (Out-of-band noise)

2011/01

-42-

[AKD4629-A]

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBFS

THD + N vs. Input Level (fin=1kHz)

-60

T T

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

100

200

500

10k 20k

THD + N vs. Input Frequency (Input=0dBFS)

2011/01

-43-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBFS

Linearity (fin=1kHz)

+0.8

+0.6

+0.4

+0.2

-0.2

-0.4

-0.6

-0.8

-1

100

200

500

10k 20k

Frequency Response (Including external RC filter)

2011/01

-44-

[AKD4629-A]

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k 20k

Crosstalk

2011/01

-45-

[AKD4629-A]

2.2 DAC (fs=96kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

FFT (Input=0dBFS, fin=1kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

FFT (Input=-60dBFS,fin=1kHz)

2011/01

-46-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

FFT (Noise floor)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100 200

500

10k 20k

50k 100k

FFT (Out-of-band noise)

2011/01

-47-

[AKD4629-A]

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBFS

THD + N vs. Input Level (fin=1kHz)

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

100

200

500

10k

20k 40k

THD + N vs. Input Frequency (Input=0dBFS)

2011/01

-48-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBFS

Linearity (fin=1kHz)

+1.5

+0.5

-0.5

-1

-1.5

-2

100

200

500

10k

20k 40k

Frequency Response (Including external RC filter)

2011/01

-49-

[AKD4629-A]

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k 40k

Crosstalk (Input=0dBFS)

2011/01

-50-

[AKD4629-A]

2.3 DAC (fs=192kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k

80k

FFT (Input=0dBFS, fin=1kHz)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k

80k

FFT (Input=-60dBFS,fin=1kHz)

2011/01

-51-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k

80k

FFT (Noise floor)

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

100 200

500

10k 20k

50k 100k

FFT (Out-of-band noise)

2011/01

-52-

[AKD4629-A]

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBFS

THD + N vs. Input Level (fin=1kHz)

-60

-65

-70

-75

-80

-85

-90

-95

-100

-105

-110

-115

-120

100

200

500

10k

20k

80k

THD + N vs. Input Frequency (Input=0dBFS)

2011/01

-53-

[AKD4629-A]

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0

dBFS

Linearity (fin=1kHz)

+2.5

+1.5

+0.5

-0.5

-1

-1.5

-2

-2.5

-3

100

200

500

10k

20k

80k

Frequency Response (Including external RC filter)

2011/01

-54-

[AKD4629-A]

-60

-70

-80

-90

-100

-110

-120

-130

-140

100

200

500

10k

20k

80k

Crosstalk (Input=0dBFS)

2011/01

-55-

[AKD4629-A]

Revision History

Date

Manual

Board

Reason

Contents

(YY/MM/DD) Revision Revision

2010/08/09

KM101900

First Edition

Device Rev. AKD4629 Rev.A → Rev.B

Changed Measurement results were updated.

2010/01/26

KM101901

Contorl Soft P11, P15: Control soft’s plots were updated;

Rev. updated P11: The explanation about AKDUSBIF-B interface board

was added.

P16, P17: Explanations of the “Tool” tab were added.

IMPORTANT NOTICE

z These products and their specifications are subject to change without notice.

When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei

Microdevices Corporation (AKM) or authorized distributors as to current status of the products.

z Descriptions of external circuits, application circuits, software and other related information contained in this

document are provided only to illustrate the operation and application examples of the semiconductor products. You

are fully responsible for the incorporation of these external circuits, application circuits, software and other related

information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third

parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent,

intellectual property, or other rights in the application or use of such information contained herein.

z Any export of these products, or devices or systems containing them, may require an export license or other official

approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange,

or strategic materials.

z AKM products are neither intended nor authorized for use as critical components_Note1)in any safety, life support, or

other hazard related device or system_Note2), and AKM assumes no responsibility for such use, except for the use

approved with the express written consent by Representative Director of AKM. As used here:

Note1) A critical component is one whose failure to function or perform may reasonably be expected to result,

whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and

which must therefore meet very high standards of performance and reliability.

Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or

for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or

perform may reasonably be expected to result in loss of life or in significant injury or damage to person or

property.

z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places

the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer

or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all

claims arising from the use of said product in the absence of such notification.

2011/01

-56-

SMUTE DZFE

SGL

CN4

48pin_4

TP8

TP7

TP6

TP11 TP10 TP9

TP5

TP4

TP3 TP2 TP1

CN3

TP45

DZF2

CN1

DZF2

DZF1

TP12

CAD0

CAD1

TP44

DZF1

CAD0

TP13

CAD1

TP43

AVSS

PS TP14

TP42

AVDD

AVDD1

CAD0

DZF2

DZF1

AVSS

AVDD

SDTO1

CAD1

SDTO1 TP15

SDTO2 TP16

SDTO2

TVDD

C2 C1

SDTO1

2.2u

0.1u

10u

SDTO2

VREFH

VCOM

ROUT1

LOUT1

ROUT2

LOUT2

ROUT3

LOUT3

10u 0.1u

TP40

ROUT1

AK4629

TVDD

ROUT1

DVDD

0.1u

TVDD TP17

DVSS

TP39

LOUT1

10u C3

R2 100

TDM0/SDA/CDTI

DVDD TP18

R3 100

R4 100

R5 100

DIF1/SCL/CCLK

DVDD

LOUT1

ROUT2

LOUT2

ROUT3

LOUT3

DIF0/CSN

DVSS

TP19

PDN

TP38 ROUT2

TP20

TDM0/SDA/CDTI

DIF1/SCL/CCLK

DIF0/CSN

TP37

LOUT2

TP21

TP22

TP23

TP36

TP35

ROUT3

LOUT3

R7 R8

100 100

100

100100100100

PDN

48pin_3

48pin_1

TP24

TP31 TP32

TP33

TP34

CN2

48pin_2

Title

AKD4629-A-MAIN

Size

Document Number

Rev

-57-

AK4629

MCLK BICK LRCK SDTI1

SDTI2 SDTI3 SDTI4 DFS0

I2C

LOUT4 ROUT4

Date:

Sheet

Thursday, July 01, 2010

(short)

PORT1

VCC

+3.3V

C20

0.1u

C21

GND

OUT

C19

10u

R20

470

TORX141

OPT

BNC

C18

0.1u

JP11

RX3

R25

10k

BNC_RX

C17

0.47u

C22

0.1u

R21

INT0

+3.3V

IPS0/RX4

INT0

C23

OCKS0/CSN/CAD0

OCKS1/CCLK/SCL

CM1/CDTI/SDA

OCKS0

OCKS1

CM1

JP14

DIF0

DIF0/RX5

TEST2

DIF1/RX6

VSS1

DAUX

XTI

DIF1

DIF2

CM0/CDTO/CAD1

CM0

SDTO_SEL

PDN

XTI

XTO

PDN

C24

AK4118

DIF2/RX7

IPS1/IIC

P/SN

XTI

XTO

JP15

MCLK_SEL

JP16

DAUX

MCKO2

BICK

24.576MHz

XTL0

4114_MCKO2

XTL1

VIN/GP0

SDTO

4114_SDTO

DIF2-0="100"; MSB justified; Master Mode

PORT2

VCC

4114_BICK

4114_LRCK

+3.3V

BICK_SEL

JP17

GND

C25

0.1u

+3.3V

TOTX141

C26

10u

4114_MCKO1

LRCK_SEL

C28

OPT

Jp12

C27

0.1u

C29

10u

BNC_TX

R24

5.1

DA02

R23

240

+3.3V

BNC

R22

150

1:1

Title

AKD4629-A-Main

Size

Document Number

Rev

-58-

AK4114

Date:

Sheet

Monday, December 21, 2009

LINA2

RINA2

canon

JP31

canon

JP35

LIN2+/LIN2

LIN2-

LIN2+_RCA

RIN2+/RIN2

RIN2-

RIN2+

RCA

canon

JP32

canon

JP36

J7 LINB2

MR-552LS

J8 RINB2

MR-552LS

LIN2- _GND

RIN2-_GND

RINA1

LINA1

canon

JP37

canon

JP33

RIN1+/RIN1

RIN1-

RIN1+

LIN1+/LIN1

LIN1-

LIN1+_RCA

RCA

canon

JP38

canon

JP34

J10RINB1

MR-552LS

J9 LINB1

MR-552LS

RIN1-_GND

LIN1- _GND

Title

Size

<Title>

AKD4629-A-MAIN

Document Number

Rev

Analog Input

-59-

A4 <Doc>

Date:

Sheet

Tuesday, December 01, 2009

+12V

U6B

C41

22u

+12V

U5B

C43

22u

C45

22u

U4B

R44 C101

J11

ROUT1

R48 C102

J12

ROUT2

R88 C103

J13

ROUT3

OP275GPZ220 (short)

ROUT1

OP275GPZ220 (short)

ROUT2

ROUT3

R41

10k

R45

10k

R49

10k

R115

(open)

R116

(open)

R117

(open)

-12V

330p C42

-12V

330p C44

330p C46

R42

4.7K

R43

4.7k

R46

4.7K

R47

4.7k

R50

4.7K

R87

4.7k

+12V

C47

22u

+12V

U5A

C49

22u

+12V

U4A

R92 C104

J14

LOUT1

C51

22u

OP275GPZ220 (short)

R96 C105

J15

LOUT2

LOUT1

LOUT2

OP275GPZ220 (short)

U6A

R113 C106

J16

LOUT3

R89

10k

OP275GPZ220

(short)

LOUT3

R93

10k

R118

(open)

R119

R97

10k

-12V

R120

(open)

C48

330p

-12V

C50

-12V

330p

330p C52

R91

4.7k

R90

4.7K

R94

4.7K

R95

4.7k

R98

4.7K

R99

4.7k

+12V

C53

22u

+12V

U7A

C55

22u

U7B

R114 C107

J17

ROUT4

OP275GPZ220 (short)

R18 C108

J18

LOUT4

ROUT4

OP275GPZ220 (short)

LOUT4

R17

10k

R121

(open)

R19

10k

R122

(open)

-12V

330p C54

330p C56

R15

4.7K

R16

4.7k

R31

4.7K

R29

4.7k

Title

<Title>

AKD4629-A-MAIN

Size

Document Number

A4 <Doc>

Rev

Analog Output

-60-

Date:

Sheet

Monday, December 21, 2009

CSN

JP61

R57

100

R51

R52

R53

10k

R54

R55

R56

100

L5V

DIF0/CSN

SCL/CCLK

SDA/CDTI

TVDD

DIF0

SEL1

DIF0

SDTI1

SDTI2

SDTI3

SDTI4

R58

SW2

PORT3

TDM0

SGL

I2C

DFS0

DZFE

CAD1

CAD0

CSN

U10A

SCL/CCLK

SDA/CDTI

R59

100

74LS07

SDA(ACK)/CDTO

R139 51

R140

10k

U10B

R141

10k

R32

74HCT541

L5V

SDA(ACK)/CDTO

CTRL

74LS07

R33

R34

MODE1

RP1

R35

TDM0

SGL

I2C

DFS0

DZFE

CAD1

CAD0

47k

U10C

R61 100

R62 100

74LS07

U10D

4114_MCKO1

4114_BICK

PORT4

R66 100

MCKO1

BICK

LRCK

SDTO

SDTI4

MCKO2

GND

SDTI1

SDTI2

SDTI3

74LS07

U10E

74LS07

4114_MCKO2

R63 100

R64 100

AK4114 Mode_setting

SW3

U10F

4114_LRCK

+3.3V

AC3

74LS07

JP65

SDTI4

JP66

SDTI1

JP67

SDTI2

JP68

SDTI3

R65 100

4114_SDTO

RP2

DIF2

DIF1

DIF0

DIF2

DIF1

DIF0

OCKS1

OCKS0

CM1

OCKS1

OCKS0

CM1

MCLK

BICK

CM0

4114_MCKO1

4114_BICK

47K

R39

R38

R37

100

LRCK

DAUX

4114_LRCK

R36 100

SDTO1

SDTO2

JP13

SDTO-SEL

74HCT541

TVDD

R67

10k

1S1588

U8F

U8E

PDN

74HCT14

C61

0.1u

SDA/CDTI

SMUTE

SW1

PDN

SCL/CCLK

JP62

SDA/CDTI

TDM0

JP63

SCL/CCLK

DIF2

R60

TDM0/SDA/CDTI

DIF1/SCL/CCLK

TVDD

SEL3

SEL2

100k

DIF1

TDM0

JP64

SMUTE

Title

<Title>

AKD4629-A-MAIN

Size

A3 <Doc>

Document Number

Rev

Digital I/F

-61-

Date:

Sheet

Wednesday, August 04, 2010

NJM78M05FA

L5V

+12V

IN OUT

C73

C74

47u

(Short)

-12V

C71

47u

for OP275GPZ x4

C72

0.1u

L10

-12V

C84

47u

(short)

AVDD2

(Short)

C86

0.1u

C87

10u

C88

0.1u

C89

10u

C90

0.1u

C91

10u

C92

0.1u

C93

10u

REG

JP82

R86

+12V

for OP275GPZ x4

AVDD1

(short)

AVDD

L11

JACK

(Short)

+12V

(short)

C85

47u

JP81

GND

AVDD

AGND

DGND

C94

0.1u

C95

10u

C96

0.1u

C97

10u

C98

0.1u

C99

10u

C69

0.1u

C68

10u

C75

47u

(short)

R81

12V1

12V2

T-45(R) T-45(R)

AVDD1 TVDD1

T-45(O) T-45(O)

DVDD1

T-45(O)

LE1

(short)

AVDD2

REG

JACK

JP83

DVDD

R85

5.1

TR1

DZF1

DVDD

RN1202

(10k,10k)

DVDD

+12V

-12V

AVDD

TVDD

DVDD

C76

(short)

AGND1

T-45(B)

DGND1

T-45(B)

47u

REG

JP84

TVDD

R83

(Short)

TVDD

(short)

AGND

DGND

JACK

TVDD

R82

LE2

(short)

AVDD2

C81

47u

TR2

DZF2

RN1202

(10k,10k)

for 74HCT14,

74HCT541x2, 74LS07

LP2950A

R84

+3.3V

L5V

IN OUT

L5V

C77

47u

(Short)

C82

0.1u

C83

0.1u

C109

0.1u

C110

0.1u

C78

0.1u

C79

0.1u

C80

47u

Title

Size

<Title>

AKD4629-A-MAIN

Document Number

Rev

-62-

A3 <Doc>

Power Supply

Date:

Sheet

Thursday, July 01, 2010

-63-

-64-

-65-

-66-

-67-

-68-

AKD4629-A [AKM]

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