AKD4645-B [AKM]
Stereo CODEC with built-in MIC/HP amplifier; 立体声编解码器与内置MIC / HP放大器
| 型号： | AKD4645-B |
| 厂家： | 
ASAHI KASEI MICROSYSTEMS |
| 描述： | Stereo CODEC with built-in MIC/HP amplifier |
| 文件： | 总40页 (文件大小：874K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ASAHI KASEI
[AKD4645-B]
AKD4645-B
AK4645 Evaluation board Rev.0
GENERAL DESCRIPTION
AKD4645-B is an evaluation board for the AK4645, Stereo CODEC with built-in MIC/HP amplifier. The
AKD4645-B can evaluate A/D converter and D/A converter separately in addition to loop-back mode (A/D
→ D/A). The AKD4645-B also has the digital audio interface and can achieve the interface with digital
audio systems via opt-connector.
Ordering guide
AKD4645-B
--- Evaluation board for AK4645
(Cable for connecting with printer port of IBM-AT compatible PC and control
software are packed with this. This control software does not operate on Windows
NT.)
FUNCTION
• DIT/DIR with optical input/output
• 10pin Header for serial control mode
• On-board Stereo Class-D Speaker Amplifier (AK7830)
Regulator
GND
5V
3.3V
LIN1/
RIN1
Control Data
10pin Header
LIN2/
RIN2
MIN/
LIN3/
RIN3
DSP
10pin Header
LIN4/
RIN4
AK4645
HP
Opt In
Opt Out
AK4114
(DIR/DIT)
LOUT/
ROUT
AK7830
(Class-D)
SPL /
SPR
Figure 1. AKD4645-B Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual
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[AKD4645-B]
Evaluation Board Manual
Operation sequence
1) Install the control software (Refer to page 9).
2) Set up the power supply lines.
[VCC]
(red)
= 5.0V (or 3.3V)
[TVDD]
(orange) = 1.6 ∼ 3.6V : for TVDD of AK4645 (typ. 3.3V:≤DVDD)
[AGND] (black)
[DGND] (black)
= 0V
= 0V
Each supply line should be distributed from the power supply unit.
When the power is supplied to the AK4645 via the regulator, JP2 should be set to “REG” side and VCC should
be 5.0V.<default> (When the power is supplied from VCC jack to the AK4645 directly, JP2 should be set to
“VCC” side and VCC should be 3.3V.)
3) Set up the evaluation mode, jumper pins. (See the followings.)
4) Power on.
The AK4645 and AK4114 should be reset once bringing SW2 “L” upon power-up.
And the AK7830 should be reset once bringing SW1 (SPK_PDN) “L” upon power-up.
Evaluation mode
(1)Slave mode
(1-1) Evaluation of Recording block (MIC, ADC) using DIT of AK4114
(1-2) Evaluation of Playback block (HP, LINEOUT) using DIR of AK4114
(1-3) Evaluation of Loop-back using AK4114 <Default>
(1-4) All interface signals including master clock are fed externally.
The AK4114’s audio interface format is fixed to LJ compatible.
(1-1) Evaluation of Recording block using DIT of AK4114
PORT2 (DIT) and X1 (X’tal) are used. DIT generates audio bi-phase signal from received data and which is
output through optical connector (TOTX141). Nothing should be connected to PORT1 (DIR) and PORT3
(DSP).
JP11
JP14
JP13
JP16
JP19
SDTI
DIR-MCLK
DIR-BICK
DIR-LRCK
DIR-SEL
Master Slave DIR ADC
(1-2) Evaluation of Playback block using DIR of AK4114
PORT1 (DIR) is used. Nothing should be connected to PORT3 (DSP).
JP11
JP14
JP13
JP16
JP19
SDTI
DIR-MCLK
DIR-BICK
DIR-LRCK
DIR-SEL
Master Slave DIR ADC
The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz,
any other evaluation mode without using DIR should be used.
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(1-3) Evaluation of Loop-back using AK4114 <Default>
X’tal oscillator (X1) is used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP).
JP11
JP14
JP13
JP16
JP19
SDTI
DIR-MCLK
DIR-BICK
DIR-LRCK
DIR-SEL
Master Slave DIR ADC
The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz,
any other evaluation mode without using DIR should be used.
(1-4) All interface signals including master clock are fed externally.
PORT3 (DSP) is used. Nothing should be connected to PORT1 (DIR).
JP11
JP14
JP13
JP16
JP19
SDTI
DIR-MCLK
DIR-BICK
DIR-LRCK
DIR-SEL
Master Slave DIR ADC
(2)Master mode
(2-1) Evaluation of Recording block using MCLK of AK4114
(2-2) Master clock is fed externally
(2-1) Evaluation of Loop-back using MCLK of AK4114
X’tal oscillator (X1) is used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP). It can be
evaluated at internal loop-back mode (LOOP bit = “1”). It is possible to evaluate at various sampling frequencies
using built-in AK4645’s PLL.
JP11
JP14
JP13
JP16
JP19
SDTI
DIR-MCLK
DIR-BICK
DIR-LRCK
DIR-SEL
Master Slave DIR ADC
(2-2) Master clock is fed externally
PORT3 (DSP) is used and MCLK is fed from PORT3. Nothing should be connected to PORT1 (DIR). It can be
evaluated at internal loop-back mode (LOOP bit = “1”). It is possible to evaluate at various sampling frequencies
using built-in AK4645’s PLL.
JP11
JP14
JP13
JP16
JP19
SDTI
DIR-MCLK
DIR-BICK
DIR-LRCK
DIR-SEL
Master Slave DIR ADC
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Other jumper pins set up
[JP1] (GND) : Connection between AGND and DGND.
OPEN : Both grounds are separated on board.
SHORT : Both grounds are connected on board. <Default>
[JP9, JP10] : Connection of mic power.
OPEN: Mic power is not connected.
SHORT : Mic power is connected. <Default>
[JP4, JP8]: Select Pin #5, 28
Pin #5
Pin #28
JP4
JP8
AIN3 bit
VCOC
RIN3
MIN
VCOC
RIN3
Open
Short
0
1
<Default>
LIN3
[JP7] : Select the Power Booster of AK7830.
VCC : Power Booster ON
GND: Power Booster Off<Default>
[JP15] : Select Output Signal Voltage of 74AVC8T245
TVDD: TVDD = D3V <Default>
D3V :
TVDD < D3V
[JP18] (SDTO-IN):Presence of external device connection via PORT3(DSP)
SHORT : connection <default>
OPEN : non-connection
The function of the toggle SW
[SW1] (SPK_PDN): Power down of AK7830. Keep “H” during normal operation.
[SW2] (PDN): Power down of AK4645 and AK4114. Keep “H” during normal operation.
Indication for LED
[LED1] (ERF): Monitor INT0 pin of the AK4114. LED turns on when some error has occurred to AK4114.
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Serial Control
The AK4645 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT4
(CTRL) with PC by 10 wire flat cable packed with the AKD4645. When I2C bus mode is used, PORT4 should be
directly connected to the I2C bus on the system. JP3, 17 and 12 should be set to I2C bus mode to control the AK7830.
CSN
SCL/CCLK
Connect
SDA/CDTI
PC
AKD4645-B
10 wire
10pin
10pin Header
flat cable
Connector
Figure 2. Connect of 10 wire flat cable
(1) 3-wire Serial Control Mode <Default>
JP12
SDA
JP3
I2C-SEL
JP17
CAD0
I2C
3-wire
The jumper pins should be set to the following.
(2) I2C-bus Control Mode
The jumper pins should be set to the following.
(2-1) In case of using CAD0=0 (device address bits).
JP12
SDA
JP3
I2C-SEL
JP17
CAD0
I2C
I2C
3-wire
(2-2) In case of using CAD0=1 (device address bits).
JP12
SDA
JP3
JP17
I2C-SEL
CAD0
3-wire
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Analog Input/Output Circuits
(1) Input Circuits
1. MIN/LIN3/RIN3 Input Circuit
C31
1u
J3
RIN3
MIN/LIN3/RIN3
6
C32
1u
R17
20k
4
3
MIN/LIN3
JP8
LIN3
Figure 3. MIN/LIN3/RIN3 Input Circuit
2. LINE1 Input Circuit
R22
2.2k
MPWR
R23
2.2k
J7
JP9
RIN1
C37
1u
LIN1/RIN1
6
RIN1
LIN1
4
3
C38
1u
JP10
LIN1
Figure 4. LIN1/RIN1 Input Circuit
3. LINE2 Input Circuit
J5
C34
1u
LIN2/RIN2
6
RIN2
LIN2
4
3
C36
1u
Figure 5. LIN2/RIN2 Input Circuit
4. LINE4 Input Circuit
J2
LIN4/RIN4
C29
1u
6
RIN4
LIN4
4
3
C30
1u
Figure 6. LIN4/RIN4 Input Circuit
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[AKD4645-B]
(2) Output Circuits
1. Headphone-amp Output Circuit
C25
47u
R13
short
6
HPR
HPL
J1
HP
4
3
C26
47u
R14
short
C27
0.22u
C28
0.22u
R15
10
R16
10
Figure 6. Headphone-amp Output Circuit
2. LINE Output Circuit
C33
1u
R18
220
J4
LOUT/ROUT
6
ROUT
4
3
R19
20k
C35
1u
R20
220
LOUT
R21
20k
Figure 7. LINE Output Circuit
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[AKD4645-B]
4. External SPEAKER-Amp(AK7830) Output Circuit
TP2
VC-L-P
J6
6
VC-L-P
VC-L-N
4
3
TP3
VC-L-N
SPP-L
J8
TP4
VC-R-P
6
VC-R-P
VC-R-N
4
3
TP5
VC-R-N
SPP-R
Figure 8. External SPEAKER-Amp(AK7830) Output Circuit
∗ AKM assumes no responsibility for the trouble when using the above circuit examples.
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[AKD4645-B]
Control Software Manual
Set-up of evaluation board and control software
1. Connect IBM-AT compatible PC with AKD4645-B by 10-line type flat cable (packed with AKD4645-B). Take care
of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
2. Insert the CD-ROM labeled “AKD4645-B Evaluation Kit” into the CD-ROM drive.
3. Access the CD-ROM drive and double-click the icon of “akd4645.exe” to set up the control program. When control
the AK7830 with the serial mode, double-click the icon of “akd7830.exe” to set up the control program.
4. Then please evaluate according to the follows.
Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Port Reset” button.
3. Click “Write default” button
Explanation of each buttons
[Port Reset] :
Set up the USB interface board (AKDUSBIF-A) .
[Write default] : Initialize the register of AK4645.
[All Write] :
[Function1] :
[Function2] :
[Function3] :
[Function4] :
[Function5]:
Write all registers that is currently displayed.
Dialog to write data by keyboard operation.
Dialog to write data by keyboard operation.
The sequence of register setting can be set and executed.
The sequence that is created on [Function3] can be assigned to buttons and executed.
The register setting that is created by [SAVE] function on main window can be assigned to
buttons and executed.
[SAVE] :
[OPEN] :
[Write] :
[Filter] :
Save the current register setting.
Write the saved values to all register.
Dialog to write data by mouse operation.
Set Programmable Filter (FIL1, FIL3, EQ) of AK4645 easily.
Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
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[AKD4645-B]
Explanation of each dialog
1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data
becomes “H” or “1”. If not, “L” or “0”.
If you want to write the input data to the AK4645, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog] :
Dialog to write data by keyboard operation
Address Box: Input registers address in 2 figures of hexadecimal.
Data Box: Input registers data in 2 figures of hexadecimal.
If you want to write the input data to the AK4645, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog]
Dialog to evaluate DATT
There are dialogs corresponding to register of 09h, 0Ah, 0Ch, and 0Dh.
:
Address Box:
Start Data Box:
End Data Box:
Interval Box:
Step Box:
Input registers address in 2 figures of hexadecimal.
Input starts data in 2 figures of hexadecimal.
Input end data in 2 figures of hexadecimal.
Data is written to the AK4645 by this interval.
Data changes by this step.
Mode Select Box:
If you check this check box, data reaches end data, and returns to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
If you do not check this check box, data reaches end data, but does not return to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
If you want to write the input data to the AK4645, click [OK] button. If not, click [Cancel] button.
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[AKD4645-B]
4. [SAVE] and [OPEN]
4-1. [SAVE]
All of current register setting values displayed on the main window are saved to the file. The extension of file name is
“akr”.
<Operation flow>
(1) Click [SAVE] Button.
(2) Set the file name and click [SAVE] Button. The extension of file name is “akr”.
4-2. [OPEN]
The register setting values saved by [SAVE] are written to the AK4645. The file type is the same as [SAVE].
<Operation flow>
(1) Click [OPEN] Button.
(2) Select the file (*.akr) and Click [OPEN] Button.
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5. [Function3 Dialog]
The sequence of register setting can be set and executed.
(1) Click [F3] Button.
(2) Set the control sequence.
Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused.
(3) Click [START] button. Then this sequence is executed.
The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step.
This sequence can be saved and opened by [SAVE] and [OPEN] button on the Function3 window. The extension of file
name is “aks”.
Figure 9. Window of [F3]
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6. [Function4 Dialog]
The sequence file (*.aks) saved by [Function3] can be listed up to 10 files, assigned to buttons and then executed.
When [F4] button is clicked, the window as shown in Figure 10 opens.
Figure 10. [F4] window
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6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks) saved by [Function3].
The sequence file name is displayed as shown in Figure 11. ( In case that the selected sequence file name is
“DAC_Stereo_ON.aks”)
Figure 11. [F4] window(2)
(2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The name assign of sequence file displayed on [Function4] window can be saved to the file. The file name
is “*.ak4”.
[OPEN] : The name assign of sequence file(*.ak4) saved by [SAVE] is loaded.
6-3. Note
(1) This function doesn't support the pause function of sequence function.
(2) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder.
(3) When the sequence is changed in [Function3], the sequence file (*.aks) should be loaded again in order to reflect the
change.
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7. [Function5 Dialog]
The register setting file(*.akr) saved by [SAVE] function on main window can be listed up to 10 files, assigned to
buttons and then executed. When [F5] button is clicked, the window as shown in Figure 12 opens.
Figure 12. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
The register setting file name is displayed as shown in Figure 13. (In case that the selected file name is
“DAC_Output.akr”)
(2) Click [WRITE] button, then the register setting is executed.
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[AKD4645-B]
Figure 13. [F5] windows(2)
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The name assign of register setting file displayed on [Function5] window can be saved to the file. The file
name is “*.ak5”.
[OPEN] : The name assign of register setting file(*.ak5) saved by [SAVE] is loaded.
7-3. Note
(1) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder.
(2) When the register setting is changed by [SAVE] Button on the main window, the register setting file (*.akr) should be
loaded again in order to reflect the change.
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8. [Filter Dialog]
This dialog can easily set the AK4645’s programmable filter.
Figure 6. [Filter] window
8-1. Value input columns on left side
[Sampling Rate]
Æ Input value of sampling frequency [unit : Hz] <default : 44100>
[Cut Off Frequency of FIL1] Æ Input value of cut off frequency of FIL1 [unit : Hz] <default : 150>
[Cut Off Frequency of FIL3] Æ Input value of cut off frequency of FIL3 [unit : Hz] <default : 4000>
[Pole Frequency of EQ]
[Zero Frequency of EQ]
[FIL3 GAIN]
Æ Input value of pole frequency of EQ [unit : Hz]
Æ Input value of zero frequency of EQ [unit : Hz]
Æ Input value of gain of FIL3 (0~−10dB) [unit : dB]
Æ Input value of gain of EQ (+12~0dB) [unit : dB]
[EQ GAIN]
8-2. Check box on left side
Check Box
FIL1
Check
FIL1 bit =“1”
FIL3 bit =“1”
Check off
FIL1 bit =“0”
FIL3 bit =“0”
FIL3
EQ
EQ bit =“1”
EQ bit =“0”
LPF of FIL1
LPF of FIL3
F1AS bit =“1”(LPF)
F3AS bit =“1”(LPF)
F1AS bit =“0”(HPF)
F3AS bit =“0”(HPF)
8-2. [Register Setting] panel and [Register Setting] button on right side
Click [Register setting] button, then filter coefficient set by 8-1 and 8-2 is written on [Register setting] panel.
(It is also written to the actual control register of the AK4645.)
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MEASUREMENT RESULTS
1. EXT mode (slave mode)
[Measurement condition]
● Measurement unit: Audio Precision, System two Cascade
● EXT Slave Mode
● MCLK: 256fs
● BICK: 64fs
● Bit: 16bit
● Measurement Frequency: 20Hz ∼ 20kHz
● Power Supply: AVDD=DVDD=HVDD=TVDD=3.3V
● Temperature: Room
● Input Frequency: 1kHz
● Sampling Frequency: 44.1kHz
[Measurement Results]
ADC (LIN2/RIN2) characteristics (IVOL=0dB, ALC1 = OFF, LIN2/RIN2 Æ ADC Æ IVOL)
L[dB] R[dB]
+20dB +20dB
MIC-Amp Gain
0dB
0dB
S/(N+D)
DR
88.7
95.6
95.6
83.6
87.1
87.1
88.5
95.6
95.6
83.5
87.1
87.1
20kHzLPF (−1dB)
20kHzLPF + A-weighted
S/N
20kHzLPF + A-weighted
DAC (LOUT/ROUT) characteristics (RL=20kΩ, DAC Æ LOUT/ROUT)
L[dB]
R[dB]
S/(N+D)
S/N
88.3
88.1
20kHzLPF (−3dB)
20kHzLPF + A-weighted
94.4
94.4
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2. PLOT DATA
2-1 ADC (LIN2/RIN2 Æ ADC) (+20dB)
AK4645 LIN2 -> ADC (MGain+20dB) THD+N vs Input Level
fs=44.1kHz, fin=1kHz
-70
-72
-74
-76
-78
-80
-82
-84
-86
-88
-90
-92
-94
-96
-98
d
B
F
S
-100
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
Figure 15. THD+N vs. Input Level
AK4645 THD+N vs Input Frequency
fs=44.1kHz, -1dB Input
-60
-62
-64
-66
-68
-70
-72
-74
-76
-78
-80
-82
-84
-86
-88
-90
-92
-94
-96
-98
d
B
F
S
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 16. THD+N vs. Input Frequency
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[AKD4645-B]
AK4645 LIN2-->ADC (MIC=+20dB) Linearity
fs=44.1kHz, fin=1kHz
+0
-10
-20
-30
-40
d
B
F
S
-50
-60
-70
-80
-90
-100
-110
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 17. Linearity
AK4645 LIN2-->ADC (MIC=+20dB) Frequency Response
fs=44.1kHz, -1dB Input
+0
-0.2
-0.4
-0.6
-0.8
-1
-1.2
-1.4
-1.6
-1.8
-2
d
B
F
S
-2.2
-2.4
-2.6
-2.8
-3
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 18. Frequency Response
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AK4645 LIN2-->ADC (MIC=+20dB) FFT
fs=44.1kHz, fin=1kHz, -1dB Input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
-80
S
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 19. FFT Plot (Input level= -1dBFs)
AK4645 LIN2-->ADC (MIC=+20dB) FFT
fs=44.1kHz, fin=1kHz, -60dB Input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
-80
S
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 20. FFT Plot (Input level= -60dBFs)
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[AKD4645-B]
AK4645 LIN2-->ADC (MIC=+20dB) FFT
fs=44.1kHz, fin=1kHz, No Signal
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
-80
S
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 21. FFT Plot (No signal)
AK4645 Crosstalk
fs=44.1kHz, -1dB Input, Red -> Lch, Blue-> Rch
-70
T T T T T T T T T T T T
T
T
T T
T
T
-75
-80
-85
-90
-95
-100
-105
-110
-115
-120
-125
-130
-135
d
B
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 22. Crosstalk Plot
<KM084500>
2006/07
- 22 -
ASAHI KASEI
[AKD4645-B]
2-2 ADC (LIN2/RIN2 Æ ADC) (0dB)
AK4645 LIN2 -> ADC (MGain 0dB) THD+N vs Input Level
fs=44.1kHz, fin=1kHz
-70
-72
-74
-76
-78
-80
-82
-84
-86
-88
-90
-92
-94
-96
-98
d
B
F
S
-100
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
Figure 23. THD+N vs. Input Level
AK4645 THD+N vs Input Frequency
fs=44.1kHz, fin=1kHz
-70
-72
-74
-76
-78
-80
-82
-84
-86
-88
-90
-92
-94
-96
-98
d
B
F
S
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 24. THD+N vs. Input Frequency
<KM084500>
2006/07
- 23 -
ASAHI KASEI
[AKD4645-B]
AK4645 Linearity
fs=44.1kHz, fin=1kHz
+0
-10
-20
-30
-40
d
B
F
S
-50
-60
-70
-80
-90
-100
-110
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 25. Linearity
AK4645 Frequency Response
fs=44.1kHz, -1dB Input
+0
-0.2
-0.4
-0.6
-0.8
-1
-1.2
-1.4
-1.6
-1.8
-2
d
B
F
S
-2.2
-2.4
-2.6
-2.8
-3
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 26. Frequency Response
<KM084500>
2006/07
- 24 -
ASAHI KASEI
[AKD4645-B]
AK4645 LIN2-->ADC FFT
fs=44.1kHz, fin=1kHz, -1dB Input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
-80
S
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 27. FFT Plot (Input level= -1dBFs)
AK4645 LIN2-->ADC FFT
fs=44.1kHz, fin=1kHz, -60dB Input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
-80
S
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 28. FFT Plot (Input level = -60dBFs)
<KM084500>
2006/07
- 25 -
ASAHI KASEI
[AKD4645-B]
AK4645 LIN2-->ADC FFT
fs=44.1kHz, fin=1kHz, No Signal
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
-80
S
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 29. FFT Plot ( No signal )
AK4645 Crosstalk
fs=44.1kHz, -1dB Input, Red -> Lch, Blue-> Rch
-70
-75
-80
-85
-90
-95
-100
d
B
-105
-110
-115
-120
-125
-130
-135
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 30. Crosstalk Plot
<KM084500>
2006/07
- 26 -
ASAHI KASEI
[AKD4645-B]
2-3 DAC (DACÆ LOUT/ROUT)
Vin = 0dB
AK4645 DAC -> LINEOUT THD+N vs InputLevel
fs=44.1kHz, fin=1kHz
-60
-62.5
-65
-67.5
-70
-72.5
-75
d
B
-77.5
-80
-82.5
-85
r
A
-87.5
-90
-92.5
-95
-97.5
-100
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 31. THD+N vs. Input Level
AK4645 THD+N vs Input Frequency
fs=44.1kHz
-60
-62
-64
-66
-68
-70
-72
-74
-76
-78
-80
-82
-84
-86
-88
-90
-92
-94
-96
-98
d
B
r
A
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 32.THD+N vs. Input Frequency (Input Level = 0dBFS)
<KM084500>
2006/07
- 27 -
ASAHI KASEI
[AKD4645-B]
AK4645 DAC -> LINEOUT Linearity
fs=44.1kHz, fin=1kHz
+0
-10
-20
-30
-40
d
B
-50
r
-60
A
-70
-80
-90
-100
-110
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 33. Linearity
AK4645 DAC -> LINEOUT Frequency Response
fs=44.1kHz
+1
+0.8
+0.6
+0.4
+0.2
d
B
r
+0
-0.2
-0.4
-0.6
-0.8
A
-1
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 34. Frequency Response
<KM084500>
2006/07
- 28 -
ASAHI KASEI
[AKD4645-B]
AK4645 DAC -> LINEOUT FFT
fs=44.1kHz, fin=1kHz, 0dB Input
+10
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
-80
A
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 35. FFT Plot (Input level= 0dBFs)
AK4645 DAC -> LINEOUT FFT
fs=44.1kHz, fin=1kHz, -60dB Input
+10
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
-80
A
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 36. FFT Plot (Input level = -60dBFs)
<KM084500>
2006/07
- 29 -
ASAHI KASEI
[AKD4645-B]
AK4645 DAC -> LINEOUT FFT
fs=44.1kHz, fin=1kHz, No signal
+10
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
-80
A
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 37. FFT Plot (No signal)
AK4645 DAC -> LINEOUT Crosstalk
fs=44.1kHz
+60
T
T
T T
+40
+20
+0
-20
d
B
-40
-60
-80
-100
-120
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 38. Crosstalk Plot
<KM084500>
2006/07
- 30 -
ASAHI KASEI
[AKD4645-B]
Revision History
Date
(YY/MM/DD)
06/07/12
Manual
Revision
KM084500
Board
Revision
0
Reason
Contents
First Edition
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before considering
any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or
authorized distributor concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the
application or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license
or other official approval under the law and regulations of the country of export pertaining to customs
and tariffs, currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any safety, life
support, or other hazard related device or system, and AKM assumes no responsibility relating to
any such use, except with the express written consent of the Representative Director of AKM. As
used here:
(a) A hazard related device or system is one designed or intended for life support or maintenance of
safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its
failure to function or perform may reasonably be expected to result in loss of life or in significant
injury or damage to person or property.
(b) A critical component is one whose failure to function or perform may reasonably be expected to
result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or
system containing it, and which must therefore meet very high standards of performance and
reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or
otherwise places the product with a third party to notify that party in advance of the above content
and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability
for and hold AKM harmless from any and all claims arising from the use of said product in the
absence of such notification.
<KM084500>
2006/07
- 31 -
A
B
C
D
E
JP1
GND
DGND
AGND
E
D
C
B
A
E
D
C
B
A
VCC
VCC
JP2
VCC
REG
REG-SEL
T1
TA48033F
IN
OUT
REG
+
C1
47u
C2
0.1u
C3
0.1u
L1
10u
U1
D3V
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
MPWR
RIN4
MPWR
VCOM
AVSS
RIN4/IN4-
C5
1u
MUTET
HPL
+
C6
2.2u
C4
0.1u
HPL
HPR
C7
C8
0.1u
+
10u
AVDD
HPR
JP4
RIN3 RIN3
JP5
HVDD
C9
4.7n
R1
5V
AK4645
VCC
REG
JP3
I2C-SEL
10k
VCOC/RIN3
I2C
HVDD
HVSS
MCKO
MCKI
TVDD
VCOC
JP6
TVDD-SEL
C10
0.1u
C11
3.3V
+
10u
R2 47k
L2
TP1
1
2
TVDD
R3 51
R4 51
short
PDN
CSN
PDN
+
C12
47u
CSN/CAD0
MCKI
R5
10
C13
0.1u
R6
51
R7
51
R8
51
R9
51
R10
51
R11
51
C14
0.1u
C15
10u
+
TVDD
C16
10u
Title
AKD4645-B
Size
A3
Document Number
Rev
0
AK4645
Date:
Sheet
E
of
Tuesday, June 13, 2006
1
5
A
B
C
D
A
B
C
D
E
C17
10u
A
B
C
D
E
A
B
C
D
E
C18
2.2u
VC-R-P
U2
L3
1u
C19
10u
DIODE-SS21003M
3
19
12
11
10
9
VC-R-N
VC-L-P
VC-L-N
VC-R-N
VC-L-P
VC-L-N
VSS4
VCOIL
TEST
2
5
6
D1
20
21
22
23
24
JP7
D3V
BST-PD
D3V
BST-PDN
VFB
AK7830
GND
C20
0.1u
8
VCC
D3V
VBAT
DVDDI
PDN
7
SPK-PDN
IN-L-P
AK7830
C21
0.1u
LOUT
ROUT
C22
0.01u
CDTI
C23
0.1u
CCLK
D3V
R12
10k
D2
HSU119
H
FOR-SPK-PDN
L
SW1
C24
SPK-PDN 0.1u
Title
Size
AKD4645-B
Document Number
Rev
0
A3
AK7830
Date:
Sheet
E
of
Wednesday, June 14, 2006
2
5
A
B
C
D
A
B
C
D
E
C25
47u
R13
short
6
HPR
HPL
J1
HP
E
D
C
B
A
E
D
C
B
A
4
3
C26
47u
R14
short
J2
C29
1u
LIN4/RIN4
6
RIN4
LIN4
C27
C28
4
3
0.22u
0.22u
C30
1u
R15
10
R16
10
C31
1u
J3
RIN3
MIN/LIN3/RIN3
6
C32
1u
R17
20k
4
3
MIN/LIN3
JP8
C33
1u
R18
220
J4
LOUT/ROUT
LIN3
6
ROUT
R19
20k
4
3
J5
C34
1u
LIN2/RIN2
6
C35
1u
R20
220
RIN2
4
3
LOUT
R21
20k
C36
1u
LIN2
R22
2.2k
TP2
VC-L-P
MPWR
J6
6
VC-L-P
R23
2.2k
TP3
VC-L-N
4
3
VC-L-N
SPP-L
J8
J7
LIN1/RIN1
JP9
RIN1
C37
1u
6
TP4
VC-R-P
RIN1
LIN1
4
3
6
VC-R-P
VC-R-N
C38
1u
TP5
VC-R-N
4
3
SPP-R
JP10
LIN1
Title
AKD4645-B
Size
A3
Document Number
Rev
0
Input/Output
Date:
Sheet
E
of
Monday, June 05, 2006
3
5
A
B
C
D
A
B
C
D
E
D3V
L4
47u
E
D
C
B
A
E
D
C
B
A
PORT1
VCC
3
C41
10u
2
1
GND
OUT
C40
D3V
+
C39
0.1u
R24
470
10u
TORX141
C42
0.1u
C43
R25
18k
0.47u
U3
1
2
36
35
34
33
32
31
30
29
28
27
26
25
IPS0
NC
INT0
OCKS0
OCKS1
CM1
4114-INT0
R26
47k
3
DIF0
TEST2
DIF1
NC
4
D3V
R27
47k
5
CM0
6
PDN
4114-PDN
TP6
C44
5p
AK4114
7
DIF2
IPS1
P/SN
XTL0
XTL1
VIN
XTI
D3V
X1
C45
11.2896MHz 5p
SDTO
8
XTO
9
DAUX
MCKO2
BICK
10
11
12
DIR-BICK
SDTO
DIR-SDTO
C46
0.1u
C47
DIR-LRCK
DIR-MCLK
0.1u
D3V
C48
10u
C49
10u
R28
5.1
PORT2
IN
VCC
3
2
D3V
1
GND
TOTX141
C50
0.1u
Title
Size
AKD4645-B
Document Number
Rev
0
A3
DIR/DIT
Date:
Sheet
E
of
Monday, June 05, 2006
4
5
A
B
C
D
A
B
C
D
E
JP11
DIR-MCLK
DIR-MCLK
JP13
DIR-BICK
E
D
C
B
A
E
D
C
B
A
DIR-BICK
U4
U5
BICK
3
4
21
20
19
18
17
16
15
14
3
4
21
20
19
18
17
16
15
14
JP14
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
MCKI
SDTI
DIR-LRCK
DIR-LRCK
LRCK
3-wire
I2C
5
5
RP1
RP2
JP12
SDA
6
5
4
3
2
1
6
5
4
3
2
1
CDTI
6
6
7
7
8
8
CCLK
9
9
47k
47k
AVC
D3V
10
10
AVC
CSN
PDN
TVDD
C51
0.1u
D3V
1
2
24
23
22
13
1
2
24
23
22
13
VCCA
VCCB
VCCB
OE
VCCA
DIR
VCCB
VCCB
OE
C52
0.1u
TVDD
C54
0.1u
TVDD
JP15
DIR
C53
0.1u
11
12
11
12
GND
GND
GND
GND
Signal V select
GND
GND
TVDD
Master
Slave
74AVC8T245
74AVC8T245
JP16
DIR-SEL
PORT3
MCLK
BICK
LRCK
SDTI
VCC
1
2
3
4
5
10 GND
R29
R31
10k
10k
R30
R32
R33
470
470
470
9
8
7
6
GND
NC
D3V
NC
R34
10k
SDTO
DSP
R35
10k
PORT4
1
2
3
4
5
10 CSN
9
8
7
6
SCL/CCLK
SDA/CDTI
D3V
D3V
4114-PDN
CTRL
JP17
CAD0
R36
10k
JP18
SDTO-IN
D3
U6
1A
1Y
2A
2Y
3A
3Y
HSU119
1
2
3
4
5
6
8
ADC
4Y
4A
5Y
5A
6Y
6A
SPK-PDN
FOR-SPK-PDN
SDTO
9
10
11
12
13
L
H
JP19
SDTI
4114-INT0
D3V
SW2
PDN
C55
0.1u
DIR-SDTO
DIR
14
7
Vcc
GND
C56
0.1u
74HC14
R37
1k
LED1
K
A
D3V
ERF
Title
Size
AKD4645-B
Document Number
Rev
0
A3
LOGIC
Date:
Sheet
of
5
Tuesday, June 06, 2006
5
A
B
C
D
E
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