UCN5815EPTR [ALLEGRO]
Vacuum Fluorescent Driver, 8-Segment, BIMOS, PQCC28, PLASTIC, LCC-28;
| 型号： | UCN5815EPTR |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | Vacuum Fluorescent Driver, 8-Segment, BIMOS, PQCC28, PLASTIC, LCC-28 驱动器 |
| 文件： | 总6页 (文件大小：158K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
5815
BiMOS II 8-BIT
LATCHED SOURCE DRIVERS
Designed primarily for use with high-voltage vacuum-fluorescent
displays, the UCN5815A and UCN5815EP BiMOS II integrated
circuits consist of eight npn Darlington source drivers with output pull-
down resistors, a CMOS latch for each driver, and common STROBE,
BLANKING, and ENABLE functions.
UCN5815A
1
2
3
4
22
21
20
19
18
17
16
BLANKING
ENABLE
STROBE
LOGIC
SUPPLY
V
DD
OUT
1
IN
1
BiMOS II devices have considerably better data-input rates than
the original BiMOS circuits. With a 5 V logic supply, they will operate
to at least 4.4 MHz. With a 12 V supply, significantly higher speeds
are obtained. The CMOS inputs cause minimum loading and are
compatible with standard CMOS and NMOS logic commonly found in
microprocessor designs. TTL circuits may require the use of appropri-
ate pull-up resistors.
IN
2
OUT
OUT
OUT
OUT
OUT
OUT
OUT
2
3
4
5
6
7
8
5
6
IN
3
IN
4
7
8
IN
5
IN
6
15
IN
7
9
14
13
12
The bipolar outputs may be used as segment, dot (matrix), bar, or
digit drivers in vacuum-fluorescent displays. All eight outputs can be
activated simultaneously at ambient temperatures in excess of 75°C.
To simplify printed wiring board layout, output connections are
opposite the inputs. A minimum component display subsystem,
requiring few or no discrete components, can be assembled using the
UCN5815A/EP with the UCN5810AF/EPF/LWF, UCN5812AF/EPF,
or UCN5818AF/EPF serial-to-parallel latched drivers.
10
IN
8
11
V
LOAD
SUPPLY
GROUND
BB
Dwg. PP-015-3
ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
Output Voltage, VOUT . . . . . . . . . . . . . . 60 V
Logic Supply Voltage Range,
VDD . . . . . . . . . . . . . . . . . . 4.5 V to 15 V
Load Supply Voltage Range,
Suffix ‘A’ devices are furnished in a standard 22-pin plastic DIP;
suffix ‘EP’ indicates a 28-lead PLCC.
VBB . . . . . . . . . . . . . . . . . . 5.0 V to 60 V
Input Voltage Range,
VIN . . . . . . . . . . . -0.3 V to VDD + 0.3 V
Continuous Output Current,
IOUT . . . . . . . . . . . . . . . . . . . . . . -40 mA
Package Power Dissipation, PD
(UCN5815A) . . . . . . . . . . . . . . . 2.5 W*
(UCN5815EP) . . . . . . . . . . . . . 2.27 W*
Operating Temperature Range,
FEATURES
I To 4.4 MHz Date-lnput Rate
I High-Voltage Source Outputs
I CMOS, NMOS, TTL Compatible Inputs
I Low-Power CMOS Latches
I Internal Pull-Down Resistors
I Wide Supply-Voltage Range
TA . . . . . . . . . . . . . . . . . -20°C to +85°C
Storage Temperature Range,
TS . . . . . . . . . . . . . . . . -55°C to +150°C
Always order by complete part number:
* Derate linearly to 0 W at +150°C.
Caution: CMOS devices have input static
protection but are susceptible to damage
when exposed to extremely high static
electrical charges.
Part Number
UCN5815A
UCN5815EP
Package
22-Pin DIP
28-Lead PLCC
5815
BiMOS II
8-BIT LATCHED
SOURCE DRIVERS
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 60 V, VDD = 5 V and 12 V
(unless otherwise noted).
Limits
Max.
Characteristic
Symbol
VOUT
VOUT
IOUT
Test Conditions
Min.
—
Units
V
Output Off Voltage
Output On Voltage
Output Pull-Down Current
Output Leakage Current
Input Voltage
1.0
—
IOUT = -25 mA, VBB = 60 V
57.5
400
—
V
VOUT = VBB
TA = 70°C
VDD = 5.0 V
850
-15
5.3
µA
µA
V
IOUT
VIN(1)
3.5
10.5
-0.3
—
VDD = 12 V
12.3
+0.8
100
240
—
V
VIN(0)
IIN(1)
V
Input Current
VDD = VIN = 5.0 V
DD = VIN = 12 V
µA
µA
kΩ
mA
µA
µA
µA
mA
mA
V
—
Input lmpedance
Supply Current
ZIN
lBB
VDD = 5.0 V
50
All outputs on, All outputs open
All outputs off, All outputs open
VDD = 5.0 V, All outputs off, All inputs = 0 V
—
10.5
100
100
200
1.0
—
lDD
—
V
DD = 12 V, All outputs off, All inputs = 0 V
DD = 5.0 V, One output on, All inputs = 0 V
—
V
—
VDD = 12 V, One output on, All inputs = 0 V
—
3.0
NOTE: Positive (negative) current is defined as going into (coming out of) the specified device pin.
TYPICAL INPUT
CIRCUIT
TYPICAL OUTPUT
DRIVER
V
DD
V
BB
OUT
IN
100 K
Dwg. No. EP-010-4A
Dwg. No. EP-021-3
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 1984, 2000 Allegro MicroSystems, Inc.
5815
BiMOS II
8-BIT LATCHED
SOURCE DRIVERS
UCN5815EP
Dwg. No. A-10,991
TIMING CONDITIONS
(VDD = 5 V, TA = +25°C, Logic Levels are VDD and Ground)
A. Minimum Data Active Time Before Strobe Enabled
(Data Set-Up Time) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 ns
B. Minimum Data Active Time After Strobe Disabled
(Data Hold Time) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 ns
Dwg. No. A-14,357
C. Minimum Strobe Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 ns
D. Typical Time Between Strobe Activation and Output
ON to OFF Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0 µs
E. Typical Time Between Strobe Activation and Output
Information present at an input is trans-
ferred to its latch when the STROBE and
ENABLE are high. The latches will continue
to accept new data as long as both STROBE
and ENABLE are held high. With either
STROBE or ENABLE in the low state, no
information can be loaded into the latches.
OFF to ON Transition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 ns
F. Minimum Data Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225 ns
Timing is representative of a 4.4 MHz data input rate. Higher speeds may be
attainable with increased supply voltage; operation at high temperatures will
reduce the specified maximum clock frequency.
When the BLANKING input is high, all
of the output buffers are disabled (off)
without affecting the information stored in
the latches. With the BLANKING input low,
the outputs are controlled by the state of the
latches.
TRUTH TABLE
INPUTS
ENABLE
OUTN
T-1
INN
STROBE
BLANK
T
0
1
1
1
X
0
0
X
X
1
1
X
X
X
0
0
0
0
1
0
0
0
0
X
X
X
1
0
1
0
0
1
0
1
0
1
0
X
X
X
X
X
X = irrelevant
T-1 = previous output state
T = present output state
5815
BiMOS II
8-BIT LATCHED
SOURCE DRIVERS
UCN5815A
Dimensions in Inches
(cvontrolling dimensions)
0.015
0.008
22
12
0.500
MAX
0.380
0.330
0.400
BSC
1
2
3
11
0.100
0.070
0.030
0.005
BSC
MIN
1.120
1.050
0.210
MAX
0.015
0.160
0.115
MIN
0.022
0.014
Dwg. MA-002-22 in
Dimensions in Millimeters
(for reference only)
0.381
0.204
22
12
12.70
MAX
9.65
8.39
10.16
BSC
1
2
3
11
2.54
0.070
0.030
0.13
BSC
MIN
28.44
26.67
5.33
MAX
0.39
4.06
2.93
MIN
0.558
0.356
Dwg. MA-002-22 mm
NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown.
2. Lead spacing tolerance is non-cumulative.
3. Lead thickness is measured at seating plane or below.
4. Supplied in standard sticks/tubes of 17 devices.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
5815
BiMOS II
8-BIT LATCHED
SOURCE DRIVERS
UCN5815EP
Dimensions in Inches
(controlling dimensions
18
12
0.013
0.021
19
11
0.219
0.191
0.026
0.032
0.456
0.450
INDEX AREA
0.495
0.485
0.050
BSC
0.219
0.191
25
5
26
28
1
4
0.020
0.456
0.450
MIN
0.165
0.180
0.495
0.485
Dwg. MA-005-28A in
Dimensions in Millimeters
(for reference only)
18
12
0.331
0.533
19
11
5.56
4.85
0.812
0.661
11.58
11.43
12.57
12.32
INDEX AREA
1.27
BSC
5.56
4.85
25
5
26
28
1
4
0.51
MIN
11.582
11.430
4.57
4.20
12.57
12.32
Dwg. MA-005-28A mm
NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown.
2. Lead spacing tolerance is non-cumulative.
3. Supplied in standard sticks/tubes of 38 devices or add “TR” to part number for tape and reel.
5815
BiMOS II
8-BIT LATCHED
SOURCE DRIVERS
POWER
INTERFACE DRIVERS
†
Function
Output Ratings*
SERIAL-INPUT LATCHED DRIVERS
Part Number
8-Bit (saturated drivers)
8-Bit
8-Bit
8-Bit
-120 mA
350 mA
350 mA
350 mA
350 mA
75 mA
250 mA
350 mA
100 mA
50 V‡
50 V
80 V
50 V‡
80 V‡
17 V
50 V
50 V‡
50 V
5895
5821
5822
5841
5842
6275
6595
6A595
6B595
8-Bit
8-Bit (constant-current LED driver)
8-Bit (DMOS drivers)
8-Bit (DMOS drivers)
8-Bit (DMOS drivers)
10-Bit (active pull-downs)
-25 mA
-25 mA
75 mA
-25 mA
60 V
60 V
17 V
60 V
5810-F and 6809/10
5811 and 6811
6276
12-Bit (active pull-downs)
16-Bit (constant-current LED driver)
20-Bit (active pull-downs)
5812-F and 6812
32-Bit (active pull-downs)
32-Bit
32-Bit (saturated drivers)
-25 mA
100 mA
100 mA
60 V
30 V
40 V
5818-F and 6818
5833
5832
PARALLEL-INPUT LATCHED DRIVERS
4-Bit
350 mA
50 V‡
5800
8-Bit
8-Bit
-25 mA
350 mA
100 mA
250 mA
60 V
50 V‡
50 V
50 V
5815
5801
6B273
6273
8-Bit (DMOS drivers)
8-Bit (DMOS drivers)
SPECIAL-PURPOSE DEVICES
Unipolar Stepper Motor Translator/Driver
Addressable 8-Bit Decoder/DMOS Driver
Addressable 8-Bit Decoder/DMOS Driver
Addressable 8-Bit Decoder/DMOS Driver
Addressable 28-Line Decoder/Driver
1.25 A
250 mA
350 mA
100 mA
450 mA
50 V‡
5804
6259
6A259
6B259
6817
50 V
50 V‡
50 V
30 V
*
Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage limits.
Negative current is defined as coming out of (sourcing) the output.
†
‡
Complete part number includes additional characters to indicate operating temperature range and package style.
Internal transient-suppression diodes included for inductive-load protection.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
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