ARA05050S12C [ANADIGICS]
Reverse Amplifier with Step Attenuator; 反向放大器,步进衰减器型号: | ARA05050S12C |
厂家: | ANADIGICS, INC |
描述: | Reverse Amplifier with Step Attenuator |
文件: | 总16页 (文件大小:551K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ARA05050
ReverseAmplifier with StepAttenuator
Data Sheet - Rev 2.2
FEATURES
•
Low Cost Integrated Monolothic GaAs Amplifier
With StepAttenuator
•
Attenuation Range: 0-30 dB, Adjustable In
2dB Increments Via a 4 Wire Parallel Control
•
Meets DOCSIS Distortion Requirements at
+58dBmV Output Signal Level
•
•
•
•
•
Low Distortion and Low Noise
Low Signal toNoise Ratio at All Gain Levels
Frequency Range: 5-100 MHz
5 Volt Operation
RoHS-Compliant Package Option
APPLICATIONS
•
•
•
•
•
MCNS/DOCSIS Compliant Cable Modems
CATV Interactive Set-Top Box
OpenCable Set-Top Box
S12 Package
28 Pin SSOP with Heat Slug
Fiber Nodes
Cable Modem Termination Systems (CMTS)
PRODUCT DESCRIPTION
The ARA05050 is a GaAs IC designed to provide the
reverse path amplification and output level control
functions in a CATV Set-Top Box or Cable Modem. It
incorporates a digitally controlled precision step
attenuator that is preceded by an ultra low noise
amplifier stage, and followed by an ultra-linear output
driver amplifier. This device is capable of meeting
the MCNS/DOCSIS requirements for harmonic
performance at a +58dBmV output level while
requiring only a single polarity +5V supply. Both the
input and the output are single-ended and matched
to 75 Ohms. The precision attenuator provides up to
30 dB of attenuation in 2 dB increments. The
ARA05050 is offered in a 28-pin SSOP package that
features a heat slug on the bottom of the package,
and is available in a RoHS-compliant option.
4
Attenuation Control
Upstream
ARA05050
Switch
LPF
Balun
QPSK/16QAM
RAM
ROM
Modulator
Clock
Data
Data
Transmit Enable/Disable
Microcontroller
with Ethernet
MAC
5-42 MHz
MAC
Clock
44 MHz
Double-
Conversion
Tuner
QAM Receiver
with FEC
54-860 MHz
SAW
Filter
RJ45
10Base-T
Diplexer
Connector
Transceiver
Figure 1. Cable Modem or Set Top BoxApplication Diagram
05/2005
ARA05050
RFOUT1 ATTIN
ATTOUT
RFIN2
30 dB, 2dB step digital attenuator section
A1
A2
RFIN
RFOUT
ISET1
16 dB
8 dB
4 dB
2 dB
ISET2
Figure 2: Functional Block Diagram
1
N/C
N/C
N/C
28
Bypass
ATTIN
RFOUT1
VREF1
2
3
27
26
25
24
23
22
21
20
19
ATTOUT
ISET2
4
RFIN2
5
ATTACG1
ATTACG1
ATTACG1
ATTACG1
RFIN
ATTACG2
ATTACG2
ATTACG2
ATTACG2
VREF2
6
7
8
9
10
ISET1
RFOUT
GND
11
12
13
14
18
17
16
15
VATT
16 dB
8 dB
2 dB
4 dB
Figure 3: Pinout
Data Sheet - Rev 2.2
05/2005
2
ARA05050
Table 1: Pin Description
PIN
1
NAME
DESCRIPTION
PIN
15
NAME
DESCRIPTION
(1)
N/C
No Connection
4 dB
2 dB
GND
4 dB Attenution Control Bit
2 dB Attenution Control Bit
Ground
2
Bypass Internal bypass
16
3
ATTIN
Attenuator Input (2)
17
Amplifier A1 Output and
Supply
Amplifier A2 Output and
Supply
4
5
RFOUT1
18
19
RFOUT
VREF2
Reference Voltage for
Amplifier A1
Reference Voltage for
Amplifier A2
VREF1
6
7
ATTACG1 Attenuator AC Ground 1 (3)
ATTACG1 Attenuator AC Ground 1 (3)
ATTACG1 Attenuator AC Ground 1 (3)
ATTACG1 Attenuator AC Ground 1 (3)
20
21
22
23
24
25
26
27
28
ATTACG2 Attenuator AC Ground 2 (3)
ATTACG2 Attenuator AC Ground 2 (3)
ATTACG2 Attenuator AC Ground 2 (3)
ATTACG2 Attenuator AC Ground 2 (3)
8
9
10
11
12
13
RFIN
ISET1
VATT
Amplifier A1 Input (4)
RFIN2
ISET2
Amplifier A2 Input (4)
Amplifier A1 Current Adjust (4)
Attenuator Supply
Amplifier A2 Current Adjust (4)
ATTOUT Attenuator Output (2)
(1)
16 dB 16 dB Attenution Control Bit
8 dB 82 dB Attenution Control Bit
N/C
N/C
No Connection
No Connection
(1)
14
Notes:
(1) All N/C pins should be grounded.
(2) Pins should be AC-coupled. No external DC bias should be applied.
(3) Pins should be AC-grounded. No external DC bias should be applied.
(4) Pins should be grounded or pulled to ground through a resistor. No external DC bias should be
applied.
Data Sheet - Rev 2.2
05/2005
3
ARA05050
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
PARAMETER
MIN
MAX
UNIT
Analog Supply: VSUP (pins 4, 12, 18)
0
9
VDC
V
SUP
2
Amplifier Reference Voltages (pins 5, 19)
-2.5
VDC
RF Power at Amplifier Inputs (pins 10, 24
Attenuator Controls (pins 13, 14, 15, 16)
Storage Temperature
)
-
0
+60
6
dBmV
V
-55
-
+200
260
5
oC
Soldering Temperature
oC
Soldering Time
-
Sec
Stresses in excess of the absolute ratings may cause permanent damage.
Functional operation is not implied under these conditions. Exposure to
absolute ratings for extended periods of time may adversely affect reliability.
Notes:
1. Pins 3 and 26 should be AC-coupled. No external DC bias should be applied.
2. Pins 10, 11, 24 and 25 should be grounded or pulled to ground through a resistor.
No external DC bias should be applied.
3. Pins 6, 7, 8, 9, 20, 21, 22 and 23 should be AC-grounded. No external DC bias
should be applied.
Table 3: Operating Ranges
PARAMETER
MIN
TYP
MAX
UNIT
Amplifier Supply: VDD (pins 4, 18)
Attenuator Supply: VATTN (pin 12)
Attenuator Controls (pins 13, 14, 15, 16)
Amplifier Reference Voltages (pins 5, 19)
Case Temperature
4.5
DD-0.5
0
5
5
7
7
VDC
VDC
V
V
-
5.5
-
-
1.75
25
VDC
oC
-40
85
The device may be operated safely over these conditions; however, parametric
performance is guaranteed only over the conditions defined in the electrical specifications.
Data Sheet - Rev 2.2
05/2005
4
ARA05050
Table 4: DC Electrical Specifications
TA=25°C; VDD, VATTN = +5.0 VDC
PARAMETER
MIN
TYP
MAX
UNIT
Amplifier A1 Current (pin 4)
Amplifier A2 Current (pin 18)
Attenuator Current (pin 12)
Total Power Consumption
-
-
-
-
75
100
8
95
130
-
mA
mA
mA
W
0.92
1.2
Table 5: AC Electrical Specifications
TA=25°C; VDD, VATTN = +5.0 VDC
PARAMETER
MIN
TYP
MAX
UNIT
COMMENTS
Gain (10 MHz)
ARA05050
30
31
32
32
33
33
dB
0 dB attenuation setting
5 to 100 MHz
ARA05050R
Gain Flatness
-
-
0.75
1.5
-
dB
Gain Variation over Temperature
-0.006
dB/°C
Attenuation Steps
2 dB
4 dB
1.6
3.8
1.85
4.0
2.2
4.2
5 to 42 MHz (1)
Monotonic
,
dB
8 dB
8.0
8.3
8.5
16 dB
16.0
16.6
17.0
2nd Harmonic Distortion Level
5 MHz
-
-
-60
-63
-55
-55
dBc
dBc
+58 dBmV into 75 Ohms
+58 dBmV into 75 Ohms
25 MHz
3rd Harmonic Distortion Level
5 MHz
-
-
-63
-63
-60
-60
25 MHz
3rd Order Output Intercept
78
-
-
-
-
dBmV
dBmV
dB
1 dB Gain Compression Point
70
1.7
Noise Figure
-
2.5
Notes:
(1) See Figures 5 and 6 for performance at higher frequencies.
All specifications as measured in ANADIGICS test fixture.
Data Sheet - Rev 2.2
05/2005
5
ARA05050
continued: AC Electrical Specifications
TA=25°C; VDD, VATTN = +5.0 VDC
PARAMETER
MIN
TYP
MAX
UNIT
COMMENTS
Output Noise Power
Active / No Signal / Min. Atten. Set.
Active / No Signal / Max. Atten. Set.
-
-
-
-
-37.6
-54.6
dBmV
Any 160 kHz bandwidth
from 5 to 42 MHz
Input Impedance
Input Return Loss
Output Impedance
-
-
-
-
75
-20
75
-
Ohms
dB
-15
-
75 Ohm system
75 Ohm system
Ohms
dB
Output Return Loss
-20
-15
Note: As measured in ANADIGICS test fixture
Table 6: Logic Interface Specifications
TA=25°C; VDD, VATTN = +5.0 VDC
PARAMETER
MIN
TYP
MAX
UNIT
COMMENTS
Attenuator Control Logic (1)
V
V
IN,
LOW
0
-
-
0.5
5.5
Bypasses atten. stage
Enables atten. stage
V
IN
,
HIGH
2.8
Attenuator Control Impedance
-
5K
-
Ohms
Note:
(1) Specification applies when 470 Ohm resistor is connected from pin 2 to ground (see test circuit in Figure 4).
Table 7: Attenuator Logic
ATTENUATION (dB)
0
L
L
L
L
2
H
L
L
L
4
L
H
L
L
6
H
H
L
8
L
L
H
L
10 12 14 16 18 20 22 24 26 28 30
2 dB Logic Input (pin 16)
4 dB Logic Input (pin 15)
8 dB Logic Input (pin 14)
16 dB Logic Input (pin 13)
H
L
L
H
H
L
H
H
H
L
L
L
H
L
L
H
L
H
H
L
L
L
H
L
L
H
H
H
H
H
H
H
H
L
L
L
H
H
H
H
L
H
H
H
H
Note: “L” = logic low, “H” = logic high
Data Sheet - Rev 2.2
05/2005
6
ARA05050
2 d B
4 d B
8 d B
1 6 d B
Figure 4: Test Circuit
Data Sheet - Rev 2.2
05/2005
7
ARA05050
PERFORMANCE DATA
Figure 5: S21 (0 - 16 dB Attenuation)
Figure 6: S21 (16 - 30 dB Attenuation)
Figure 7: S11 - Log Scale
Figure 8: S22 - Log Scale
Figure 9: S11 - Smith Chart
Figure 10: S22 - Smith Chart
Data Sheet - Rev 2.2
05/2005
8
ARA05050
Figure 11: Attenuator Switching Speed - 16 dB Step
Figure 12: Harmonic Performance
Data Sheet - Rev 2.2
05/2005
9
ARA05050
APPLICATION INFORMATION
Printed Circuit Board Layout Considerations
The ARA05050 is a high-performance RF device.
Special consideration must be given to certain
features of the the printed circuit board layout, as
they can affect the RF performance of the IC. Refer to
theANADIGICS application note “CATV ReverseAmp
w/ Step Attenuator” for more details.
Thermal Layout Considerations
The device package for theARA05050 features a heat
slug on the bottom of the package body. Use of the
heat slug is an integral part of the device design.
Soldering it to the ground plane of the PC board will
ensure the lowest possible thermal resistance for
the device, and will result in the longest MTF (mean
time to failure.)
Amplifier Enable / Disable
A PC board layout that optimizes the benefits of the
heat slug is shown in Figure 13. The via holes located
under the body of the device must be plated through
to a ground plane layer of metal, in order to provide
sufficient thermal conductivity. The recommended
solder mask outline is shown in Figure 14.
The ARA05050 includes two amplification stages that
each can be shut down through external control pins
VREF1 and VREF2 (pins 5 and 19, respectively.) By
applying a typical bias of 1.75 Volts to these pins, the
amplifiers are enabled. In order to fully disable an
amplifier, its control pin requires a negative bias of
-1.5 to -2.0 Volts.
ESD Sensitivity
Electrostatic discharges can cause permanent
damage to this device. Electrostatic charges
accumulate on test equipment and the human body,
and can discharge without detection. Proper
precautions and handling are strongly
recommended. Refer to the ANADIGICS application
note on ESD precautions.
Amplifier Bias Current
The ISET pins (11 and 25) set the bias current for the
amplification stages. Grounding these pins results
in the maximum possible current. By placing a
resistor from the pin to ground, the current can be
reduced. The recommended bias conditions use
the configuration shown in the test circuit schematic
in Figure 4.
Figure 13: PC Board Layout
Data Sheet - Rev 2.2
05/2005
10
ARA05050
Figure 14: Solder Mask Outline
Data Sheet - Rev 2.2
05/2005
11
ARA05050
PACKAGE OUTLINE
Figure 15: S12 Package Outline - 28 Pin SSOP with Heat Slug
Data Sheet - Rev 2.2
05/2005
12
ARA05050
COMPONENT PACKAGING
Volume quantities of the ARA05050 are supplied on
tape and reel. Each reel holds 3,500 pieces. Smaller
quantities are available in plastic tubes of 50 pieces.
Figure 16: Reel Dimensions
DIRECTIONOFFEED
Figure 17: Tape Dimensions
Data Sheet - Rev 2.2
05/2005
13
ARA05050
NOTES
Data Sheet - Rev 2.2
05/2005
14
ARA05050
NOTES
Data Sheet - Rev 2.2
05/2005
15
ARA05050
ORDERING INFORMATION
TEMPERATURE
PACKAGE
ORDER NUMBER
ARA05050S12CTR
ARA05050S12C
COMPONENT PACKAGING
3,500 piece tape and reel
RANGE
DESCRIPTION
28 Pin SSOP
with Heat Slug
-40 to 85 0C
28 Pin SSOP
with Heat Slug
-40 to 85 0C
-40 to 85 0C
Plastic tubes (50 pieces per tube)
RoHS-compliant
28 Pin SSOP
with Heat Slug
ARA05050RS12P1
3,500 piece tape and reel
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: Mktg@anadigics.com
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without
notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are
subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are
assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges
customers to verify that the information they are using is current before placing orders.
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS
product in any such application without written consent is prohibited.
Data Sheet - Rev 2.2
05/2005
16
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