AWT6634 [ANADIGICS]
HELP3DC UMTS1700 (Band 4 & 9) LTE/WCDMA/CDMA Linear PA Module; HELP3DC UMTS1700 （频段4和9）的LTE / WCDMA / CDMA线性功率放大器模块
| 型号： | AWT6634 |
| 厂家： | 
ANADIGICS, INC |
| 描述： | HELP3DC UMTS1700 (Band 4 & 9) LTE/WCDMA/CDMA Linear PA Module |
| 文件： | 总14页 (文件大小：845K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AWT6634
HELP3DCTM UMTS1700 (Band 4 & 9)
LTE/WCDMA/CDMA Linear PA Module
DATA SHEET - Rev 2.1
FEATURES
•
CDMA/EVDO, WCDMA/HSPA and LTE
Compliant
•
3rd Generation HELPTM technology
•ꢀ HighꢀEfficiency:ꢀ(LTEꢀwaveform)
ꢀ
ꢀ
•ꢀꢀ35ꢀ%ꢀ@ꢀPOUTꢀ=ꢀ+27.25ꢀdBm
A
W
T6634
•ꢀꢀ20ꢀ%ꢀ@ꢀPOUT = +16 dBm
•ꢀ SimplerꢀCalibrationꢀwithꢀonlyꢀ2ꢀBiasꢀModes
•ꢀꢀ OptimizedꢀforꢀSMPSꢀSupply
•ꢀꢀ LowꢀQuiescentꢀCurrent:ꢀ8mA
•ꢀ LowꢀLeakageꢀCurrentꢀinꢀShutdownꢀMode:ꢀ4ꢀµA
•
Internal Voltage Regulator
•ꢀ Integratedꢀ“daisyꢀchainable”ꢀdirectionalꢀcouplersꢀ
withꢀCPLIN and CPLOUTꢀPorts
10 Pin 3 mm x 3 mm x 1 mm
Surface Mount Module
•ꢀ Optimizedꢀforꢀaꢀ50ꢀΩꢀSystemꢀ
•ꢀ LowꢀProfileꢀMiniatureꢀSurfaceꢀMountꢀPackage
•ꢀ InternalꢀDCꢀblocksꢀonꢀIN/OUTꢀRFꢀports
•ꢀ 1.8ꢀVꢀControlꢀLogic
areꢀtwoꢀselectableꢀbiasꢀmodesꢀthatꢀoptimizeꢀefficiencyꢀ
forꢀdifferentꢀoutputꢀpowerꢀlevels,ꢀandꢀaꢀshutdownꢀmodeꢀ
withꢀlowꢀleakageꢀcurrent,ꢀwhichꢀincreasesꢀhandsetꢀtalkꢀ
andꢀstandbyꢀtime.ꢀTheꢀself-containedꢀꢀ3ꢀmmꢀxꢀ3ꢀmmꢀxꢀ
1ꢀmmꢀsurfaceꢀmountꢀpackageꢀincorporatesꢀmatchingꢀ
networksꢀoptimizedꢀforꢀoutputꢀpower,ꢀefficiency,ꢀandꢀ
linearityꢀinꢀaꢀ50ꢀΩꢀsystem.
•ꢀ RoHSꢀCompliantꢀPackage,ꢀ260ꢀoC MSL-3
APPLICATIONS
•ꢀ WirelessꢀHandsetsꢀandꢀDataꢀDevicesꢀfor:
GND at Slug (pad)
ꢀ
ꢀ
•ꢀꢀWCDMA/HSPA/LTEꢀBandsꢀ3,4,9ꢀorꢀ10
•ꢀꢀCDMA/EVDOꢀAWS/KPCSꢀBand
1
2
3
4
5
10
9
V
BATT
VCC
PRODUCT DESCRIPTION
TheꢀAWT6634ꢀPAꢀisꢀdesignedꢀtoꢀprovideꢀhighlyꢀlinearꢀ
outputꢀforꢀWCDMAꢀ,ꢀCDMAꢀandꢀLTEꢀhandsetsꢀandꢀ
dataꢀ devicesꢀ withꢀ highꢀ efficiencyꢀ atꢀ bothꢀ highꢀ andꢀ
lowꢀ powerꢀ modes.ꢀ ꢀ Thisꢀ HELP3DCTM PA can be
usedꢀ withꢀ anꢀ externalꢀ switchꢀ modeꢀ powerꢀ supplyꢀ
(SMPS)ꢀtoꢀimproveꢀitsꢀeffciencyꢀandꢀreduceꢀcurrentꢀ
consumptionꢀfurtherꢀatꢀmediumꢀandꢀlowꢀoutputꢀpowers.ꢀ
Aꢀ“daisyꢀchainable”ꢀdirectionalꢀcouplerꢀisꢀintegratedꢀ
inꢀtheꢀmoduleꢀthusꢀeliminatingꢀtheꢀneedꢀofꢀexternalꢀ
couplers.ꢀTheꢀdeviceꢀisꢀmanufacturedꢀonꢀanꢀadvancedꢀ
InGaPꢀHBTꢀMMICꢀtechnologyꢀofferingꢀstate-of-the-artꢀ
reliability,ꢀtemperatureꢀstability,ꢀandꢀruggedness.ꢀThereꢀ
CPL
RFIN
RFOUT
CPLIN
GND
Bias Control
8
V
MODE2 (N/C)
Voltage Regulation
7
VMODE1
6
VEN
CPLOUT
Figure 1: Block Diagram
02/2012
AWT6634
1
2
10
9
V
BATT
V
CC
RFIN
RFOUT
3
8
VMODE2 (N/C)
CPLIN
4
5
7
6
V
MODE1
GND
VEN
CPLOUT
Figure 2: Pinout (X-ray Top View)
Table 1: Pin Description
PIN
NAME
DESCRIPTION
Battery Voltage
RFꢀInput
1
2
V
BATT
RFIN
3
V
MODE2 (N/C) No Connection
Mode Control Voltage 1
4
V
MODE1
5
V
EN
PA Enable Voltage
Coupler Output
Ground
6
CPLOUT
GND
7
8
CPLIN
RFOUT
Coupler Input
RFꢀOutput
9
10
V
CC
Supply Voltage
DATA SHEET - Rev 2.1
2
02/2012
AWT6634
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
PARAMETER
MIN
0
MAX
+5
UNIT
V
Supply Voltage (VCC
)
Battery Voltage (VBATT
ControlꢀVoltagesꢀ(VMODE1, VENABLE
RFꢀInputꢀPowerꢀ(PIN
Storage Temperature (TSTG
)
0
+6
V
)
0
+3.5
+10
+150
V
)
-
dBm
°C
)
-40
Stresses in excess of the absolute ratings may cause permanent damage.
Functional operation is not implied under these conditions. Exposure
to absolute ratings for extended periods of time may adversely affect
reliability.
Table 3: Operating Ranges
PARAMETER
MIN
1710
+0.5
+3.1
TYP
-
MAX
1785
+4.35
+4.35
UNIT
MHz
V
COMMENTS
Operating Frequency (f)
Supply Voltage (VCC
)
+3.4
+3.4
P
P
OUT ≤ +28.25 dBm
OUT ≤ +28.25 dBm
Battery Voltage (VBATT
)
V
+1.35
0
+1.8
0
+3.1
+0.5
PA "on"
Enable Voltage (VENABLE
Mode Control Voltage (VMODE1
RF Output Power (POUT
)
V
V
PA "shut down"
+1.35
0
+1.8
0
+3.1
+0.5
Low Bias Mode
High Bias Mode
)
)
R99 WCDMA, HPM
HSPA (MPR=0), HPM
LTE, HPM
R99 WCDMA, LPM
HSPA (MPR=0), LPM
LTE, LPM
27.45(1) 28.25
26.45(1) 27.25
26.45(1) 27.25
28.25
27.25
27.25
17
16
16
3GPP TS 34.121-1, Rel 8
Table C.11.1.3 for WCDMA
SUBTEST 1
dBm
16.2(1)
15.2(1)
15.2(1)
17
16
16
TS 36.101 Rel 8 LTE
CDMA Output Power
HPM
LPM
26.7(1)
15.2(1)
27.5
16.0
-
-
dBm
°C
CDMA2000, RC-1
Case Te mperature (T
C
)
-30
-
+90
The device may be operated safely over these conditions; however, parametric performance is guaranteed only
overꢀtheꢀconditionsꢀdefinedꢀinꢀtheꢀelectricalꢀspecifications.
Notes:
(1) For operation at Vcc = +3.1 V, Pout is derated by 0.8 dB.
DATA SHEET - Rev 2.1
3
02/2012
AWT6634
Tableꢀ4:ꢀElectricalꢀSpecificationsꢀ-ꢀWCDMAꢀOperationꢀ(R99ꢀwaveform)
(T
C
= +25 °C, VCC = +3.4 V, VBATT = +3.4 V, VENABLE = +1.8 V, 50 Ω system)
COMMENTS
PARAMETER
MIN
TYP
MAX
UNIT
POUT
VMODE1
24.5
11.5
27
14
29.5
16
+28.25ꢀdBm
+17 dBm
0 V
1.8ꢀV
Gain
dB
dBc
dBc
%
-
-
-41
-41
-38
-38
+28.25ꢀdBm
+17 dBm
0 V
1.8ꢀV
ACLR1ꢀatꢀ5ꢀMHzꢀoffsetꢀ(1)
ACLR2ꢀatꢀ10ꢀMHzꢀoffset
Power-AddedꢀEfficiencyꢀ(1)
-
-
-55
-60
-48
-53
+28.25ꢀdBm
+17 dBm
0 V
1.8ꢀV
37
20
40
23
-
-
+28.25ꢀdBm
+17 dBm
0 V
1.8ꢀV
QuiescentꢀCurrentꢀ(Icq)
ꢀꢀLowꢀBiasꢀMode
-
-
-
-
8
16.5
0.6
0.6
5
mA
mA
mA
mA
VMODE1ꢀ=ꢀ+1.8ꢀV
Mode Control Current
Enable Current
0.3
0.3
2.5
through VMODE pin, VMODE1ꢀ=ꢀ+1.8ꢀV
through VENABLE pin
BATT Current
through VBATT, VMODE1ꢀ=ꢀ+1.8V
VBATT = +4.2 V, VCC = +4.2 V,
VENABLE = 0 V, VMODE1 = 0 V
LeakageꢀCurrent
-
4
7
µA
-
-
-
-134
-141
-134
-
-
-
1805ꢀ-ꢀ1880ꢀMHz
dBm/Hz 2110ꢀ-ꢀ2155ꢀMHz
1574.4ꢀ-ꢀ1576.4ꢀMHz
NoiseꢀinꢀReceiveꢀBand
Harmonics
2fO
3fO, 4fO
-
-
-37
-55
-34
-50
dBc
POUT <ꢀ+28.25ꢀdBm
Input Impedance
CouplingꢀFactor
Directivity
-
-
-
2:1
20
28
-
-
-
VSWR
dB
dB
Coupler IN-OUT
DaisyꢀChainꢀInsertionꢀLoss
698ꢀMHzꢀthroughꢀ2620ꢀMHz
Pinꢀ8ꢀtoꢀ6;ꢀShutdownꢀMode
-
0.25
-
dB
POUT <ꢀ+28.25ꢀdBm
In-bandꢀloadꢀVSWRꢀ<ꢀ5:1
Out-of-bandꢀloadꢀVSWRꢀ<ꢀ10:1
Appliesꢀoverꢀallꢀoperatingꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ
conditions
SpuriousꢀOutputꢀLevel
(allꢀspuriousꢀoutputs)
-
-
-70
dBc
Loadꢀmismatchꢀstressꢀwithꢀnoꢀꢀꢀꢀꢀꢀꢀꢀꢀ
permanent degradation or failure
8:1
-
-
-
VSWR Appliesꢀoverꢀfullꢀoperatingꢀrange
PhaseꢀDeltaꢀ(HPM-LPM)
-
10
Deg
Notes:
(1) ACLR and Efficiency measured at 1747.5 MHz.
DATA SHEET - Rev 2.1
4
02/2012
AWT6634
Tableꢀ5:ꢀElectricalꢀSpecificationsꢀ-ꢀLTEꢀOperationꢀ(RBꢀꢀ=ꢀ12,ꢀSTARTꢀ=ꢀ0,ꢀQPSK)
(T
C
= +25 °C, VBATT = VCC = +3.4 V, VENABLE = +1.8 V, 50 Ω system)
COMMENTS
PARAMETER
MIN
TYP
MAX UNIT
P
OUT
V
MODE1
24.5
11.5
27
14
29.5
dB
+27.25 dBm
+16 dBm
0 V
1.8 V
Gain
16
ACLR E-UTRA
-
-
-39
-39
-36
dBc
-36
+27.25 dBm
+16 dBm
0 V
1.8 V
at
10 MHz offset
ACLR1 UTRA (1)
-
-
-40
-40
-37
dBc
-37
+27.25 dBm
+16 dBm
0 V
1.8 V
at
7.5 MHz offset
ACLR2 UTRA
-
-
-60
-60
-55
dBc
-55
+27.25 dBm
+16 dBm
0 V
1.8 V
at
12.5 MHz offset
32
16
35
20
-
-
+27.25 dBm
+16 dBm
0 V
1.8 V
Power-Added Efficiency (1)
%
P
OUT ≤ +27.25 dBm
Spurious Output Level
(all spurious outputs)
In-band load VSWR < 5:1
-
-
-
<-70
-
dBc
Out-of-band load VSWR < 10:1
Applies over all operating conditions
Load mismatch stress with no
permanent degradation or failure
8:1
VSWR Applies over full operating range
Notes:
(1) ACLR and Efficiency measured at 1747.5 MHz.
DATA SHEET - Rev 2.1
5
02/2012
AWT6634
Tableꢀ6:ꢀElectricalꢀSpecificationsꢀ-ꢀCDMAꢀOperationꢀ(CDMAꢀ2000ꢀRC1ꢀWAVEFORM)
(T
C
= +25 °C, VCC = VBATT = +3.4 V, VENABLE = +1.8 V, 50 Ω system)
COMMENTS
PARAMETER
MIN
TYP
MAX
UNIT
POUT
VMODE1
24.5
11.5
27
14
29.5
16
+27.5ꢀdBm
+16 dBm
0 V
1.8ꢀV
Gain
dB
AdjacentꢀChannelꢀPower
atꢀ+1.25ꢀMHzꢀoffset
PrimaryꢀChannelꢀBWꢀ=ꢀ1.23ꢀMHz
AdjacentꢀChannelꢀBWꢀ=ꢀ30ꢀkHz
-
-
-50
-50
-46
-46
+27.5ꢀdBm
+16 dBm
0 V
1.8ꢀV
dBc
AdjacentꢀChannelꢀPower
atꢀ+1.98ꢀMHzꢀoffset
PrimaryꢀChannelꢀBWꢀ=ꢀ1.23ꢀMHz
AdjacentꢀChannelꢀBWꢀ=ꢀ30ꢀkHz
-
-
-55
-60
-51
-56
+27.5ꢀdBm
+16 dBm
0 V
1.8ꢀV
dBc
%
-
-
36
20
-
-
+27.5ꢀdBm
+16 dBm
0 V
1.8ꢀV
Power-AddedꢀEfficiency
SpuriousꢀOutputꢀLevel
(allꢀspuriousꢀoutputs)
-
-
-
-70
-
dBc
See Note 1
Loadꢀmismatchꢀstressꢀwithꢀno
permanent degradation or failure
Appliesꢀoverꢀfullꢀoperatingꢀ
range
8:1
VSWR
Notes:
(1) ACPR and Efficiency measured at 1747.5 MHz.
DATA SHEET - Rev 2.1
6
02/2012
AWT6634
APPLICATION INFORMATION
Toꢀ ensureꢀproperꢀperformance,ꢀ referꢀ toꢀ allꢀ relatedꢀ logicꢀlevelꢀ(seeꢀOperatingꢀRangesꢀtable)ꢀtoꢀVMODE1
.
Applicationꢀ Notesꢀ onꢀ theꢀANADIGICSꢀ webꢀ site:ꢀ TheꢀBiasꢀControlꢀtableꢀlistsꢀtheꢀrecommendedꢀmodesꢀ
http://www.anadigics.com
ofꢀoperationꢀforꢀvariousꢀapplications.ꢀVMODE2ꢀisꢀnotꢀ
necessaryꢀforꢀthisꢀPA.
Shutdown Mode
Theꢀpowerꢀamplifierꢀmayꢀbeꢀplacedꢀinꢀaꢀshutdownꢀ Twoꢀoperatingꢀmodesꢀareꢀavailableꢀtoꢀoptimizeꢀcurrentꢀ
modeꢀ byꢀ applyingꢀ logicꢀ lowꢀ levelsꢀ (seeꢀ Operatingꢀ consumption.ꢀHighꢀBias/HighꢀPowerꢀoperatingꢀmodeꢀ
Rangesꢀtable)ꢀtoꢀtheꢀVENABLE and VMODE1ꢀvoltages.
isꢀforꢀPOUTꢀlevelsꢀ> 16 dBm. At around 16 dBm output
power,ꢀtheꢀPAꢀshouldꢀbeꢀ“ModeꢀSwitched”ꢀtoꢀLowꢀpowerꢀ
modeꢀforꢀlowestꢀquiescentꢀcurrentꢀconsumption.
Bias Modes
TheꢀpowerꢀamplifierꢀmayꢀbeꢀplacedꢀinꢀeitherꢀaꢀLowꢀBiasꢀ
modeꢀorꢀaꢀHighꢀBiasꢀmodeꢀbyꢀapplyingꢀtheꢀappropriateꢀ
Vcontrols
Venable/Vmode(s)
Rise/Fall Max 1µS
Defined at 10% to 90%
of Min/Max Voltage
On Sequence Start
T_0N=0µ
Off Sequence Start
T_0FF=0µ
ON Sequence
OFF Sequence
RFIN
notes 1,2
VEN
VCC
note 1
T_0N+1µS
T_0N+3µS
T_0FF+2µS T_0FF+3µS
Referenced After 90%of Rise
Time
Referenced Before10%of Fall
Time
Figure 3: Recommended ON/OFF Timing Sequence
Notes:
(1) Level might be changed after RF is ON.
(2) RF OFF defined as PIN ≤ -30 dBm.
(3) Switching simultaneously between VMODE and VEN is not recommended.
Table 7: Bias Control
P
OUT
BIAS
MODE
Application
V
ENABLE
V
MODE1
V
CC
V
BATT
LEVELS
Highꢀpower
(HighꢀBiasꢀMode)
>+16 dBm
High
Low
+1.8ꢀV
+1.8ꢀV
0 V
0 V
1.5ꢀ-ꢀ4.35ꢀV
0.5ꢀ-ꢀ4.35ꢀV
0.5ꢀ-ꢀ4.35ꢀV
> 3.1 V
> 3.1 V
> 3.1 V
Med/lowꢀpower
(LowꢀBiasꢀMode)
+17 dBm
+1.8ꢀV
Shutdown
-
Shutdown
0 V
DATA SHEET - Rev 2.1
7
02/2012
AWT6634
VBATT
VCC
C2
0.1 µF
C1
33 pF
C3
C6
2.2 µF
GND at slug
2.2 µFceramic
1
2
10
9
V
BATT
V
CC
RFIN
RFIN
RFOUT
RFOUT
8
7
6
3
4
CPLIN
GND
V
V
V
MODE2 (N/C)
CPLIN
V
MODE1
MODE1
EN
5
CPLOUT
VEN
CPLOUT
C4
0.01 µF
Figure 4: Evaluation Circuit Schematic
RFOUT
C3
C6
C1
C2
RFIN
C4
CPLIN
Figure 5: Evaluation Board Layout
DATA SHEET - Rev 2.1
8
02/2012
AWT6634
HELP3DCTM
TheꢀAWT6634ꢀ hasꢀ anꢀ integratedꢀ voltageꢀ regulator,ꢀ
whichꢀ eliminatesꢀ theꢀ needꢀ forꢀ anꢀ externalꢀ constantꢀ
voltageꢀ source.ꢀ Theꢀ PAꢀ isꢀ turnꢀ on/offꢀ isꢀ controlledꢀ
by VENꢀpin.ꢀAꢀsingleꢀVMODE control logic (VMODE1)ꢀisꢀ
neededꢀ toꢀ operateꢀ thisꢀ device.ꢀ ꢀAWT6634ꢀ requiresꢀ
onlyꢀ twoꢀ calibrationꢀ sweepsꢀ forꢀ systemꢀ calibration,ꢀ
thusꢀsavingꢀcalibrationꢀtime.ꢀ
TheꢀAWT6634ꢀpowerꢀamplifierꢀmoduleꢀisꢀbasedꢀonꢀ
ANADIGICS proprietary HELP3DC™ technology.
TheꢀPAꢀisꢀdesignedꢀtoꢀoperateꢀupꢀtoꢀ17ꢀdBmꢀinꢀtheꢀlowꢀ
powerꢀmode,ꢀthusꢀeliminatingꢀtheꢀneedꢀforꢀthreeꢀgainꢀ
states,ꢀ whileꢀ stillꢀ maintainingꢀ lowꢀ quiescentꢀ currentꢀ
andꢀhighꢀefficiencyꢀinꢀlowꢀandꢀmediumꢀpowerꢀlevels.ꢀ
Averageꢀ weightedꢀ efficiencyꢀ canꢀ beꢀ increasedꢀ byꢀ
usingꢀanꢀexternalꢀswitchꢀmodeꢀpowerꢀsupplyꢀ(SMPS)ꢀ
orꢀDC/DCꢀconverterꢀtoꢀreduceꢀVCC.
Figureꢀ5ꢀshowsꢀoneꢀapplicationꢀexampleꢀonꢀmobileꢀ
board.ꢀC1ꢀandꢀC2ꢀareꢀRFꢀbypassꢀcapsꢀandꢀshouldꢀ
beꢀ placedꢀ nearbyꢀ pinꢀ 1ꢀ andꢀ pinꢀ 10.ꢀ Bypassꢀ capsꢀ
C4ꢀandꢀC5ꢀmayꢀnotꢀbeꢀneeded.ꢀAlsoꢀaꢀ“T”ꢀmatchingꢀ
topologyꢀ isꢀ recommendedꢀ atꢀ PAꢀ RFINꢀ andꢀ RFOUT
portsꢀtoꢀprovideꢀmatchingꢀbetweenꢀinputꢀTXꢀFilterꢀandꢀ
Duplexerꢀ/ꢀIsolator.
Theꢀdirectionalꢀ“daisyꢀchainable”ꢀcouplerꢀisꢀintegratedꢀ
withinꢀtheꢀPAꢀmodule,ꢀthereforeꢀthereꢀisꢀnoꢀneedꢀforꢀ
externalꢀcouplers.
Figure 6: Typical Application Circuit
DATA SHEET - Rev 2.1
9
02/2012
AWT6634
PERFORMANCE DATA:
Figure 7: WCDMA Gain (dB) over Temeprature
Figure 8: WCDMA Gain (dB) over Voltage
(VBATT = VCC = 3.4 V)
(TC = 25 8C)
30
30
-30C 3.4Vcc
25Cꢀ3.2Vcc
25Cꢀ3.4Vcc
25Cꢀ4.2Vcc
25Cꢀ3.0Vcc
25Cꢀ3.4Vccꢀ
90C 3.4Vcc
25
25
20
15
10
20
15
10
0
5
10
15
20
25
30
0
5
10
15
20
25
30
Pout(dBm)
Pout(dBm)
Figureꢀ9:ꢀꢀWCDMAꢀPAEꢀ(%)ꢀoverꢀTemeprature
Figure 10: WCDMA PAE (%) over Voltage
(VBATT = VCC = 3.4 V)
(TC = 25 8C)
50
50
-30 3.4cc
25Cꢀ3.2Vccꢀ
25Cꢀ3.4Vcc
25Cꢀ4.2Vcc
25Cꢀ3.0Vcc
45
40
35
30
25
20
15
10
5
25Cꢀ3.4Vcc
40
90C 3.4Vcc
30
20
10
0
0
0
5
10
15
20
25
30
0
5
10
15
20
25
30
Pout(dBm)
Pout(dBm)
Figure 12: WCDMA ACLR1 (dBc) over Voltage
Figure 11: WCDMA ACLR1 (dBc) over Temeprature
(TC = 25 8C)
(VBATT = VCC = 3.4 V)
-30C 3.4Vcc
-30
-25
25Cꢀ3.2Vcc
25Cꢀ3.4Vcc
-30
-35
-40
-45
-50
-55
25Cꢀ3.4Vcc
25Cꢀ4.2Vccꢀ
25Cꢀ3.0Vcc
-35
90C 3.4Vcc
-40
-45
-50
-55
0
5
10
15
20
25
30
0
5
10
15
20
25
30
Pout(dBm)
Pout(dBm)
DATA SHEET - Rev 2.1
10
02/2012
AWT6634
PACKAGEꢀOUTLINE
Figure 13: Package Outline - 10 Pin 3 mm x 3 mm x 1 mm Surface Mount Module
Part Number
6634
LLLLNN
YYWWCC
Pin 1 Identifier
Lot Number
Date Code
YY=Year; WW=Work week
Country Code (CC)
Figureꢀ14:ꢀBrandingꢀSpecificationꢀPackage
DATA SHEET - Rev 2.1
11
02/2012
AWT6634
PCB AND STENCIL DESIGN GUIDELINE
Figure 15: Recommended PCB Layout Information
DATA SHEET - Rev 2.1
12
02/2012
AWT6634
COMPONENTꢀPACKAGING
Pin 1
Figure 16: Carrier Tape
Figure 17: Reel
DATA SHEET - Rev 2.1
13
02/2012
AWT6634
ORDERING INFORMATION
TEMPERATURE
PACKAGE
DESCRIPTION
ORDER NUMBER
COMPONENTꢀPACKAGING
RANGE
RoHS Compliant 10 Pin
3ꢀmmꢀxꢀ3ꢀmmꢀxꢀ1ꢀmm TapeꢀandꢀReel,ꢀ2500ꢀpiecesꢀperꢀReel
AWT6634Q7
-30 oC to +90 oC
Surface Mount Module
RoHS Compliant 10 Pin
3ꢀmmꢀxꢀ3ꢀmmꢀxꢀ1ꢀmm Partial Tape and Reel
Surface Mount Module
AWT6634P9
-30 oC to +90 oC
anaDigiCS, iꢀc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
iMPOrTanT nOTiCE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers
to verify that the information they are using is current before placing orders.
warning
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of anANADIGICS product
in any such application without written consent is prohibited.
DATA SHEET - Rev 2.0
14
02/2012
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