APL3203DQBI-TRG [ANPEC]
Li Charger Protection IC; 李充电保护IC
| 型号： | APL3203DQBI-TRG |
| 厂家： | 
ANPEC ELECTRONICS COROPRATION |
| 描述： | Li Charger Protection IC |
| 文件： | 总19页 (文件大小：446K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APL3203D
Li+ Charger Protection IC
Features
General Description
·
·
·
Input Over-Voltage Protection
The APL3203D provides complete Li+ charger protec-
tions against over-voltage, over-current, and battery over-
voltage. The IC is designed to monitor input voltage, in-
put current, and battery voltage. When any of the moni-
tored parameters are over the threshold, the IC removes
the power from the charging system by turning off an in-
ternal switch. All protections also have deglitch time
against false triggering due to voltage spikes or current
transients. The APL3203D also provides over-tempera-
ture protection, a FAULT output pin to indicate the fault
conditions, and the EN pin to allow the system to disable
the IC.
Programmable Input Over-Current Protection
Battery Over-Voltage Protection
·
·
Over-Temperature Protection
High Immunityof False Triggering
·
·
·
·
·
High Accuracy Protection Thresholds
Fault Status Indication
EnableInput
Available in TDFN2x2-8 Package
Lead Free and Green Devices Available
(RoHS Compliant)
Applications
Simplified Application Circuit
·
·
·
Smart Phones and PDAs
Digital Still Cameras
Portable Devices
5V Adapter
or USB
Charger Input
IN
OUT
APL3203D
EN
FAULT
Pin Configuration
Charger Output
and System
ILIM
BAT
IN 1
8 OUT
7 ILIM
6 BAT
5 EN
GND
Li+
Battery
GND 2
EP
NC 3
FAULT 4
Simplified Application
TDFN2x2-8
(Top View)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ã ANPEC Electronics Corp.
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Rev. A.6 - Mar., 2013
APL3203D
Ordering and Marking Information
Package Code
APL3203D
QB : TDFN2x2-8
Assembly Material
Handling Code
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
Temperature Range
Package Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
L03D
APL3203D QB:
X
X - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings (Note 1)
Symbol
Parameter
Rating
-0.3 to 30
-0.3 to 7
-0.3 to 7
2
Unit
V
VIN
VOUT, VBAT
VILIM, VFAULT, VEN
IOUT
IN Input Voltage (IN pin to GND)
OUT, BAT Pins to GND Voltage
ILIM, FAULT, EN, Pins to GND Voltage
OUT Output Current
V
V
A
TJ
Maximum Junction Temperature
Storage Temperature Range
150
oC
oC
oC
TSTG
-65 to 150
260
TSDR
Maximum Lead Soldering Temperature,10 Seconds
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recom-
mended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Thermal Characteristics
Symbol
Parameter
Typical Value
Unit
Junction to Ambient Thermal Resistance in Free Air (Note 2)
°C/W
qJA
80
TDFN2x2-8
Note 2 :qJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions
Symbol
Parameter
Range
4.5 to 5.5
0 to 1.5
Unit
V
VIN
IN Input Voltage
IOUT
TJ
OUT Output Current
Junction Temperature
Ambient Temperature
A
-40 to 125
-40 to 85
°C
°C
TA
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Rev. A.6 - Mar., 2013
APL3203D
Electrical Characteristics
,
Refer to the typical application circuit. These specifications apply over VIN=5V, TA= -40~85°C unless otherwise specified. Typical
values are at TA=25°C.
APL3203D
Symbol
Parameter
Test Conditions
Unit
Min.
Typ.
Max.
POWER-ON-RESET (POR) AND SUPPLY CURRENT
VPOR
IN POR Threshold
IN POR Hysteresis
VIN rising
2.5
-
2.8
-
V
-
-
-
-
230
250
100
8
mV
EN = Low
350
150
-
ICC
IN Supply Current
mA
EN = High
TB(IN)
Input Power-On Blanking Time
VIN rising to VOUT rising
ms
INTERNAL POWER SWITCH AND OUT DISCHARGE RESISTANCE
Power Switch On Resistance
OUT Discharge Resistance
IOUT = 0.5A
VOUT = 3V
-
-
250
500
450
-
mW
W
INPUT OVER-VOLTAGE PROTECTION (OVP)
VOVP
Input OVP Threshold
VIN rising
5.67
5.85
200
-
6.00
V
Input OVP Recovery Hysteresis
Input OVP Propagation Delay
Input OVP Recovery Time
-
-
-
-
1
-
mV
ms
TON(OVP)
8
ms
OVER-CURRENT PROTECTION (OCP)
IOCP
OCP Threshold
930
1000
-
1200
mA
%
RILIM = 25kW
OCP Threshold Accuracy
OCP Blanking Time
IOCP = 300mA to 1500mA
-10
+10
TB(OCP)
-
-
176
64
-
-
ms
TON(OCP) OCP Recovery Time
ms
BATTERY OVER-VOLTAGE PROTECTION
VBOVP
Battery OVP Threshold
Battery OVP Hysteresis
BAT Pin Leakage Current
Battery OVP Blanking Time
VBAT rising
4.4
4.435
270
-
4.465
V
-
-
-
-
20
-
mV
nA
ms
IBAT
VBAT = 4.4V
TB(BOVP)
176
EN LOGIC LEVELS
EN Input Logic High
1.4
-
-
-
0.4
-
V
V
EN Input Logic Low
EN Internal Pull-Low Resistor
-
-
500
kW
FAULT LOGIC LEVELS AND DELAY TIME
FAULT Output Low Voltage
Sink 5mA current
VFAULT = 5V
-
-
-
-
0.4
1
V
FAULT Pin Leakage Current
mA
OVER-TEMPERATURE PROTECTION (OTP)
TOTP
Over-Temperature Threshold
Over-Temperature Hysteresis
-
-
140
20
-
-
°C
°C
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APL3203D
Typical Operating Characteristics
Battery OVP Threshold vs.
Junction Temperature
Input OVP Threshold vs. Junction
Temperature
4.485
4.435
4.385
4.335
4.285
4.235
4.185
4.135
4.085
6.00
5.95
5.90
VBAT Increasing
5.85
VIN Increasing
5.80
5.75
5.70
VIN Decreasing
5.65
5.60
5.55
VBAT Decreasing
-50
-25
0
25
50
75
100 125
)
-50
-25
0
25
50
75
100 125
Junction Temperature (o
C
Junction Temperature (oC)
IN Supply Current vs. Junction
Temperature
OCP Threshold vs. Junction
Temperature
150
125
100
75
1200
1150
1100
1050
1000
950
EN = high
900
850
50
800
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Junction Temperature (oC)
Junction Temperature (oC)
Power Switch On Resistance vs.
Input Voltage
POR Threshold vs. Junction
Temperature
0.35
0.30
0.25
0.20
0.15
0.10
2.80
2.70
2.60
2.50
2.40
2.30
2.20
VIN Increasing
VIN Decreasing
3.0
3.5
4.0
Input Voltage, VIN (V)
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4.5
5.0
5.5
6.0
6.5
-50
-25
0
25
50
75
100 125
Junction Temperature (oC)
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Rev. A.6 - Mar., 2013
APL3203D
Typical Operating Characteristics (Cont.)
Power Switch On Resistance vs.
Junction Temperature
400
350
300
250
200
150
-50
-25
0
25
50
75
100 125
Junction Temperature (oC)
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APL3203D
Operating Waveforms
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Normal Power On
OVP at Power On
VIN = 0 to 12V
VIN
VIN = 0 to 5V
VIN
1
VOUT
1
2
3
VOUT
2
3
IOUT
VFAULT
COUT =1mF, CIN =1mF, ROUT = 10W
CH1: VIN, 10V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 2ms/Div
COUT =1mF, CIN =1mF, ROUT = 10W
CH1: VIN, 5V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 0.5A/Div, DC
TIME: 2ms/Div
Input Over-Voltage Protection
COUT = 1mF, CIN=1mF, ROUT=50W
CH1: VIN, 5V/Div, AC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 20ms/Div
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Rev. A.6 - Mar., 2013
APL3203D
Operating Waveforms (Cont.)
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Battery Over-Voltage Protection
Battery Over-Voltage Protection
VBAT
VBAT
1
2
3
1
2
3
VOUT
VOUT
VFAULT
VFAULT
VBAT = 3.6V to 4.4V, ROUT=33.3W
COUT =1mF, CIN =1mF
VBAT = 3.6V to 4.4V to 3.6V, ROUT=33.3W
COUT =1mF, CIN =1mF
CH1: VBAT, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 50ms/Div
CH1: VBAT, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 5ms/Div
Recovery from Battery OVP
Over-Current Protection
VBAT
IOUT
1
1
2
3
VOUT
VOUT
2
3
VFAULT
VFAULT
VBAT = 4.4V to 3.6V, ROUT=33.3W
COUT =1mF, CIN =1mF
CH1: VBAT, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 50ms/Div
COUT =1mF, CIN =1mF, IOUT = 0.5A to 1.2A
CH1: IOUT, 0.5A/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 50ms/Div
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Rev. A.6 - Mar., 2013
APL3203D
Operating Waveforms (Cont.)
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Over-Current Protection
VIN
1
2
VOUT
IOUT
3
VFAULT
4
COUT =1mF, CIN =1mF, ROUT = 2.5W
CH1: VIN, 5V/Div, DC
CH2: VOUT, 5V/Div, DC
CH3: IOUT, 0.5A/Div, DC
CH4: VFAULT, 5V/Div, DC
TIME: 200ms/Div
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APL3203D
Pin Description
PIN
FUNCTION
NO.
1
NAME
IN
Power Supply Input.
Ground.
2
GND
NC
3
No Connection.
4
FAULT
EN
Fault Indication Pin. This pin goes low when input OVP, OCP, or battery OVP is detected.
Enable Input. Pull this pin to high to disable the device and pull this pin to low to enable device.
Battery OVP Sense Pin. Connect to positive terminal of battery through a resistor.
Over-current Protection Setting Pin. Connect a resistor to GND to set the over-current threshold.
Output Voltage Pin. The output voltage follows the input voltage when no fault is detected.
Exposed Thermal Pad. Must be electrically connected to the GND pin.
5
6
BAT
ILIM
OUT
EP
7
8
-
Block Diagram
IN
OUT
ILIM
POR
Charge
Pump
1.2V
Gate Driver and
Control Logic
0.5V
1V
BAT
FAULT
OTP
EN
GND
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APL3203D
Typical Application Circuit
5V Adapter/USB
1
8
IN
OUT
Charger
1mF
1mF
APL3203D
FAULT
50K
50K
4
VIO MCU
GPIO
5
6
EN
25K
50K
7
ILIM
BAT
100K
GND
Li+
Battery
2
Figure 1. The Typical Protection Circuit for Charger Systems.
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Rev. A.6 - Mar., 2013
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APL3203D
Function Description
the internal power FET is turned off. When the BP voltage
returns below the battery OVP threshold minus the
hysteresis, the FET is turned on again. The APL3203D
has a built-in counter. When the total count of battery OVP
fault reaches 16, the FET is turned off permanently, re-
quiring either a VIN POR or EN re-enable again to restart.
Power-Up
The APL3203D has a built-in power-on-reset circuit to
keep the output shutting off until internal circuitry is oper-
ating properly. The POR circuit has hysteresis and a de-
glitch feature so that it will typically ignore undershoot
transients on the input. When input voltage exceeds the
POR threshold and after 8ms blanking time, the output
voltage starts a soft-start to reduce the inrush current.
Over-Temperature Protection
When the junction temperature exceeds 140oC, the inter-
nal thermal sense circuit turns off the power FET and
allows the device to cool down. When the device’s junc-
tion temperature cools by 20oC, the internal thermal sense
circuit will enable the device, resulting in a pulsed output
during continuous thermal protection. Thermal protec-
tion is designed to protect the IC in the event of over tem-
perature conditions. For normal operation, the junction
temperature cannot exceed TJ=+125 oC.
Input Over-Voltage Protection (OVP)
The input voltage is monitored by the internal OVP circuit.
When the input voltage rises above the input OVP
threshold, the internal FET will be turned off within 1ms to
protect connected system on OUT pin. When the input
voltage returns below the input OVP threshold minus the
hysteresis, the FET is turned on again after 8ms recovery
time. The input OVP circuit has a 200mV hysteresis and
a recovery time of TON(OVP) to provide noise immunity
against transient conditions.
FAULTOutput
The APL3203D provides an open-drain output to indicate
that a fault has occurred. When any of input OVP, OCP,
battery OVP, is detected, the FAULT goes low to indicate
that a fault has occurred. Since the FAULT pin is an open-
drain output, connecting a resistor to a pull high voltage
is necessary.
Over-Current Protection (OCP)
The output current is monitored by the internal OCP circuit.
When the output current reaches the OCP threshold, the
device limits the output current at OCP threshold level. If
the OCP condition continues for a blanking time of TB(OCP)
,
the internal power FET is turned off. After the recovery
time of TON(OCP), the FET will be turned on again and the
output current is monitored again. The APL3203D has
have a built-in counter. When the total count of OCP fault
reaches 16, the FET is turned off permanently, requiring
either a VIN POR or EN re-enable again to restart. The
OCP threshold is programmed by a resistor RILIM con-
nected from ILIM pin to GND. The OCP threshold is cal-
culated by the following equation:
Enable/Shutdown
Pull the EN pin voltage above 1.4V to disable the device
and pull EN pin voltage below 0.4V to enable the device.
The EN pin has an internal pull-down resistor and can be
left floating. When the IC is latched off due to the total
count of OCP or battery OVP reaches 16, disable and re-
enable the device with the EN pin can clear the counter.
KILIM
IOCP =
RILIM
where
KILIM=25000AW
Battery Over-Voltage Protection
The APL3203D monitors the BAT pin voltage for battery
over-voltage protection. The battery OVP threshold is in-
ternally set to 4.435V. When the BAT pin voltage exceeds
the battery OVP threshold for a blanking time of TB(BOVP)
,
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Rev. A.6 - Mar., 2013
APL3203D
Function Description (Cont.)
VOVP
VPOR
VIN
VOUT
VFAULT
TB(IN)
TON(OVP)
Figure 2. OVP Timing Chart
VOUT
OCP
Threshold
Count 13
times
IOUT
VFAULT
Total count 16
times IC is
latched off
TB(OCP)
TON(OCP)
TB(OCP)
TB(OCP)
Figure 3. OCP Timing Chart
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Rev. A.6 - Mar., 2013
APL3203D
Function Description (Cont.)
VBOVP
VBOVP
VBAT
VBOVP
Count 13
times
VOUT
VFAULT
Total count 16
times IC is
TB(BOVP)
TB(BOVP)
TB(BOVP)
latched off
Figure 4. Battery OVP Timing Chart
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Rev. A.6 - Mar., 2013
APL3203D
Application Information
RBAT Selection
RUP
FAULT
EN
VIO
Connect the BAT pin to the positive terminal of battery
through a resistor RBAT for battery OVP function. The RBAT
limits the current flowing from BAT to battery in case of
BAT pin is shortened to VIN pin under a failure mode. The
recommended value of RBAT is 100kW. In the worse case
of an IC failure, the current flowing from the BAT pin to the
battery is:
RFAULT
GPIO
REN
MCU
GPIO
RBAT
BAT
Li+
Battery
(30V-3V)/ 100kW =270mA
where the 30V is the maximum IN voltage and the 3V is
the minimum battery voltage. The current is so small and
can be absorbed by the charger system.
Figure 5. RUP, RFAULT, REN and RBAT
Capacitor Selection
The disadvantage with the large RBAT is that the error of
the battery OVP threshold will be increased. The addi-
tional error is the voltage drop across the RBAT because
of the BAT bias current. When RBAT is 100kW, the worse-
case additional error is 100kWx20nA=2mV, which is ac-
ceptable in most applications.
The input capacitor is for decoupling and prevents the
input voltage from overshooting to dangerous levels. In
the AC adapter hot plug-in applications or load current
step-down transient, the input voltage has a transient
spike due to the parasitic inductance of the input cable. A
25V, X5R, dielectric ceramic capacitor with a value be-
tween 1mF and 4.7mF placed close to the IN pin is
recommended.
REN Selection
For the same reason as the BAT pin case, the EN pin
should be connected to the MCU GPIO pin through a
resistor. The value of the REN is dependent on the IO
voltage of the MCU.
The output capacitor is for output voltage decoupling, and
also can be as the input capacitor of the charging circuit.
At least, a 1mF, 10V, X5R capacitor is recommended.
Since the IO voltage is divided by REN and EN internal pull
low resistor for EN voltage. It has to be ensured that the
EN voltage is above the EN logic high voltage when the
GPIO output of the MCU is high.
Layout Consideration
In some failure modes, a high voltage may be applied to
the device. Make sure the clearance constraint of the PCB
layout must satisfy the design rule for high voltage.
The exposed pad of the TDFN2x2-8 performs the func-
tion of channeling heat away. It is recommended that
connect the exposed pad to a large copper ground plane
on the backside of the circuit board through several ther-
mal vias to improve heat dissipation.
FAULTOutput
Since the FAULT pin is an open-drain output, connecting
a resistor RUP to a pull high voltage is necessary. It is also
recommended that connect the FAULT to the MCU GPIO
through a resistor RFAULT. The RFAULT prevents damage to
the MCU under a failure mode. The recommended value
of the resistors should be between 10kW to 100kW.
The input and output capacitors should be placed close
to the IC. RILIM also should be placed close to the IC.
The high current traces like input trace and output trace
must be wide and short.
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Rev. A.6 - Mar., 2013
APL3203D
Package Information
TDFN2x2-8
A
D
D2
A1
A3
Pin 1 Corner
e
S
Y
TDFN2x2-8
M
B
O
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
0.031
0.002
L
A
0.70
0.00
0.80
0.05
0.028
0.000
A1
A3
b
0.20 REF
0.008 REF
0.007
0.075
0.039
0.075
0.024
0.012
0.083
0.063
0.083
0.039
0.18
1.90
0.30
2.10
D
D2
E
1.00
1.90
0.60
1.60
2.10
E2
e
1.00
0.50 BSC
0.020 BSC
0.012
0.018
L
0.30
0.45
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Rev. A.6 - Mar., 2013
APL3203D
Carrier Tape & Reel Dimensions
P0
P2
P1
OD0
A
K0
A0
A
OD1
B
B
SECTION A-A
SECTION B-B
d
T1
Application
TDFN2x2-8
A
H
T1
8.4+2.00 13.0+0.50
-0.00 -0.20
P2 D0
C
d
D
W
E1
F
3.5±0.05
K0
178.0±2.00 50 MIN.
1.5 MIN.
D1
20.2 MIN.
8.0±0.20 1.75±0.10
A0 B0
P0
P1
T
1.5+0.10
-0.00
0.6+0.00
-0.40
4.0±0.10
4.0±0.10
2.0±0.05
1.5 MIN.
2.35±0.20 2.35±0.20 1.00±0.20
(mm)
Devices Per Unit
Package Type
TDFN2x2-8
Unit
Tape & Reel
Quantity
3000
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Rev. A.6 - Mar., 2013
APL3203D
Taping Direction Information
TDFN2x2-8
USER DIRECTION OF FEED
Classification Profile
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APL3203D
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
Preheat & Soak
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
Temperature min (Tsmin
)
Temperature max (Tsmax
)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
3 °C/second max.
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
183 °C
60-150 seconds
217 °C
60-150 seconds
Peak package body Temperature
(Tp)*
See Classification Temp in table 1
20** seconds
See Classification Temp in table 2
30** seconds
Time (tP)** within 5°C of the specified
classification temperature (Tc)
Average ramp-down rate (Tp to Tsmax
)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Volume mm3
350
Package
Thickness
<2.5 mm
³ 2.5 mm
Volume mm3
<350
235 °C
220 °C
220 °C
220 °C
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
Volume mm3
Volume mm3
350-2000
260 °C
Volume mm3
<350
260 °C
260 °C
250 °C
>2000
260 °C
245 °C
245 °C
1.6 mm – 2.5 mm
³ 2.5 mm
250 °C
245 °C
Reliability Test Program
Test item
SOLDERABILITY
HOLT
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ 125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
PCT
TCT
HBM
MM
VMM≧200V
10ms, 1tr≧100mA
Latch-Up
Copyright ã ANPEC Electronics Corp.
18
www.anpec.com.tw
Rev. A.6 - Mar., 2013
APL3203D
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright ã ANPEC Electronics Corp.
Rev. A.6 - Mar., 2013
19
www.anpec.com.tw
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