APL3204BQBI-TRG [ANPEC]
Li+ Charger Protection IC; Li +电池充电器保护IC
| 型号： | APL3204BQBI-TRG |
| 厂家： | 
ANPEC ELECTRONICS COROPRATION |
| 描述： | Li+ Charger Protection IC |
| 文件： | 总18页 (文件大小：553K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APL3204A/B
Li+ Charger Protection IC
Features
General Description
The APL3204A/B provide complete Li+ charger protec-
tions against over-voltage, over-current, and battery over-
voltage. The IC is designed to monitor input voltage, in-
put current, and battery voltage. When any of the moni-
tored parameters are over the threshold, the IC removes
the power from the charging system by turning off an in-
ternal switch. All protections also have deglitch time
against false triggering due to voltage spikes or current
transients. The APL3204A/B also provide over-tempera-
ture protection, a FAULT output pin to indicate the fault
conditions, and the EN pin to allow the system to disable
the IC.
·
·
·
Input Over-Voltage Protection
Programmable Input Over-Current Protection
Battery Over-Voltage Protection
·
·
Over-Temperature Protection
High Immunityof False Triggering
·
·
·
·
·
High Accuracy Protection Thresholds
Fault Status Indication
EnableInput
Available in TDFN4x3-12 Package
Lead Free and Green Devices Available
(RoHS Compliant)
Applications
Simplified Application Circuit
·
·
·
Smart Phones and PDAs
Digital Still Cameras
Potable Devices
5V Adapter or USB
Charger Input
IN
OUT
APL3204A/B
EN
FAULT
Pin Configuration
Charger Output and
System
ILIM
BAT
GND
IN 1
IN 2
12 NC
11 OUT
10 OUT
9 ILIM
8 BAT
7 EN
Li+ Battery
GND 3
EP
FAULT 4
NC 5
NC 6
TDFN4X3-12 (Top View)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ã ANPEC Electronics Corp.
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Rev. A,1 - Jun, 2008
APL3204A/B
Ordering and Marking Information
Package Code
QB : TDFN4x3-12
APL3204A
APL3204B
Assembly Material
Handling Code
Range
Operating Ambient Temperature
I : -40 to 85 oC
Handling Code
Temperature Range
Package Code
TR : Tape & Reel
Assembly Material
L : Lead Free Device G : Halogen and Lead Free Device
APL3204A QB:
APL3204B QB:
L04A
XXXXX
XXXXX - Date Code
L04B
XXXXX
XXXXX - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish;
which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-
020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)
and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed
1500ppm by weight).
Absolute Maximum Ratings (Note 1)
Symbol
Parameter
Rating
-0.3 to 30
-0.3 to 7
Unit
V
VIN
IN Input Voltage (IN Pin to GND)
VOUT, VBAT
OUT, BAT Pins to GND Voltage
ILIM, FAULT, EN, Pins to GND Voltage
OUT Output Current
V
VILIM, VFAULT, VEN,
IOUT
-0.3 to 7
2
V
A
TJ
Maximum Junction Temperature
150
-65 to 150
260
oC
oC
oC
TSTG
TSDR
Storage Temperature Range
Maximum Lead Soldering Temperature,10 Seconds
Note 1 : Stresses beyond the absolute maximum rating may damage the device and exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Thermal Characteristics
Symbol
Parameter
Typical Value
Unit
Junction to Ambient Thermal Resistance in Free Air
°C/W
qJA
80
TDFN4x3-12
Recommended Operating Conditions
Symbol
Parameter
Range
4.5 to 5.5
0 to 1.5
Unit
V
VIN
IN Input Voltage
IOUT
TJ
OUT Output Current
Junction Temperature
Ambient Temperature
A
-40 to 125
-40 to 85
°C
°C
TA
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Rev. A,1 - Jun, 2008
APL3204A/B
Electrical Characteristics
,
Refer to the typical application circuit. These specifications apply over VIN=5V, TA= -40~85°C unless otherwise specified. Typical
values are at TA=25°C.
APL3204A/B
Symbol
Parameter
Test Conditions
Unit
Min.
Typ.
Max.
POWER-ON-RESET (POR) AND SUPPLY CURRENT
IN POR Threshold
IN POR Hysteresis
2.5
-
2.8
-
V
VPOR
VIN rising
-
-
-
-
230
250
100
8
mV
EN = Low
350
150
-
IN Supply Current
mA
ICC
EN = High
Input Power-On Blanking Time
ms
TB(IN)
VIN rising to VOUT rising
INTERNAL POWER SWITCH AND OUT DISCHARGE RESISTANCE
Power Switch On Resistance
OUT Discharge Resistance
-
-
250
500
450
-
W
m
IOUT = 0.5A
VOUT = 3V
W
INPUT OVER-VOLTAGE PROTECTION (OVP)
5.67
5.85
6.80
200
-
6.00
APL3204A, VIN rising
APL3204B, VIN rising
Input OVP Threshold
V
VOVP
6.60
7.00
Input OVP Recovery Hysteresis
Input OVP Propagation Delay
Input OVP Recovery Time
-
-
-
-
1
-
mV
m
s
8
ms
TON(OVP)
OVER-CURRENT PROTECTION (OCP)
OCP Threshold
W
RILIM = 25k
930
1000
-
1070
mA
%
IOCP
OCP Threshold Accuracy
OCP Blanking Time
OCP Recovery Time
-10
+10
IOCP = 300mA to 1500mA
-
-
176
64
-
-
m
s
TB(OCP)
ms
TON(OCP)
BATTERY OVER-VOLTAGE PROTECTION
Battery OVP Threshold
Battery OVP Hysteresis
BAT Pin Leakage Current
Battery OVP Blanking Time
4.30
4.35
270
-
4.4
-
V
VBOVP
VBAT rising
-
-
-
mV
nA
20
-
IBAT
VBAT = 4.4V
176
m
s
TB(BOVP)
EN LOGIC LEVELS
EN Input Logic High
1.4
-
-
-
0.4
-
V
V
EN Input Logic Low
EN Internal Pull-Low Resistor
-
-
500
k
W
FAULT LOGIC LEVELS AND DELAY TIME
FAULT Output Low Voltage
-
-
V
Sink 5mA current
VFAULT = 5V
-
-
0.4
1
FAULT Pin Leakage Current
m
A
OVER-TEMPERATURE PROTECTION (OTP)
Over-Temperature Threshold
Over-Temperature Hysteresis
-
-
140
20
-
-
°
°
TOTP
C
C
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Rev. A,1 - Jun, 2008
APL3204A/B
Typical Operating Characteristics
Input OVP Threshold vs. Junction
Temperature
Input OVP Threshold vs. Junction
Temperature
7.00
6.95
6.90
6.85
6.80
6.75
6.70
6.65
6.60
6.55
6.50
6.00
APL3204A
APL3204B
5.95
5.90
VIN Increasing
5.85
VIN Increasing
5.80
5.75
5.70
VIN Decreasing
VIN Decreasing
5.65
5.60
5.55
-50
-25
0
25
50
75
100 125
)
-50
-25
0
25
50
75
100 125
)
o
o
Junction Temperature (
Junction Temperature (
C
C
Battery OVP Threshold vs.
Junction Temperature
OCP Threshold vs. Junction
Temperature
4.40
1200
1150
1100
1050
1000
950
4.35
4.30
4.25
4.20
4.15
4.10
4.05
4.00
VBAT Increasing
900
VBAT Decreasing
850
800
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Junction Temperature (oC)
Junction Temperature (oC)
IN Supply Current vs. Junction
Temperature
POR Threshold vs. Junction
Temperature
150
125
100
75
2.80
2.70
2.60
2.50
2.40
2.30
2.20
VIN Increasing
EN = high
VIN Decreasing
50
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Junction Temperature (oC)
Junction Temperature (oC)
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Rev. A,1 - Jun, 2008
APL3204A/B
Typical Operating Characteristics (Cont.)
Power Switch On Resistance vs.
Junction Temperature
Power Switch On Resistance vs.
Input Voltage
400
350
0.35
0.30
0.25
0.20
0.15
0.10
300
250
200
150
-50
-25
0
25
50
75
100 125
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
Junction Temperature (oC)
Input Voltage, VIN (V)
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Rev. A,1 - Jun, 2008
APL3204A/B
Operating Waveforms
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Normal Power On
OVP at Power On
VIN = 0 to 12V
VIN
VIN = 0 to 5V
VIN
1
VOUT
1
2
3
VOUT
2
3
IOUT
VFAULT
COUT =1mF, CIN =1mF, ROUT = 10W
CH1: VIN, 10V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 2ms/Div
COUT =1mF, CIN =1mF, ROUT = 10W
CH1: VIN, 5V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 0.5A/Div, DC
TIME: 2ms/Div
Input Over-Voltage Pretection
Input Over-Voltage Pretection
APL3204A
APL3204B
VIN
VIN
1
1
VOUT
VOUT
3
2
3
2
VFAULT
VFAULT
VIN = 5V to 12V
COUT = 1mF, CIN=1mF, ROUT=50W
COUT = 1mF, CIN=1mF, ROUT=50W
CH1: VIN, 5V/Div, AC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 20ms/Div
CH1: VIN, 5V/Div, AC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME:20ms/Div
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Rev. A,1 - Jun, 2008
APL3204A/B
Operating Waveforms (Cont.)
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Battery Over-Voltage Pretection
Recovery from Input OVP
APL3204B
VBAT
VIN
1
2
3
1
VOUT
VOUT
2
3
VFAULT
VFAULT
VBAT = 3.6V to 4.4V to 3.6V, ROUT=33.3W
COUT =1mF, CIN =1mF
CH1: VBAT, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 5ms/Div
VIN = 12V to 5V
COUT = 1mF, CIN=1mF, ROUT=50W
CH1: VIN, 5V/Div, AC
CH2: VOUT, 5V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 2ms/Div
Recovery from Battery OVP
Battery Over-Voltage Pretection
VBAT
VBAT
1
2
3
1
2
3
VOUT
VOUT
VFAULT
VFAULT
VBAT = 4.4V to 3.6V, ROUT=33.3W
COUT =1mF, CIN =1mF
VBAT = 3.6V to 4.4V, ROUT=33.3W
COUT =1mF, CIN =1mF
CH1: VBAT, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 50ms/Div
CH1: VBAT, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 50ms/Div
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Rev. A,1 - Jun, 2008
APL3204A/B
Operating Waveforms (Cont.)
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Over-Current Pretection
Over-Current Pretection
VIN
IOUT
1
2
1
VOUT
VOUT
2
3
IOUT
3
4
VFAULT
VFAULT
COUT =1mF, CIN =1mF, ROUT = 2.5W
CH1: VIN, 5V/Div, DC
CH2: VOUT, 5V/Div, DC
CH3: IOUT, 0.5A/Div, DC
CH4: VFAULT, 5V/Div, DC
TIME: 200ms/Div
COUT =1mF, CIN =1mF, IOUT = 0.5A to 1.2A
CH1: IOUT, 0.5A/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: VFAULT, 5V/Div, DC
TIME: 50ms/Div
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Rev. A,1 - Jun, 2008
APL3204A/B
Pin Description
PIN
FUNCTION
NO.
NAME
IN
1,2
Power Supply Input.
Ground.
3
GND
NC
5,6,12
No Connection.
4
7
FAULT
Fault Indication Pin. This pin goes low when input OVP, OCP, or battery OVP is detected.
Enable Input. Pull this pin to high to disable the device and pull this pin to low to enable device.
EN
BAT
ILIM
OUT
EP
8
Battery OVP Sense Pin. Connect to positive terminal of battery through a resistor.
Over-current Protection Setting Pin. Connect a resistor to GND to set the over-current threshold.
Output Voltage Pin. The output voltage follows the input voltage when no fault is detected.
Exposed Thermal Pad. Must be electrically connected to the GND pin.
9
10,11
-
Block Diagram
IN
OUT
ILIM
POR
Charge
Pump
1.2V
Gate Driver and
Control Logic
0.5V
1V
BAT
FAULT
OTP
EN
GND
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Rev. A,1 - Jun, 2008
APL3204A/B
Typical Application Circuit
5V Adapter/
USB
1, 2
10, 11
IN
OUT
Charger
1mF
1mF
APL3204A/B
50K
50K
4
FAULT
VIO
MCU
7
8
GPIO
EN
25K
50K
9
ILIM
BAT
100K
GND
Li+
Battery
3
Figure 1. The Typical Protection Circuit for Charger Systems.
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Rev. A,1 - Jun, 2008
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APL3204A/B
Function Description
Power-Up
The APL3204A/B have a built-in power-on-reset circuit to
keep the output shuting off until internal circuitry is oper-
ating properly. The POR circuit has hysteresis and a de-
glitch feature so that it will typically ignore undershoot
transients on the input. When input voltage exceeds the
POR threshold and after 8ms blanking time, the output
voltage starts a soft-start to reduce the inrush current.
the internal power FET is turned off. When the BP voltage
returns below the battery OVP threshold minus the
hysteresis, the FET is turned on again. The APL3204A/B
have a built-in counter. When the total count of battery
OVP fault reaches 16, the FET is turned off permanently,
requiring either a VIN POR or EN re-enable again to restart.
Over-Temperature Protection
Input Over-Voltage Protection (OVP)
The input voltage is monitored by the internal OVP circuit.
When the input voltage rises above the input OVP
threshold, the internal FET will be turned off within 1ms to
protect connected system on OUT pin. When the input
voltage returns below the input OVP threshold minus the
hysteresis, the FET is turned on again after 8ms recovery
time. The input OVP circuit has a 200mV hysteresis and
a recovery time of TON(OVP) to provide noise immunity
against transient conditions.
When the junction temperature exceeds 140oC, the inter-
nal thermal sense circuit turns off the power FET and
allows the device to cool down. When the device’s junc-
tion temperature cools by 20oC, the internal thermal sense
circuit will enable the device, resulting in a pulsed output
during continuous thermal protection. Thermal protec-
tion is designed to protect the IC in the event of over tem-
perature conditions. For normal operation, the junction
temperature cannot exceed TJ=+125 oC.
Over-Current Protection (OCP)
FAULTOutput
The output current is monitored by the internal OCP circuit.
When the output current reaches the OCP threshold, the
device limits the output current at OCP threshold level. If
The APL3204A/B provide an open-drain output to indi-
cate that a fault has occurred. When any of input OVP,
OCP, battery OVP, is detected, the FAULT goes low to
indicate that a fault has occurred. Since the FAULT pin is
an open-drain output, connecting a resistor to a pull high
voltage is necessary.
the OCP condition continues for a blanking time of TB(OCP)
,
the internal power FET is turned off. After the recovery
time of TON(OCP), the FET will be turned on again and the
output current is monitored again. The APL3204A/B have
a built-in counter. When the total count of OCP fault
reaches 16, the FET is turned off permanently, requiring
either a VIN POR or EN re-enable again to restart. The
OCP threshold is programmed by a resistor RILIM con-
nected from ILIM pin to GND. The OCP threshold is cal-
culated by the following equation:
Enable/Shutdown
Pull the EN pin voltage above 1.4V to disable the device
and pull EN pin voltage below 0.4V to enable the device.
The EN pin has an internal pull-down resistor and can be
left floating. When the IC is latched off due to the total
count of OCP or battery OVP reaches 16, disable and re-
enable the device with the EN pin can clear the counter.
KILIM
IOCP =
RILIM
where
KILIM=25000AW
Battery Over-Voltage-Protection
The APL3204A/B monitor the BAT pin voltage for battery
over-voltage protection. The battery OVP threshold is in-
ternally set to 4.35V. When the BAT pin voltage exceeds
the battery OVP threshold for a blanking time of TB(BOVP)
,
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Rev. A,1 - Jun, 2008
APL3204A/B
Function Description (Cont.)
VOVP
VPOR
VIN
VOUT
VFAULT
TB(IN)
TON(OVP)
Figure2. OVP Timing Chart
VOUT
OCP
Threshold
Count 13
times
IOUT
VFAULT
Total count 16
times IC is
latched off
TB(OCP)
TON(OCP)
TB(OCP)
TB(OCP)
Figure 3 OCP Timing Chart
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Rev. A,1 - Jun, 2008
APL3204A/B
Function Description (Cont.)
VBOVP
VBOVP
VBAT
VBOVP
Count 13
times
VOUT
VFAULT
Total count 16
times IC is
TB(BOVP)
TB(BOVP)
TB(BOVP)
latched off
Figure 4. Battery OVP Timing Chart
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Rev. A,1 - Jun, 2008
APL3204A/B
Application Information
RBAT Selection
RUP
FAULT
VIO
Connect the BAT pin to the positive terminal of battery
through a resistor RBAT for battery OVP function. The RBAT
limits the current flowing from BAT to battery in case of
BAT pin is shorted to VIN pin under a failure mode. The
recommended value of RBAT is 100kW. In the worse case
of an IC failure, the current flowing from the BAT pin to the
battery is:
RFAULT
GPIO
GPIO
REN
MCU
EN
RBAT
BAT
Li+
(30V-3V)/ 100kW =270mA
Battery
where the 30V is the maximum IN voltage and the 3V is
the minimum battery voltage. The current is so small and
can be absorbed by the charger system.
Figure 5. RUP, RFAULT, REN and RBAT
The disadvantage with the large RBAT is that the error of
the battery OVP threshold will be increased. The addi-
tional error is the voltage drop across the RBAT because
of the BAT bias current. When RBAT is 100kW, the worse-
case additional error is 100kWx20nA=2mV, which is ac-
ceptable in most applications.
Capacitor Selection
The input capacitor is for decoupling and prevents the
input voltage from overshooting to dangerous levels. In
the AC adapter hot plug-in applications or load current
step-down transient, the input voltage has a transient
spike due to the parasitic inductance of the input cable. A
25V, X5R, dielectric ceramic capacitor with a value be-
tween 1mF and 4.7mF placed close to the IN pin is
recommended.
REN Selection
For the same reason as the BAT pin case, the EN pin
should be connected to the MCU GPIO pin through a
resistor. The value of the REN is dependent on the IO
voltage of the MCU.
The output capacitor is for output voltage decoupling, and
also can be as the input capacitor of the charging circuit.
At least, a 1mF, 10V, X5R capacitor is recommended.
Since the IO voltage is divided by REN and EN internal pull
low resistor for EN voltage. It has to be ensured that the
EN voltage is above the EN logic high voltage when the
GPIO output of the MCU is high.
Layout Consideration
In some failure modes, a high voltage may be applied to
the device. Make sure the clearance constraint of the PCB
layout must satisfy the design rule for high voltage.
The exposed pad of the TDFN4x3-12 performs the func-
tion of channeling heat away. It is recommended that
connect the exposed pad to a large copper ground plane
on the backside of the circuit board through several ther-
mal vias to improve heat dissipation.
FAULTOutput
Since the FAULT pin is an open-drain output, connecting
a resistor RUP to a pull high voltage is necessary. It is also
recommended that connect the FAULT to the MCU GPIO
through a resistor RFAULT. The RFAULT prevents damage to
the MCU under a failure mode. The recommended value
of the resistors should be between 10kW to 100kW.
The input and output capacitors should be placed close
to the IC. RILIM also should be placed close to the IC.
The high current traces like input trace and output trace
must be wide and short.
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Rev. A,1 - Jun, 2008
APL3204A/B
Package Information
TDFN4x3-12
E
A
E2
A1
A3
Pin 1
Corner
L
TDFN4x3-12
S
Y
M
B
O
L
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
0.031
0.002
A
0.70
0.80
0.05
0.028
0.000
A1
A3
0.00
0.20 REF
4.00 BSC
3.00 BSC
0.50 BSC
0.008 REF
0.157 BSC
0.118 BSC
0.020 BSC
0.007
0.118
0.055
0.012
0.146
0.071
0.020
b
0.18
0.30
3.70
D
D2
E
3.00
1.40
E2
e
1.80
0.50
0.012
0.008
L
0.30
0.20
K
Note : Follow JEDEC MO-229 WGED-4.
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Rev. A,1 - Jun, 2008
APL3204A/B
Carrier Tape & Reel Dimensions
P0
P2
P1
OD0
A
K0
A0
A
OD1
B
B
SECTION A-A
SECTION B-B
d
T1
Application
TDFN3x4-12
A
H
T1
C
d
D
W
E1
F
12.4+2.00 13.0+0.50
330.0±2.00 50 MIN.
P0 P1
1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.05
-0.00
-0.20
P2
D0
D1
T
A0
B0
K0
1.5+0.10
-0.00
0.6+0.00
-0.40
4.0±0.20 8.0±0.10 2.0±0.05
1.5 MIN.
3.7±0.20 4.7±0.20 1.30±0.20
(mm)
Devices Per Unit
Package Type
TDFN4x3-12
Unit
Tape & Reel
Quantity
3000
Copyright ã ANPEC Electronics Corp.
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www.anpec.com.tw
Rev. A,1 - Jun, 2008
APL3204A/B
Reflow Condition (IR/Convection or VPR Reflow)
tp
TP
Critical Zone
TL to TP
Ramp-up
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
°
t 25 C to Peak
Time
Reliability Test Program
Test item
Method
Description
SOLDERABILITY
HOLT
PCT
TST
ESD
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B,A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
245°C, 5 sec
1000 Hrs Bias @125°C
168 Hrs, 100%RH, 121°C
-65°C~150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms, 1tr > 100mA
Latch-Up
Classification Reflow Profiles
Profile Feature
Average ramp-up rate
(TL to TP)
Sn-Pb Eutectic Assembly
Pb-Free Assembly
3°C/second max.
3°C/second max.
Preheat
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
- Temperature Min (Tsmin)
- Temperature Max (Tsmax)
- Time (min to max) (ts)
Time maintained above:
- Temperature (TL)
183°C
60-150 seconds
217°C
60-150 seconds
- Time (tL)
Peak/Classification Temperature (Tp)
See table 1
See table 2
Time within 5°C of actual
Peak Temperature (tp)
10-30 seconds
20-40 seconds
Ramp-down Rate
6°C/second max.
6°C/second max.
6 minutes max.
8 minutes max.
Time 25°C to Peak Temperature
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright ã ANPEC Electronics Corp.
17
www.anpec.com.tw
Rev. A,1 - Jun, 2008
APL3204A/B
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures
Volume mm3
Volume mm3
Package Thickness
<350
350
<2.5 mm
³ 2.5 mm
240 +0/-5°C
225 +0/-5°C
225 +0/-5°C
225 +0/-5°C
Table 2. Pb-free Process – Package Classification Reflow Temperatures
Volume mm3
<350
260 +0°C*
260 +0°C*
250 +0°C*
Volume mm3
Volume mm3
Package Thickness
350-2000
260 +0°C*
250 +0°C*
245 +0°C*
>2000
<1.6 mm
1.6 mm – 2.5 mm
³ 2.5 mm
260 +0°C*
245 +0°C*
245 +0°C*
* Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated
classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C) at the rated MSL
level.
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright ã ANPEC Electronics Corp.
18
www.anpec.com.tw
Rev. A,1 - Jun, 2008
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