APW7055DNC-TUL [ANPEC]
Advanced PWM and Linear Power Controller; 先进的PWM和线性电源控制器
| 型号： | APW7055DNC-TUL |
| 厂家： | 
ANPEC ELECTRONICS COROPRATION |
| 描述： | Advanced PWM and Linear Power Controller |
| 文件： | 总11页 (文件大小：128K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APW7055
Advanced PWM and Linear Power Controller
Features
General Description
The APW7055 provides the power control and protec-
tions for two output voltages on M/B DDR applications.
It integrates one PWM controller , one source-sink
linear controller(LC) for DDR source-sink purpose, as
well as the monitor and protection functions into a
single package. The PWM controller supplies the
VMEM(2.5V) with a standard buck converter. The
source-sink linear controller regulates VTT(1.25V)
power for DDR Termination.
•
•
Operates from 5V input supply
2 Regulated Voltage are provided
− Standard Buck Switching Power for VMEM
(2.5V)
− Linear Controller with Source-Sink Regula
tion for VTT(1.25V)
•
•
Simple Single-Loop Control Design
− Voltage-Mode PWM Control
Excellent Output Voltage Regulation
− VMEM Output : VMEM ±1.5% Over Tem-per
ature
Additional built-in over-voltage protection (OVP) will
be started when the VMEM output is above 115% of
the internal DAC setting(VDAC) . OVP function will shut-
down the upper MOSFET and disable all output volt-
age . The PWM controller’s over-current function moni-
tors the output current by sensing the voltage drop
across the upper MOSFET‘s rDS(ON) , eliminating the
need for a current sensing resistor .
− VTT Output : 1/2 VIN ±25mV Over Tempera-
ture
•
Fast Transient Response
− Built-in Feedback Compensation
− Full 0% to 100% Duty Ratio
Over-Voltage and Over-Current Fault Monitors
Constant Frequency Operation(200kHz)
16 pins, SSOP Package
•
•
•
Pin Description
VCC
SS
BOOT
UGATE
PHASE
PGND
MEM1
MEM0
OCSET
VSEN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Applications
SD
SOURCE
SINK
FB
•
•
•
M/B DDR Power Regulation
AGP/PCI Graphics Power Regulation
SSTL-2 Termination
VIN
GND
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright
ANPEC Electronics Corp.
1
www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Ordering Information
A P W 7 0 5 5
V o lta g e C o d e
A
C
:
:
2 .4 0 ~ 2 . 5 5 V
2 .8 0 ~ 2 .9 5 V
B
D
:
2 .6 0 ~ 2 .7 5 V
3 .0 0 ~ 3 .1 5 V
:
P a c k a g e C o d e
S S O P - 1 6
T e m p . R a n g e
to 7 0 °
H a n d lin g C o d e
T U T u b e
L e a d F re e C o d e
L e a d F re e D e v ic e
L e a d F re e C o d e
N
:
H a n d lin g C o d e
T e m p . R a n g e
P a c k a g e C o d e
V o lta g e C o d e
C
:
0
C
:
T R
:
T a p e
&
R e e l
O r ig in a l D e v ic e
L
:
B la n k :
Block Diagram
V C C
S S
O C S E T
2 0 0 u A
V C C
O C P
P H A S E
2 8 µ A
B O O T
U G A T E
P G N D
P o w e r O n
R e s e t
G a te
C o n tro l
4 .5 V
O V P
E .A
S D
1 1 5 %
V S E N
P W M
S o ft S ta rt a n d
F a u lt L o g ic
O s c illa to r
S O U R C E
T T L D /A
C o n v e rte r
M E M 0
M E M 1
IN H IB IT
T h e rm a l
P ro te c tio n
V
M E M
F B
V T T
S IN K
G N D
C o n tro l
5 0 %
V T T
V
IN
Absolute Maximum Ratings
Symbol
VCC
Parameter
Rating
Unit
Supply Voltage
Input , Output or I/O Voltage
15
V
V
VI , VO
TA
GND -0.3 V to VCC +0.3
0 to 70
Operating Ambient Temperature Range
Junction Temperature Range
Storage Temperature Range
Soldering Temperature
C
°
°
°
°
TJ
0 to 125
C
C
C
TSTG
TS
-65 to +150
300 ,10 seconds
Copyright ANPEC Electronics Corp. Rev. A.
2
www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Thermal Characteristics
Symbol
Parameter
Value
Unit
C/W
R JA
Thermal Resistance in Free Air
SOIC
75
65
°
SOIC (with 3in2 of Copper)
Electrical Characteristics
1. Recommended operating conditions, Unless otherwise noted.
2. Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic.
APW7055
Unit
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Supply Current
Nominal Supply Current
Shutdown Supply Current
SD=0V, GATE Drive Open
SD=5V
7
ICC
mA
2.7
Power-on Reset
Rising VCC Threshold
Falling VCC Threshold
Vocset=3V
Vocset=3V
4.2
4.6
VCC
V
V
3.6
2.0
VOCSET Rising VOCSET Threshold
Shutdown Input High
1.26
Voltage
VSD
V
Shutdown Input Low Voltage
0.8
Oscillator
FOSC
Free Running Frequency
Ramp Amplitude
185
200
1.9
215
kHz
V
V
∆
OSC
PWM Controller Reference Voltage
VDAC
DAC Voltage Accuracy
-1.5
2.0
+1.5
0.8
%
V
MEM0-1 Input High Voltage
MEM0-1 Input Low Voltage
Source-Sink Linear Controller
VSOURCE Source Regulation Voltage
-10mV 0.495VIN +10mV
V
VSINK
ISource Source Drive Current
ISINK Sink Drive Current
Sink Regulation Voltage
-10mV 0.505VIN +10mV
0.8
0.8
mA
PWM Controllers Gate Drivers
VCC=5V,VBOOT=9.5V,
VUGATE=6V
1
IUGATE UGATE Source
A
VCC=12V,VBOOT=9.5V,
VUGATE=6V
1
3
VCC=5V,VUGATE=1V
RGATE UGATE Sink
Ω
VCC=12V, VUGATE=6V
3
3.5
Copyright ANPEC Electronics Corp. Rev. A.
3
www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Electrical Characteristics (Cont.)
1. Recommended operating conditions, Unless otherwise noted.
2. Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic.
APW7055
Unit
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Protection
VSEN O.V. trip point (VSEN/VDAC
VSEN O.V. Hysteresis
)
VSEN Rising
Vocset=3V
115
2
120
%
IOCSET Ocset Current Source
ISS Soft start Current
170
200
28
230
uA
Functional Pin Description
VCC (Pin 1)
upper external MOSFET as a source regulator.
Provide a +5V bias supply for the IC to this pin. This
pin also provides the gate bias charge for the MOS
FETs of the source-sink regulator. The voltage at th
is pin is monitored for Power-On Reset (POR)
purposes.
SINK (Pin 5)
Connect the pin to the lower MOSFET gate drive of
the source-sink regulator.This pin is used to drive the
lower external MOSFET as a sink regulator.
SS (Pin 2)
FB (Pin 6)
This pin provides the soft start for the standard buck
converter and source-sink regulator. Connect a ca-
pacitor from this pin to ground.This capacitor, along
with an internal 28uA current source,sets the soft-start
intervaloftheconverterandpreventingtheoutputsfrom
overshoot as well as limiting the input current .
Connect this pin to output of the source-sink regulator.
This pin provide the voltage feedback path for source
and sink regulators. This pin is internally connected
to the negative input of the source controller, and also
connected to the positive input of the sink controller.
VIN (Pin 7)
SD (Pin 3)
Connect this pin to a voltage source. Two voltages,
above 0.5VIN, are generated by an internal resistor
divider as the reference voltage of the source and sink
controllers. The internal resistor divider provides an
offset voltage to ensure higher sink regulation voltage
and prevent an direct current path through the upper
and lower MOSFETs, damaging the two MOSFETs.
The pin shuts down all the outputs. A TTL-compatible,
logic level high signal applied at this pin immediately
discharges the soft-start capacitor,disabling all the
outputs.When IC re-enabled, the IC undergoes a new
soft-start cycle.Left open, this pin is pulled low by an
internal pull-down resistor,enabling operation.
SOURCE (Pin 4)
GND (Pin 8)
Connect the pin to the upper MOSFET gate drive of
the source-sink regulator. This pin is used to drive the
Signal ground for the IC. All voltage levels are mea
sured with respect to this pin voltage protection.
Copyright ANPEC Electronics Corp. Rev. A.
4
www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Functional Pin Description (Cont.)
VSEN (Pin 9)
PGND (Pin 13)
This pin is connected to the standard buck converter’s
output voltage to provide the voltage feedback path for
PWM converter. The OVP(Over-Voltage-Protection)
comparator circuit use this signal to monitor output
voltage status for over-voltage protection.
This is the power ground connection.Tie this pin to
the anode of the flywheel diode of the standard buck
PWM converter’s circuit.
PHASE (Pin 14)
Connect the PHASE pin to the standard buck PWM
converter’s MOSFET source.This pin is used to moni-
tor the voltage drop across the MOSFET for over-cur
rent protection.
OCSET (Pin 10)
Connect a resistor (ROCSET ) from this pin to the drain of
the standard buck PWM converter’s MOSFET. ROCSET
,
an internal 200mA current source (IOCSET ), and the
MOSFET’s on-resistance(rDS(ON)) set the converter’s
over-current (OC) trip point according to the following
equation:
UGATE (Pin 15)
Connect this pin to the MOSFET gate of the standard
buck PWM converter.This pin provides the gate drive
for the external MOSFET.
IOCSET x ROCSET
IPEAK
=
rDS(ON)
BOOT (Pin 16)
This pin provides bias voltage to the external MOSFET
driver. A bootstrap circuit may be used to pump a
boot voltage for enforcing the driving capability of the
gate driver and improving the performance of the
MOSFET.
An over-current trip cycles the soft-start function
.
MEM0-1 (Pin 11-12)
MEM0-1 are TTL-compatible logic level input pins of
the 2-bits DAC.The status of these 2 pins set the in-
ternal reference voltage(VDAC) for the standard buck
converter and also sets the OVP threshold voltage.Table
1 shows the DAC table voltage.
Table 1 DAC Table
APW7055 - A
APW7055 - B
Pin Name
VMEM
Pin Name
VMEM
Voltage
MEM1
MEM0
Voltage
MEM1
MEM0
0
0
1
1
0
1
0
1
2.40
0
0
1
1
0
1
0
1
2.60
2.45
2.65
2.50
2.70
2.55
2.75
Copyright ANPEC Electronics Corp. Rev. A.
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www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Table 1 DAC Table
APW7055 - C
APW7055 - D
Pin Name
Pin Name
VMEM
VMEM
Voltage
Voltage
MEM1
MEM0
MEM1
MEM0
0
0
1
1
0
1
0
1
2.80
2.85
2.90
2.95
0
0
1
1
0
1
0
1
3.00
3.05
3.10
3.15
Simplified Power System Diagram
VM EM
5VDUAL
Q2
Q1
D1
VM EM
Source-Sink
LC
PW M
VTT
Controller
Q3
APW 7055
Copyright ANPEC Electronics Corp. Rev. A.
6
www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Typical Application Circuit
D4
1N414 8
R1
5 VS B
1 0
C1
1u F
+5 VDUAL
C1 4
0 .1u F
L1
U1
2uH
C6
2 00p F
+
C3
10 00u F
C1 0
1u F
R4
10 k
7
VIN
VIN
R2
1 k
1 0
OCSET
R1 1
NC
C1 3
0 .1u F
VMEM
R3
0
Q1
APM941 0
1 5
1 4
UGATE
P HAS E
VMEM
L2
4.7uH
1N414 8
+
+
+
D5
D1
B3 4
C4
10 00u F
C5
10 00u F
C1 7
10 00u F
+
1 k
R1 2
C7
10 00u F
R5
0
VTT
1 3
9
P GND
VSEN
4
5
SOURCE
S INK
Q2A
APM731 3
R6
SP ARE
+
+
Q2 B
APM731 3
APW 7055
C8
10 00u F
C1 2
10 00u F
R7
0
J2
6
2
1 2
1 1
3
4
2
1
F B
MEM1
MEM0
R8
NC
3
S S
SD
C1 1
0 .1u F
Copyright ANPEC Electronics Corp. Rev. A.
7
www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Package Informaion
SSOP-16
D
N
GAUGE
PLANE
H
E
1
2
3
A
L
1
A1
e
B
Millimeters
Variations- D
Inches
Variations- D
Dim
A
Dim
A
Min.
1.350
0.10
Max. Variations Min.
Max.
Min. Max. Variations Min.
Max.
1.75
0.25
0.30
4.75
5.05
SSOP-16
0.053 0.069 SSOP-16 0.187 0.199
0.004 0.010
A1
B
A1
B
0.20
0.008 0.012
D
See variations
3.75 4.05
0.625 TYP.
D
See variations
E
E
0.147 0.160
e
e
0.025 TYP.
5.75
0.4
6.25
1.27
H
H
0.226 0.246
L
L
0.016 0.050
N
See variations
N
See variations
1
0
°
8
°
1
0
°
8
°
φ
φ
Copyright ANPEC Electronics Corp. Rev. A.
8
www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition (IR/Convection or VPR Reflow)
tp
TP
Critical Zone
TL to TP
Ramp-up
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
°
t 25 C to Peak
Tim e
Classificatin Reflow Profiles
Sn-Pb Eutectic Assembly
Large Body Small Body
Pb-Free Assembly
Profile Feature
Large Body
Small Body
Average ramp-up rate
(TL to TP)
3°C/second max.
3°C/second max.
Preheat
- Temperature Min (Tsmin)
- Temperature Mix (Tsmax)
- Time (min to max)(ts)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Tsmax to TL
3°C/second max
- Ramp-up Rate
Tsmax to TL
- Temperature(TL)
- Time (tL)
183°C
60-150 seconds
217°C
60-150 seconds
Peak Temperature(Tp)
225 +0/-5°C
240 +0/-5°C
245 +0/-5°C
250 +0/-5°C
Time within 5°C of actual Peak
Temperature(tp)
10-30 seconds
10-30 seconds
10-30 seconds 20-40 seconds
Ramp-down Rate
Time 25°C to Peak Temperature
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright ANPEC Electronics Corp. Rev. A.
9
www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Reliability test program
Test item
SOLDERABILITY
HOLT
PCT
TST
Method
Description
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
245 C , 5 SEC
°
1000 Hrs Bias @ 125 C
°
168 Hrs, 100 % RH , 121 C
°
-65 C ~ 150 C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms , Itr > 100mA
°
°
ESD
Latch-Up
Carrier Tape & Reel Dimensions
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Application
SSOP-16
A
6.95
B
D0
D1
E
F
P0
P1
P2
5.4
T2
2.2
1.55±0.05 1.55±0.1 1.75±0.1 5.5±0.05 4.0±0.1
8.0±0.1 2.0±0.05
T
W
W1
C1
C2
T1
T2
C
0.3±0.05
12.0±0.3
9.5
13±0.3
21±0.8
13.5±0.5 2.0±0.2
80±1
(mm)
Copyright ANPEC Electronics Corp. Rev. A.
10
www.anpec.com.tw
Rev.A.1 - Dec., 2001
APW7055
Cover Tape Dimensions
Application
SOP- 16
Carrier Width
Cover Tape Width
Devices Per Reel
24
21.3
1000
Customer Service
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright ANPEC Electronics Corp. Rev. A.
Rev.A.1 - Dec., 2001
11
www.anpec.com.tw
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