AOD421 [AOS]

P-Channel Enhancement Mode Field Effect Transisto; P沟道增强型场效应Transisto
AOD421
型号: AOD421
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

P-Channel Enhancement Mode Field Effect Transisto
P沟道增强型场效应Transisto

文件: 总5页 (文件大小:118K)
中文:  中文翻译
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AOD421  
P-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOD421 uses advanced trench technology to  
provide excellent RDS(ON), low gate charge and  
operation with gate voltages as low as 2.5V. This  
device is suitable for load switching. It is ESD  
protected. Standard Product AOD421 is Pb-free  
(meets ROHS & Sony 259 specifications). AOD421L  
is a Green Product ordering option. AOD421 and  
AOD421L are electrically identical.  
VDS (V) = -20V  
ID = -12.5 A (VGS = -10V)  
RDS(ON) < 75m(VGS = -10V)  
RDS(ON) < 95m(VGS = -4.5V)  
RDS(ON) < 145m(VGS = -2.5V)  
ESD Rating: 2000V HBM  
TO-252  
D-PAK  
D
Top View  
Drain Connected  
to Tab  
G
S
G
D
S
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
VDS  
Drain-Source Voltage  
-20  
V
VGS  
Gate-Source Voltage  
Continuous Drain  
Current G  
±12  
-12.5  
-8.9  
V
A
TA=25°C  
TA=70°C  
ID  
Pulsed Drain Current C  
IDM  
-30  
TC=25°C  
TC=100°C  
TA=25°C  
TA=70°C  
18.8  
9.4  
PD  
W
Power Dissipation B  
Power Dissipation A  
2
PDSM  
W
1.33  
-55 to 175  
TJ, TSTG  
Junction and Storage Temperature Range  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
Max  
Units  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Case B  
23  
50  
6
28  
60  
8
°C/W  
°C/W  
°C/W  
t 10s  
RθJA  
Steady-State  
Steady-State  
RθJC  
Alpha & Omega Semiconductor, Ltd.  
AOD421  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=-250µA, VGS=0V  
-20  
V
VDS=-16V, VGS=0V  
-0.5  
µΑ  
IDSS  
Zero Gate Voltage Drain Current  
TJ=55°C  
-2.5  
µA  
µA  
VDS=0V, VGS=±10V  
DS=0V, VGS=±12V  
VDS=VGS ID=-250µA  
±1  
IGSS  
Gate-Body leakage current  
V
±10  
-1.4  
VGS(th)  
ID(ON)  
Gate Threshold Voltage  
On state drain current  
-0.7  
-15  
-0.9  
V
A
V
GS=-4.5V, VDS=-5V  
GS=-10V, ID=-12.5A  
V
61  
83  
75  
105  
95  
mΩ  
TJ=125°C  
RDS(ON)  
Static Drain-Source On-Resistance  
mΩ  
mΩ  
V
GS=-4.5V, ID=-3A  
GS=-2.5V, ID=-1A  
75  
V
110  
8.8  
145  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
VDS=-5V, ID=-12.5A  
IS=-1A,VGS=0V  
S
V
A
-1  
-0.81  
Maximum Body-Diode Continuous Current  
-8.5  
620  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
512  
77  
pF  
pF  
pF  
VGS=0V, VDS=-10V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
62  
VGS=0V, VDS=0V, f=1MHz  
9.2  
13  
SWITCHING PARAMETERS  
Qg  
Qgs  
Qgd  
tD(on)  
tr  
Total Gate Charge  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
4.6  
0.9  
2.1  
5.2  
38  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
VGS=-4.5V, VDS=-10V,  
ID=-12.5A  
VGS=-10V, VDS=-10V, RL=0.75,  
RGEN=3Ω  
tD(off)  
tf  
17  
31  
trr  
IF=-12.5A, dI/dt=100A/µs  
IF=-12.5A, dI/dt=100A/µs  
19  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
ns  
Qrr  
6.3  
nC  
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on  
the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.  
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=175°C.  
G. The maximum current rating is limited by bond-wires.  
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA  
curve provides a single pulse rating.  
I. Revision 0: July 2006  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Alpha & Omega Semiconductor, Ltd.  
AOD421  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
40  
35  
30  
25  
20  
15  
10  
5
-10.0V  
VDS=-5V  
8
-5.0V  
-4.0V  
6
-3.0V  
-2.5V  
4
125°C  
-2.0V  
2
25°C  
VGS=-1.5V  
0
0
0
1
2
3
4
5
0
0.5  
1
1.5  
2
2.5  
3
3.5  
-VDS (Volts)  
-VGS(Volts)  
Figure 1: On-Region Characteristics  
Figure 2: Transfer Characteristics  
160  
140  
120  
100  
80  
1.6  
1.4  
1.2  
1.0  
0.8  
ID=-3A, VGS=-4.5V  
VGS=-2.5V  
VGS=-4.5V  
ID=-12.5A, VGS=-10V  
ID=-1A, VGS=-2.5V  
60  
VGS=-10V  
40  
20  
0
2
4
6
8
10  
12  
14  
0
25  
50  
75  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction Temperature  
100  
125  
150  
175  
-ID (A)  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage  
200  
180  
160  
140  
120  
100  
80  
1E+01  
1E+00  
1E-01  
1E-02  
1E-03  
1E-04  
1E-05  
1E-06  
ID=-12.5A  
125°C  
125°C  
25°C  
60  
25°C  
40  
0.0  
0.2  
0.4  
0.6  
-VSD (Volts)  
Figure 6: Body-Diode Characteristics  
0.8  
1.0  
1.2  
0
2
4
6
8
10  
-VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Alpha & Omega Semiconductor, Ltd.  
AOD421  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
800  
5
4
3
2
1
0
ID=-12.5A  
Ciss  
600  
400  
200  
0
Coss  
Crss  
0
1
2
3
4
5
6
0
5
10  
15  
20  
-Qg (nC)  
-VDS (Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
100  
10  
1
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
TJ(Max)=175C, TA=25°C  
TJ(Max)=175°C  
TA=25°C  
10µs  
100µs  
DC  
1ms  
RDS(ON)  
limited  
0.0001 0.001  
0.01  
0.1  
1
10  
100  
0.1  
Pulse Width (s)  
0.1  
1
10  
100  
Figure 10: Single Pulse Power Rating Junction-to-  
case (Note F)  
V
DS (Volts)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
D=Ton/T  
J,PK=TC+PDM.ZθJC.RθJC  
RθJC=8°C/W  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
T
PD  
0.1  
Ton  
T
Single Pulse  
0.001  
0.01  
0.00001  
0.0001  
0.01  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
0.1  
1
10  
100  
Alpha & Omega Semiconductor, Ltd.  
AOD421  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
20  
18  
16  
14  
12  
10  
8
14  
12  
10  
8
6
4
6
4
2
2
0
0
0
25  
50  
75  
TCASE (°C)  
Figure 12: Current De-rating (Note B)  
100  
125  
150  
175  
0
25  
50  
75  
100  
125  
150  
175  
TCASE (°C)  
Figure 13: Power De-rating (Note B)  
100  
10  
1
50  
TJ(Max)=150°C, TA=25°C  
TA=25°C  
10µs  
40  
30  
20  
10  
0
100µs  
1ms  
100m  
1s  
10s  
DC  
RDS(ON)  
limited  
0.1  
0.001  
0.01  
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
V
DS (Volts)  
Pulse Width (s)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
Figure 14: Maximum Forward Biased Safe  
Operating Area (Note H)  
10  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
J,PK=TA+PDM.ZθJA.RθJA  
RθJA=60°C/W  
T
1
0.1  
PD  
0.01  
0.001  
Single Pulse  
Ton  
T
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
Alpha & Omega Semiconductor, Ltd.  

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