AOI510 [AOS]

30V N-Channel AlphaMOS; 30V N通道AlphaMOS
AOI510
型号: AOI510
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

30V N-Channel AlphaMOS
30V N通道AlphaMOS

文件: 总6页 (文件大小:316K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOD510/AOI510  
30V N-Channel AlphaMOS  
General Description  
Product Summary  
VDS  
30V  
• Latest Trench Power AlphaMOS (αMOS LV) technology  
• Very Low RDS(on) at 4.5VGS  
ID (at VGS=10V)  
RDS(ON) (at VGS=10V)  
RDS(ON) (at VGS=4.5V)  
70A  
• Low Gate Charge  
• High Current Capability  
• RoHS and Halogen-Free Compliant  
< 2.6m  
< 4mΩ  
Application  
• DC/DC Converters in Computing, Servers, and POL  
100% UIS Tested  
100% Rg Tested  
• Isolated DC/DC Converters in Telecom and Industrial  
TO252  
DPAK  
TO-251A  
IPAK  
D
Top View  
Bottom View  
TopView  
Bottom View  
D
D
G
D
G
S
D
S
G
S
D
D
S
G
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
30  
±20  
70  
V
V
VGS  
TC=25°C  
Continuous Drain  
Current G  
ID  
TC=100°C  
54  
A
Pulsed Drain Current C  
IDM  
280  
45  
TA=25°C  
TA=70°C  
Continuous Drain  
Current  
IDSM  
A
37  
Avalanche Current C  
Avalanche energy L=0.1mH C  
IAS  
45  
A
mJ  
V
EAS  
101  
36  
VDS Spike  
100ns  
VSPIKE  
TC=25°C  
TC=100°C  
TA=25°C  
TA=70°C  
60  
PD  
W
Power Dissipation B  
30  
7.5  
PDSM  
W
°C  
Power Dissipation A  
5.2  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 175  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
16  
Max  
20  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
t 10s  
RθJA  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Case  
Steady-State  
Steady-State  
41  
50  
RθJC  
1.9  
2.5  
Rev 0: Feb. 2012  
www.aosmd.com  
Page 1 of 6  
AOD510/AOI510  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
ID=250µA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
30  
V
VDS=30V, VGS=0V  
1
IDSS  
Zero Gate Voltage Drain Current  
µA  
5
TJ=55°C  
VDS=0V, VGS=±20V  
VDS=VGS, ID=250µA  
VGS=10V, ID=20A  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
±100  
2.2  
2.6  
3.3  
4
nA  
V
VGS(th)  
1.2  
1.7  
2.1  
2.7  
3.2  
85  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
VGS=4.5V, ID=20A  
VDS=5V, ID=20A  
IS=1A,VGS=0V  
mΩ  
S
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
0.7  
1
V
Maximum Body-Diode Continuous Current G  
70  
A
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
2719  
1204  
169  
2
pF  
pF  
pF  
VGS=0V, VDS=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
VGS=0V, VDS=0V, f=1MHz  
0.9  
3
SWITCHING PARAMETERS  
Qg(10V) Total Gate Charge  
44  
21  
60  
28  
nC  
nC  
nC  
nC  
ns  
Qg(4.5V) Total Gate Charge  
VGS=10V, VDS=15V, ID=20A  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
9
7
9.7  
5.2  
32.5  
10.3  
VGS=10V, VDS=15V, RL=0.75,  
RGEN=3Ω  
ns  
tD(off)  
tf  
ns  
ns  
trr  
IF=20A, dI/dt=500A/µs  
IF=20A, dI/dt=500A/µs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
19.6  
42.7  
ns  
Qrr  
nC  
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends  
on the user's specific board design.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Single pulse width limited by junction temperature TJ(MAX)=175°C.  
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is package limited.  
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev 0: Feb. 2012  
www.aosmd.com  
Page 2 of 6  
AOD510/AOI510  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
120  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
10V  
4V  
VDS=5V  
3.5V  
4.5V  
VGS=3V  
125°C  
25°C  
0
1
2
3
4
5
0
1
2
3
4
5
VGS(Volts)  
VDS (Volts)  
Fig 1: On-Region Characteristics (Note E)  
Figure 2: Transfer Characteristics (Note E)  
6
5
4
3
2
1
0
1.6  
1.4  
1.2  
1
VGS=10V  
ID=20A  
VGS=4.5V  
VGS=4.5V  
ID=20A  
VGS=10V  
0.8  
0
5
10  
15  
ID (A)  
20  
25  
30  
0
25  
50  
75  
100 125 150 175 200  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
Figure 4: On-Resistance vs. JunctionTemperature  
(Note E)  
6
1.0E+02  
ID=20A  
5
4
3
2
1
0
1.0E+01  
1.0E+00  
125°C  
125°C  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
25°C  
25°C  
2
4
6
8
10  
0.0  
0.2  
0.4  
VSD (Volts)  
Figure 6: Body-Diode Characteristics (Note E)  
0.6  
0.8  
1.0  
1.2  
VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Rev 0: Feb. 2012  
www.aosmd.com  
Page 3 of 6  
AOD510/AOI510  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
4000  
VDS=15V  
ID=20A  
3500  
3000  
2500  
2000  
1500  
1000  
500  
8
Ciss  
6
4
Coss  
2
Crss  
0
0
0
10  
20  
Qg (nC)  
30  
40  
50  
0
5
10  
15  
20  
25  
30  
VDS (Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
200  
160  
120  
80  
1000.0  
100.0  
10.0  
1.0  
TJ(Max)=175°C  
TC=25°C  
RDS(ON)  
limited  
10µs  
100µs  
1ms  
10ms  
TJ(Max)=175°C  
TC=25°C  
DC  
10  
0.1  
40  
0.0  
0
0.01  
0.1  
1
100  
0.0001  
0.001  
0.01  
0.1  
1
10  
VDS (Volts)  
Pulse Width (s)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
Figure 10: Single Pulse Power Rating Junction-to-Case  
(Note F)  
10  
1
D=Ton/T  
TJ,PK=TC+PDM.ZθJC.RθJC  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJC=2.5°C/W  
PD  
Single Pulse  
0.1  
0.01  
Ton  
T
1E-05  
0.0001  
0.001  
0.01  
Pulse Width (s)  
0.1  
1
10  
100  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev 0: Feb. 2012  
www.aosmd.com  
Page 4 of 6  
AOD510/AOI510  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
80  
100  
80  
60  
40  
20  
0
60  
40  
20  
0
0
25  
50  
75  
TCASE (°C)  
Figure 12: Power De-rating (Note F)  
100  
125  
150  
175  
0
25  
50  
75  
100  
125  
150  
175  
TCASE (°C)  
Figure 13: Current De-rating (Note F)  
10000  
1000  
100  
10  
TA=25°C  
1
1E-05  
0.001  
0.1  
Pulse Width (s)  
10  
1000  
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)  
10  
1
D=Ton/T  
TJ,PK=TA+PDM.ZθJA.RθJA  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJA=50°C/W  
0.1  
PD  
Single Pulse  
0.01  
0.001  
Ton  
T
1E-05  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev 0: Feb. 2012  
www.aosmd.com  
Page 5 of 6  
AOD510/AOI510  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Rev 0: Feb. 2012  
www.aosmd.com  
Page 6 of 6  

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