AON6850 [AOS]
100V Dual N-Channel MOSFET; 100V双N沟道MOSFET
| 型号： | AON6850 |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | 100V Dual N-Channel MOSFET |
| 文件： | 总7页 (文件大小：267K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AON6850
100V Dual N-Channel MOSFET
SDMOSTM
General Description
Product Summary
The AON6850 is fabricated with SDMOSTM trench
technology that combines excellent RDS(ON) with low gate
charge and low Qrr.The result is outstanding efficiency
with controlled switching behavior. This universal
technology is well suited for PWM, load switching and
general purpose applications.
VDS
100V
ID (at VGS=10V)
RDS(ON) (at VGS=10V)
RDS(ON) (at VGS = 7V)
28A
< 35mΩ
< 42mΩ
100% UIS Tested
100% Rg Tested
D1
D2
Top View
1
8
S1
D1
2
3
7
D1
G1
S2
6
D2
G1
G2
4
5
G2
D2
S1
S2
DFN5X6 EP2
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Maximum
100
Units
Drain-Source Voltage
Gate-Source Voltage
V
V
±25
VGS
TC=25°C
28
Continuous Drain
Current
Pulsed Drain Current C
ID
TC=100°C
18
A
IDM
55
TA=25°C
TA=70°C
5
Continuous Drain
Current
IDSM
A
4
28
Avalanche Current C
IAS, IAR
A
Avalanche energy L=0.1mH C
EAS, EAR
39
mJ
TC=25°C
Power Dissipation B
TC=100°C
56
PD
W
22
TA=25°C
1.7
PDSM
W
Power Dissipation A
TA=70°C
1.1
TJ, TSTG
Junction and Storage Temperature Range
-55 to 150
°C
Thermal Characteristics
Parameter
Symbol
Typ
20
Max
24
Units
°C/W
°C/W
°C/W
Maximum Junction-to-Ambient A
t ≤ 10s
RθJA
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
60
72
Steady-State
Steady-State
RθJC
1.8
2.2
Rev 0: Feb 2010
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Page 1 of 1
AON6850
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max Units
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
ID=250µA, VGS=0V
100
V
VDS=100V, VGS=0V
10
µA
50
IDSS
Zero Gate Voltage Drain Current
TJ=55°C
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
VDS=0V, VGS= ±25V
VDS=VGS ID=250µA
VGS=10V, VDS=5V
100
4
nA
V
VGS(th)
ID(ON)
2.5
55
3.4
A
V
GS=10V, ID=5A
27
46
32
15
0.7
35
56
42
mΩ
mΩ
RDS(ON)
TJ=125°C
Static Drain-Source On-Resistance
VGS=7V, ID=4A
VDS=5V, ID=5A
IS=1A,VGS=0V
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
S
V
A
1
Maximum Body-Diode Continuous Current
45
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
1220 1530 1840
pF
pF
pF
Ω
V
GS=0V, VDS=50V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
108
39
155
66
202
93
VGS=0V, VDS=0V, f=1MHz
0.3
0.7
1.1
SWITCHING PARAMETERS
Qg(10V)
Qgs
Qgd
tD(on)
tr
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
19
7
24
9
29
11
nC
nC
nC
ns
ns
ns
ns
V
GS=10V, VDS=50V, ID=5A
4.8
8
11.2
11
5.5
16
4
VGS=10V, VDS=50V, RL=9.8Ω,
R
GEN=3Ω
tD(off)
tf
trr
IF=5A, dI/dt=500A/µs
IF=5A, dI/dt=500A/µs
16
58
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
23
83
30
ns
Qrr
nC
108
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design, and the maximum temperature of 150°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 0: Feb 2010
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Page 2 of 7
AON6850
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
50
40
30
20
10
0
60
50
40
30
20
10
0
10V
8V
VDS=5V
7.5V
7V
125°C
VGS=6V
25°C
0
2
4
6
8
10
0
1
2
3
4
5
VGS(Volts)
VDS (Volts)
Figure 2: Transfer Characteristics (Note E)
Fig 1: On-Region Characteristics (Note E)
40
2
1.8
1.6
1.4
1.2
1
VGS=10V
ID=5A
VGS=7V
35
30
25
20
VGS=10V
VGS=7V
ID=4A
0.8
0
5
10
15
20
25
30
0
25
50
75
100
125
150
175
ID (A)
Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
Figure 4: On-Resistance vs. Junction
Temperature (Note E)
60
55
50
45
40
35
30
25
1.0E+02
ID=5A
1.0E+01
125°C
1.0E+00
1.0E-01
1.0E-02
1.0E-03
125°C
25°C
25°C
0.0
0.2
0.4
0.6
0.8
1.0
1.2
6
7
8
9
10
VSD (Volts)
VGS (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 0: Feb 2010
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Page 3 of 7
AON6850
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
2200
2000
1800
1600
1400
1200
1000
800
VDS=50V
ID=5A
Ciss
8
6
4
600
Coss
Crss
2
400
200
0
0
0
5
10
15
20
25
0
10
20
30
DS (Volts)
40
50
Qg (nC)
V
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
200
160
120
80
100.0
10.0
1.0
TJ(Max)=150°C
TC=25°C
10µs
RDS(ON)
limited
100µs
DC
1ms
TJ(Max)=150°C
TC=25°C
0.1
40
0.0
0
0.01
0.1
1
10
100
1000
0.0001
0.001
0.01
0.1
1
10
VDS (Volts)
Pulse Width (s)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
10
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
J,PK=TC+PDM.ZθJC.RθJC
T
RθJC=2.2°C/W
PD
0.1
Ton
T
Single Pulse
0.0001
0.01
0.00001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 0: Feb 2010
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Page 4 of 7
AON6850
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100.0
60
50
TA=25°C
TA=100°C
40
TA=125°C
TA=150°C
10.0
30
20
10
0
1.0
1
10
100
1000
0
25
50
75
100
125
150
Time in avalanche, tA (µs)
TCASE (°C)
Figure 12: Single Pulse Avalanche capability
(Note C)
Figure 13: Power De-rating (Note F)
1000
100
10
40
TA=25°C
30
20
10
0
1
1E-04 0.001 0.01 0.1
1
10
100 1000
0
25
50
75
100
125
150
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
TCASE (°C)
Figure 14: Current De-rating (Note F)
10
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=72°C/W
0.1
0.01
PD
Single Pulse
Ton
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev 0: Feb 2010
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Page 5 of 7
AON6850
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
180
150
120
90
30
25
20
15
10
5
30
25
20
15
10
5
3
di/dt=800A/µs
125ºC
125ºC
di/dt=800A/µs
2.5
2
25ºC
25ºC
trr
1.5
1
125ºC
60
Qrr
Irm
25ºC
25ºC
30
0.5
S
125ºC
0
0
0
0
0
5
10
15
IS (A)
20
25
30
0
5
10
15
IS (A)
20
25
30
Figure 17: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
180
150
120
90
30
25
20
15
10
5
40
30
20
10
0
2.5
2
Is=20A
125ºC
Is=20A
125ºC
1.5
1
trr
25ºC
25ºC
Qrr
60
125ºC
25ºC
25ºC
0.5
30
S
Irm
125º
0
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di/dt (A/µs)
di/dt (A/µs)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Rev 0: Feb 2010
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Page 6 of 7
AON6850
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Rev 0: Feb 2010
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Page 7 of 7
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