AOZ1056AI [AOS]
EZBuck⢠2A Simple Buck Regulator; EZBuckâ ?? ¢ 2A简单的降压稳压器
| 型号： | AOZ1056AI |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | EZBuck⢠2A Simple Buck Regulator |
| 文件： | 总15页 (文件大小：664K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AOZ1056
EZBuck™ 2A Simple Buck Regulator
General Description
Features
The AOZ1056 is a high efficiency, simple to use, 2A buck
regulator. The AOZ1056 works from a 4.5V to 16V input
voltage range, and provides up to 2A of continuous
output current with an output voltage adjustable down
to 0.8V.
● 4.5V to 16V operating input voltage range
● 100mΩ internal PFET switch for high efficiency:
up to 95%
● Internal Schottky Diode
● Externally soft start
● Output voltage adjustable to 0.8V
● 2A continuous output current
● Fixed 340kHz PWM operation
● Cycle-by-cycle current limit
● Short-circuit protection
The AOZ1056 comes in an SO-8 package and is rated
over a -40°C to +85°C ambient temperature range.
● Under voltage lockout
● Output over voltage protection
● Thermal shutdown
● Small size SO-8 package
Applications
● Point of load DC/DC conversion
● PCIe graphics cards
● Set top boxes
● DVD drives and HDD
● LCD panels
● Cable modems
● Telecom/networking/datacom equipment
Typical Application
VIN
C1
22µF Ceramic
Css
82nF
SS
VIN
L1
VOUT
6.8µH
U1
3.3V
EN
LX
AOZ1056
R1
COMP
C2, C3
FB
RC
CC
22µF Ceramic
C5
R2
AGND
PGND
Figure 1. 3.3V/2A Buck Regulator
Rev. 1.2 September 2008
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Page 1 of 15
AOZ1056
Ordering Information
Part Number
Ambient Temperature Range
-40°C to +85°C
Package
Environmental
AOZ1056AIL
SO-8
RoHS Compliant
Green Product
• All AOS products are offered in packages with Pb-free plating and compliant to RoHS standards.
• Parts marked as Green Products (with “L” suffix) use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
1
2
3
4
8
7
6
5
VIN
SS
PGND
LX
AGND
COMP
EN
FB
SO-8
(Top View)
Pin Description
Pin Number
Pin Name
Pin Function
1
2
VIN
SS
Supply voltage input. When VIN rises above the UVLO threshold the device starts up.
Soft-Start pin. Connect a capacitor from SS to GND to set the soft-start period. Minimum
external soft-start capacitor of 780pF is required, and the corresponding soft-start time is
about 100µs.
3
AGND
Reference connection for controller section. Also used as thermal connection for controller
section. Electrically needs to be connected to PGND.
4
5
COMP
FB
External loop compensation pin.
The FB pin is used to determine the output voltage via a resistor divider between the output
and GND.
6
EN
The enable pin is active high. Connect EN pin to VIN if not used. Do not leave the EN pin
floating.
7
8
LX
PWM output connection to inductor. Thermal connection for output stage.
Power ground. Electrically needs to be connected to AGND.
PGND
Rev. 1.2 September 2008
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Page 2 of 15
AOZ1056
Block Diagram
VIN
Internal
+5V
UVLO
& POR
5V LDO
Regulator
OTP
EN
+
ISen
–
Reference
& Bias
Q1
ILimit
5A
+
–
+
SS
FB
+
Level
Shifter
+
FET
Driver
PWM
Control
Logic
0.8V
PWM
Comp
EAmp
–
LX
COMP
350kHz
Oscillator
Over Voltage
Protection
Comparator
+
–
0.96V
AGND
PGND
Rev. 1.2 September 2008
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Page 3 of 15
AOZ1056
Absolute Maximum Ratings
Exceeding the Absolute Maximum ratings may damage the
device.
Recommend Operating Ratings
The device is not guaranteed to operate beyond the Maximum
Operating Ratings.
Parameter
Rating
Parameter
Supply Voltage (VIN)
Rating
Supply Voltage (VIN)
LX to AGND
18V
4.5V to 16V
0.8V to VIN
-0.7V to VIN+0.3V
-0.3V to VIN+0.3V
-0.3V to 6V
Output Voltage Range
EN to AGND
Ambient Temperature (TA)
Package Thermal Resistance SO-8
-40°C to +85°C
105°C/W
FB to AGND
)
(2
COMP to AGND
PGND to AGND
Junction Temperature (TJ)
Storage Temperature (TS)
ESD Rating(1)
-0.3V to 6V
(ΘJA
)
-0.3V to +0.3V
+150°C
Note:
2. The value of ΘJA is measured with the device mounted on 1-in2
FR-4 board with 2oz. Copper, in a still air environment with TA
=
-65°C to +150°C
2kV
25°C. The value in any given application depends on the user’s spe-
cific board design.
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5k¾ in series with 100pF.
Electrical Characteristics
)
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified(3
Symbol
Parameter
Supply Voltage
Conditions
Min.
4.5
Typ. Max. Units
VIN
16
V
VUVLO
Input Under-Voltage Lockout Threshold
VIN Rising
VIN Falling
4.00
3.70
V
IIN
Supply Current (Quiescent)
Shutdown Supply Current
Feedback Voltage
IOUT = 0, VFB = 1.2V, VEN >1.2V
VEN = 0V
2
3
mA
µA
V
IOFF
VFB
1
10
0.782
0.8
0.5
0.5
0.818
Load Regulation
%
Line Regulation
%
IFB
Feedback Voltage Input Current
EN Input threshold
200
nA
VEN
Off Threshold
On Threshold
0.6
V
2.0
VHYS
EN Input Hysteresis
100
mV
MODULATOR
fO
Frequency
306
100
340
374
6
kHz
%
DMAX
DMIN
Maximum Duty Cycle
Minimum Duty Cycle
%
Error Amplifier Voltage Gain
Error Amplifier Transconductance
500
200
V/ V
µA/V
PROTECTION
ILIM
Current Limit
2.5
3.6
A
VPR
Output Over-Voltage Protection
Threshold
Off Threshold
On Threshold
960
860
mV
TJ
Over-Temperature Shutdown Limit
TJ Rising
TJ Falling
150
100
°C
µA
ISS
Soft Start Charge Current
5
OUTPUT STAGE
High-Side Switch On-Resistance
VIN = 12V
VIN = 5V
97
166
130
200
mΩ
Note:
3. Specification in BOLD indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design.
Rev. 1.2 September 2008
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Page 4 of 15
AOZ1056
Typical Performance Characteristics
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Light Load (DCM) Operation
Full Load (CCM) Operation
Vin ripple
0.1V/div
Vin ripple
0.1V/div
Vo ripple
20mV/div
Vo ripple
20mV/div
VLX
5V/div
VLX
5V/div
2s/div
2s/div
Startup to Full Load
Short Circuit Protection
Vo
2V/div
Vo
2V/div
lL
1A/div
lin
1A/div
4ms/div
10ms/div
50% to 100% Load Transient
Short Circuit Recovery
Vo
2V/div
Vo Ripple
50mV/div
lo
1A/div
IL
1A/div
400s/div
1ms/div
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AOZ1056
Efficiency
Efficiency (VIN = 12V) vs. Load Current
95
90
85
80
75
70
5.0V OUTPUT
3.3V OUTPUT
1.8V OUTPUT
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Load Current (A)
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AOZ1056
Detailed Description
The AOZ1056 is a current-mode step down regulator with
integrated high side PMOS switch and a low side free-
wheeling Schottky diode. It operates from a 4.5V to 16V
input voltage range and supplies up to 2A of load
current. The duty cycle can be adjusted from 6% to 100%
allowing a wide range of output voltages. Features
include enable control, under voltage lockout, external
soft-start, output over-voltage protection, over-current
protection and thermal shut down.
The voltage on EN pin must be above 2.0V to enable the
AOZ1056. When voltage on EN pin falls below 0.6V, the
AOZ1056 is disabled. If an application circuit requires the
AOZ1056 to be disabled, an open drain or open collector
circuit should be used to interface to the EN pin.
Steady-State Operation
Under steady-state conditions, the converter operates in
fixed frequency and Continuous-Conduction Mode (CCM).
The AOZ1056 is available in an SO-8 package.
The AOZ1056 integrates an internal P-MOSFET as the
high-side switch. Inductor current is sensed by amplifying
the voltage drop across the drain to source of the high
side power MOSFET. Output voltage is divided down by
the external voltage divider at the FB pin. The difference
of the FB pin voltage and reference is amplified by the
internal transconductance error amplifier. The error volt-
age, which shows on the COMP pin, is compared against
the current signal, which is sum of inductor current signal
and ramp compensation signal, at PWM comparator
input. If the current signal is less than the error voltage,
the internal high-side switch is on. The inductor current
flows from the input through the inductor to the output.
When the current signal exceeds the error voltage, the
high-side switch is off. The inductor current is freewheel-
ing through the internal Schottky diode to output.
Enable and Soft Start
The AOZ1056 has an external soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process begins
when the input voltage rises to 4.0V and voltage on EN
pin is HIGH. In soft start process, a 5µA internal current
source charges the external capacitor at SS. As the SS
capacitor is charged, the voltage at SS rises. The SS
voltage clamps the reference voltage of the error ampli-
fier, therefore output voltage rising time follows the SS pin
voltage. With the slow ramping up output voltage, the
inrush current can be prevented. For proper start-up and
operation of the IC, the minimum external soft-start
capacitor required is 780pF, and the corresponding
soft-start time is about 100µs. The graph below shows the
soft-start capacitance and the corresponding soft-start
time.
The AOZ1056 uses a P-Channel MOSFET as the high
side switch. It saves the bootstrap capacitor normally
seen in a circuit which is using an NMOS switch. It allows
100% turn-on of the upper switch to achieve linear
regulation mode of operation. The minimum voltage drop
A simple equation can also be used to choose the soft-
start capacitor according to the desired soft-start time:
from V to V is the load current x DC resistance of
MOSFET + DC resistance of buck inductor. It can be
IN
O
Css(nf) ≈ 6.9 × Tss(ms)
calculated by equation below
:
16
14
12
10
8
V
= V – I × (R
+ R
)
inductor
O_MAX
where;
VO_MAX is the maximum output voltage,
IN
O
DS(ON)
VIN is the input voltage from 4.5V to 16V,
IO is the output current from 0A to 2A,
6
RDS(ON) is the on resistance of internal MOSFET, the value is
between 97mΩ and 200mΩ depending on input voltage and
junction temperature, and
4
2
0
Rinductor is the inductor DC resistance.
0
20
40
60
80
100
Soft-Start Capacitor (nF)
Switching Frequency
The AOZ1056 switching frequency is fixed at 340kHz and
set by an internal oscillator.
The EN pin of the AOZ1056 is active high. Connect the
EN pin to V if enable function is not used. Pulling EN to
IN
ground will disable the AOZ1056. Do not leave it open.
Rev. 1.2 September 2008
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Page 7 of 15
AOZ1056
terminate the current duty cycle. The inductor current stop
rising. The cycle-by-cycle current limit protection directly
limits inductor peak current. The average inductor current
is also limited due to the limitation on peak inductor cur-
rent. When cycle-by-cycle current limit circuit is triggered,
the output voltage drops as the duty cycle decreases.
Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin with a resistor divider network. In the
application circuit shown in Figure 1. The resistor divider
network includes R and R . Usually, a design is started
1
2
by picking a fixed R value and calculating the required
2
R with equation below.
1
The AOZ1056 has internal short circuit protection to
protect itself from catastrophic failure under output short
circuit conditions. The FB pin voltage is proportional to the
output voltage. Whenever FB pin voltage is below 0.2V,
the short circuit protection circuit is triggered. As a result,
the converter is shut down and hiccups. The converter will
start up via a soft start once the short circuit condition
disappears. In short circuit protection mode, the inductor
average current is greatly reduced.
R
⎛
⎞
⎟
⎠
1
------
V
= 0.8 × 1 +
⎜
O
R
⎝
2
Some standard values of R and R for most commonly
used output voltage values are listed in Table 1.
1
2
Table 1.
V (V)
R (kΩ)
R (kΩ)
O
1
2
Output Over Voltage Protection (OVP)
0.8
1.2
1.5
1.8
2.5
3.3
5.0
1.0
4.99
10
Open
10
The AOZ1056 monitors the feedback voltage: when the
feedback voltage is higher than 960mV, it immediately
turns-off the PMOS to protect the output voltage over-
shoot at fault condition. When feedback voltage is lower
than 860mV, the PMOS is allowed to turn on in the next
cycle.
11.5
10.2
10
12.7
21.5
31.6
52.3
10
UVLO
10
A UVLO circuit monitors the input voltage. When the input
voltage exceeds 4V, the converter starts operation. When
input voltage falls below 3.7V, the converter will stop
switching.
The combination of R and R should be large enough to
avoid drawing excessive current from the output, which
will cause power loss.
1
2
Thermal Protection
Since the switch duty cycle can be as high as 100%, the
maximum output voltage can be set as high as the input
voltage minus the voltage drop on upper PMOS and
inductor.
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
high side PMOS if the junction temperature exceeds
150°C. The regulator will restart automatically under the
control of soft-start circuit when the junction temperature
decreases to 100°C.
Protection Features
The AOZ1056 has multiple protection features to prevent
system circuit damage under abnormal conditions.
Application Information
Over Current Protection (OCP)
The basic AOZ1056 application circuit is shown in
Figure 1. Component selection is explained below.
The sensed inductor current signal is also used for over
current protection. Since the AOZ1056 employs peak
current mode control, the COMP pin voltage is
proportional to the peak inductor current. The COMP
pin voltage is limited to be between 0.4V and 2.5V
internally. The peak inductor current is automatically
limited cycle by cycle.
Input Capacitor
The input capacitor (C in Figure 1) must be connected
1
to the V pin and PGND pin of the AOZ1056 to maintain
IN
steady input voltage and filter out the pulsing input
current. A small decoupling capacitor (C in Figure 1),
d
usually 1µF, should be connected to the V pin and
IN
The cycle-by-cycle current limit threshold is set between
2.5A and 3.6A. When the load current reaches the
current limit threshold, the cycle-by-cycle current limit
circuit turns off the high side switch immediately to
AGND pin for stable operation of the AOZ1056. The
voltage rating of input capacitor must be greater than
maximum input voltage + ripple voltage.
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Page 8 of 15
AOZ1056
The input ripple voltage can be approximated by equation
below:
Inductor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is,
I
V
V
O
⎛
⎞
⎟
⎠
O
O
-----------------
--------
--------
ΔV
=
× 1 –
×
⎜
IN
V
f × C
V
⎝
IN
IN
IN
V
V
O
⎛
⎞
⎟
⎠
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
O
----------
--------
ΔI
=
× 1 –
⎜
L
V
f × L
⎝
IN
The peak inductor current is:
ΔI
L
--------
V
I
= I +
⎛
⎜
⎝
⎞
⎟
⎠
V
O
Lpeak
O
O
--------
--------
2
I
= I ×
1 –
CIN_RMS
O
V
V
IN
IN
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 20%
to 40% of output current.
if let m equal the conversion ratio:
V
O
--------
= m
V
IN
The relationship between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 2 on the next page. It can be seen that when V is
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
O
half of V , C is under the worst current stress. The
IN
IN
worst current stress on C is 0.5 x I .
IN
O
The inductor takes the highest current in a buck circuit.
The conduction loss on inductor needs to be checked for
thermal and efficiency requirements.
0.5
0.4
0.3
0.2
0.1
0
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. But they
cost more than unshielded inductors. The choice depends
on EMI requirement, price and size.
ICIN_RMS(m)
IO
Output Capacitor
0
0.5
m
1
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
Figure 2. ICIN vs. Voltage Conversion Ratio
For reliable operation and best performance, the input
capacitors must have current rating higher than I
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high ripple current rating. Depending on the
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be considered
for long term reliability.
CIN_RMS
application circuits, other low ESR tantalum capacitor
or aluminum electrolytic capacitor may also be used.
When selecting ceramic capacitors, X5R or X7R type
dielectric ceramic capacitors are preferred for their better
temperature and voltage characteristics. Note that the
ripple current rating from capacitor manufacturers is
based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
1
⎛
⎞
⎠
-------------------------
ΔV = ΔI × ESR +
CO
O
L
⎝
8 × f × C
O
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Page 9 of 15
AOZ1056
where;
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
CO is output capacitor value, and
ESRCO is the Equivalent Series Resistor of output capacitor.
1
------------------------------------------------
f
=
Z1
2π × C × ESR
O
CO
When a low ESR ceramic capacitor is used as the output
capacitor, the impedance of the capacitor at the switching
frequency dominates. Output ripple is mainly caused by
capacitor value and inductor ripple current. The output
ripple voltage calculation can be simplified to:
where;
CO is the output filter capacitor,
RL is load resistor value, and
1
ESRCO is the equivalent series resistance of output capacitor.
-------------------------
ΔV = ΔI ×
O
L
8 × f × C
O
The compensation design is actually to shape the
converter close loop transfer function to get desired gain
and phase. Several different types of compensation
network can be used for the AOZ1056. For most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided
by capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
ΔV = ΔI × ESR
CO
O
L
In the AOZ1056, FB pin and COMP pin are the inverting
input and the output of internal transconductance error
amplifier. A series R and C compensation network
connected to COMP provides one pole and one zero.
For lower output ripple voltage across the entire operating
temperature range, X5R or X7R dielectric type of ceramic,
or other low ESR tantalum are recommended to be used
as output capacitors.
The pole is
:
In a buck converter, the output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak-to-peak inductor ripple current.
It can be calculated by:
G
EA
------------------------------------------
=
f
P2
2π × C × G
C
VEA
where;
ΔI
GEA is the error amplifier transconductance, which is 200 x 10-6
A/V,
L
----------
I
=
CO_RMS
12
GVEA is the error amplifier voltage gain, which is 500 V/V, and
CC is compensation capacitor.
Usually, the ripple current rating of the output capacitor
is a smaller issue because of the low current stress.
When the buck inductor is selected to be very small
and inductor ripple current is high, output capacitor
could be overstressed.
The zero given by the external compensation net-
work, capacitor C (C in Figure 1) and resistor R
C
5
C
(R in Figure 1), is located at:
1
1
Loop Compensation
-----------------------------------
f
=
Z2
2π × C × R
C
C
The AOZ1056 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output L&C
filter. It greatly simplifies the compensation loop design.
To design the compensation circuit, a target crossover
frequency f for close loop must be selected. The system
C
crossover frequency is where control loop has unity gain.
The crossover frequency is also called the converter
bandwidth. Generally a higher bandwidth means faster
response to load transient. However, the bandwidth
should not be too high due to system stability concern.
When designing the compensation loop, converter
stability under all line and load condition must be
considered.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system in
frequency domain. The pole is dominant pole and can be
calculated by:
1
----------------------------------
f
=
P1
2π × C × R
O
L
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Page 10 of 15
AOZ1056
Usually, it is recommended to set the bandwidth to be
less than 1/10 of switching frequency. It is recommended
to choose a crossover frequency less than 34kHz.
In the PCB layout, minimizing the two loops area reduces
the noise of this circuit and improves efficiency. A ground
plane is recommended to connect input capacitor, output
capacitor, and PGND pin of the AOZ1056.
f
= 34kHz
C
In the AOZ1056 buck regulator circuit, the two major
power dissipating components are the AOZ1056 and
output inductor. The total power dissipation of converter
circuit can be measured by input power minus output
power.
The strategy for choosing R and C is to set the cross
C
C
over frequency with R and set the compensator zero
C
with C . Using selected crossover frequency, f , to
C
C
calculate R :
C
P
= V × I – V × I
IN IN O O
total_loss
V
2π × C
O
O
---------- -----------------------------
R
= f ×
×
C
C
V
G
× G
EA CS
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
FB
where;
P
= I × (1 – D) × V
O FW_Schottky
inductor_loss
fC is desired crossover frequency,
VFB is 0.8V,
GEA is the error amplifier transconductance, which is 200x10-6
A/V, and
The actual AOZ1056 junction temperature can be
calculated with power dissipation in the AOZ1056 and
thermal impedance from junction to ambient.
GCS is the current sense circuit transconductance, which is
5.64 A/V.
T
(P
=
junction
– P
– P
) × Θ + T
inductor_loss JA amb
total_loss
diode_loss
The compensation capacitor C and resistor R together
C
C
The maximum junction temperature of AOZ1056 is
150°C, which limits the maximum load current capability.
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of selected
crossover frequency. C can is selected by:
C
The thermal performance of the AOZ1056 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC
will operate under the recommended environmental
conditions.
1.5
----------------------------------
=
C
C
2π × R × f
C
p1
The previous equation above can also be simplified to:
Several layout tips are listed below for the best electric
and thermal performance. Figure 3 below illustrates a
single layer PCB layout example as reference.
C × R
O
L
---------------------
C
=
C
R
C
1. Do not use thermal relief connection to the V and
IN
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
the PGND pin. Pour a maximized copper area to
the PGND pin and the V pin to help thermal
IN
dissipation.
Thermal Management and Layout
Consideration
2. Input capacitor should be connected to the V pin
IN
and the PGND pin as close as possible.
In the AOZ1056 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
3. A ground plane is preferred. If a ground plane is
not used, separate PGND from AGND and connect
them only at one point to avoid the PGND pin noise
coupling to the AGND pin. In this case, a decoupling
starts from the input capacitors, to the V pin, to the LX
IN
pin, to the filter inductor, to the output capacitor and load,
and then return to the input capacitor through ground.
Current flows in the first loop when the high side switch is
on. The second loop starts from inductor, to the output
capacitors and load, to the PGND pin of the AOZ1056, to
the LX pin of the AZO1056. Current flows in the second
loop when the low side diode is on.
capacitor should be connected between V pin and
IN
AGND pin.
4. Make the current trace from LX pin to L to Co to the
PGND as short as possible.
Rev. 1.2 September 2008
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Page 11 of 15
AOZ1056
5. Pour copper plane on all unused board area and
connect it to stable DC nodes, like V , GND or
may be coupled to other part of
circuit.
IN
V
.
OUT
7. Keep sensitive signal trace such as trace connected
with FB pin and COMP pin far away form the LX pins.
6. The LX pin is connected to internal PFET drain. They
are low resistance thermal conduction path and most
noisy switching node. Connected a copper plane to
LX pin to help thermal dissipation. This copper plane
should not be too larger otherwise switching noise
L
Cin
Vo
VIN
SS
1
2
4
7
6
5
Cout
Css
AGND
COMP
EN
FB
Cc
Rc
R2
R1
Vo
Figure 3. AOZ1056 PCB Layout
Rev. 1.2 September 2008
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Page 12 of 15
AOZ1056
Package Dimensions, SO-8
D
Gauge Plane
Seating Plane
0.25
e
8
L
E
E1
h x 45°
1
C
θ
7° (4x)
A2
A
0.1
A1
b
Dimensions in millimeters
Dimensions in inches
Symbols Min. Nom. Max.
Symbols Min.
Nom. Max.
0.053 0.065 0.069
0.004 0.010
0.049 0.059 0.065
2.20
A
A1
A2
b
1.35
0.10
1.25
0.31
0.17
4.80
3.80
1.65
—
1.75
0.25
1.65
0.51
0.25
5.00
4.00
A
A1
A2
b
—
1.50
—
0.012
0.007
—
—
0.020
0.010
c
—
c
5.74
D
E1
e
4.90
3.90
1.27 BSC
6.00
—
D
E1
e
0.189 0.193 0.197
0.150 0.154 0.157
0.050 BSC
1.27
E
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
E
0.228 0.236 0.244
h
h
0.010
0.016
0°
—
—
—
0.020
0.050
8°
L
—
L
0.80
θ
—
θ
Unit: mm
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Rev. 1.2 September 2008
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Page 13 of 15
AOZ1056
Tape and Reel Dimensions, SO-8
Carrier Tape
P1
P2
D1
T
E1
E2
E
B0
K0
D0
P0
A0
Feeding Direction
UNIT: mm
Package
A0
B0
K0
D0
D1
E
E1
E2
P0
P1
P2
T
SO-8
(12mm)
6.40
0.10
5.20
0.10
2.10
0.10
1.60
0.10
1.50
0.10
12.00 1.75
0.10 0.10
5.50
0.10
8.00
0.10
4.00
0.10
2.00
0.10
0.25
0.10
Reel
W1
S
G
V
N
K
M
R
H
W
UNIT: mm
Tape Size Reel Size
12mm ø330
M
N
W
W1
H
K
S
G
R
V
ø330.00 ø97.00 13.00 17.40
ø13.00
10.60
2.00
0.50
—
—
—
0.50
0.10
0.30
1.00 +0.50/-0.20
Leader/Trailer and Orientation
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
Rev. 1.2 September 2008
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Page 14 of 15
AOZ1056
AOZ1056 Package Marking
Z1056AI
FAYWLT
Part Number
Underline Denotes Green Product
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
Rev. 1.2 September 2008
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Page 15 of 15
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