ATA5283P-6AP [ATMEL]
Interface IC for 125 kHz Wake-up Function; 接口IC，适用于125 kHz的唤醒功能
| 型号： | ATA5283P-6AP |
| 厂家： | 
ATMEL |
| 描述： | Interface IC for 125 kHz Wake-up Function |
| 文件： | 总14页 (文件大小：232K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Wake-up Function for a Microcontroller with Preamble Detection
• 1 mVrms Sensitivity
• 1 µA Standby Current
• Power Supply: 2 V to 3.8 V
• Baud Rate: up to 4 kbps (ASK Modulation)
• Operation Temperature: up to 125°C
• Withstands +175°C
• Few External Components
Interface IC for
125 kHz
Application
• Tire Pressure Monitoring (TPM)
Wake-up
Function
Description
The ATA5283 is a 125 kHz ultra-low power receiver used for the wake-up function of
Tire Pressure Monitoring (TPM) application. The sensitive input stage of the IC ampli-
fies and demodulates the carrier signal from the antenna coil to a digital output signal
for a microcontroller. During the standby mode the preamble detection unit monitors
the incoming signal and activates the wake-up output and the data output, if the IC
receives a proper 125 kHz carrier signal.
ATA5283
By combining the IC with an antenna coil, a microcontroller, an RF transmitter/trans-
ceiver, a battery, temperature- and pressure sensor, it is possible to design a
complete Tire Pressure Monitoring system (TPM).
Preliminary
Figure 1. Block Diagram
Battery
VDD
ATA5283
Amplifier
with AGC
Lx
COIL
RESET
N_WAKEUP
Vref
Preamble
check
Condi-
tioner
N_DATA
TST1
TST2
GND
Rev. 4598D–AUTO–03/04
Pin Configuration
Figure 2. Pinning TSSOP8L
COIL
TST1
TST2
VSS
1
2
3
4
8
7
6
5
VDD
N_WAKEUP
N_DATA
RESET
Pin Description
Pin
Symbol
Function
1
COIL
Antenna coil input
Test pin (reserved)
Test pin (reserved)
Signal ground
2
TST1
3
TST2
4
VSS
5
RESET
N_DATA
N_WAKEUP
VDD
External reset input
Data signal
6
7
Low active wake-up signal for microcontroller
Battery voltage
8
2
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Functional
Description
The ATA5283 is an ultra-low power ASK receiver. Without a carrier signal it operates in
the standby listen mode. In this mode it monitors the coil input with a very low current
consumption. To activate the IC and the connected control unit, the transmitting stage
must send the preamble carrier burst. After a preamble is detected the IC is activated. It
adapts the gain of the input stage and enables the wake-up and the data output. The
first gap at the end of the preamble generates a wake-up signal for the microcontroller.
After that the receiver outputs the data signal at N_DATA. To return the IC into the
standby listen mode it must be reset via the RESET input.
AGC Amplifier
The input stage contains an Automatic Gain Control (AGC) amplifier to amplify the input
signal from the coil. The gain is adjusted by the automatic gain control circuit if a pream-
ble signal is detected. The high dynamic range of the AGC enables the IC to operate
with input signals from 1 mVrms to 1.1 Vrms. After the AGC settling time the amplifier out-
put delivers a 125 kHz signal with an amplitude adjusted for the following evaluation
circuits’ preamble detection, signal conditioner, wake-up.
Preamble Detection
Before data transmission the IC stays in standby listen mode. To prevent the circuit from
unintended operations in a noisy environment the preamble detection circuit checks the
input signal. A valid signal is detected by a counter after 192 carrier periods without
interrupts. Short interrupts which are suppressed by the signal conditioner are tolerated.
When a valid carrier (preamble) is found the circuit starts the automatic gain control. It
requires up to 512 carrier periods to settling. The complete preamble should have 704
carrier periods minimum. The preamble is terminated and the data transfer is started
with the first gap (Start Gap) in the carrier (see Figure 3).
Figure 3. Communication Protocol
Preamble
>5.64 ms
Start
gap
Data
Procedure
Signal
192 Periods >512 Periods
of LF
of LF
N_DATA
N_WAKEUP
RESET
Gain
control
No gain
control
AGC
adjustment
Gain control
active
No Gain Control
0.5 µA
Current
profile
2 µA
1 µA
3
4598D–AUTO–03/04
Automatic Gain Control
For a correct demodulation the signal conditioner needs appropriate internal signal
amplitude. To control the input signal the ATA5283 has a build in digital AGC. The gain
control circuit regulates the internal signal amplitude to the reference value (Ref2, Fig-
ure 4). It decreases the gain by one step if the internal signal exceeds the reference
level for two periods and it increases the gain by one step if eight periods do not achieve
the reference level. In the standby listen mode the gain is reset to the maximum value. If
a valid preamble signal (192 valid carrier clocks) is detected the automatic gain control
is activated.
Note:
With the variation of the gain the coil input impedance changes from high impedance to
minimal 143 kΩ because of the internal regulator circuit (see Figure 10).
Figure 4. Automatic Gain Control
Transmitted
signal
Coil
input
Gain control
reference
Ref.2
Ref.1
Gap detection
reference
Gain controlled
signal
Internal comparator
singal
N_DATA
4
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Signal Conditioner
The signal conditioner demodulates the amplifier output signal and converts it to a
binary signal. It compares the carrier signal with the 50% reference level (see Ref1 in
Figure 5) and delivers a logical 1, if the carrier signal stays below the reference and a
logical 0, if it exceeds the reference level. A smoothing filter suppress the space
between the half-waves as well as a few missing periods in the carrier and glitches dur-
ing the gaps.
The output signal of the signal conditioner is used as the internal data signal for the data
output, the wake-up logic and the preamble detection.
The timing of the demodulated data signal is delayed related to the signal at the trans-
mitting end. This delay is a function of the carrier frequency, the behavior of the
smoothing filter and the antenna Q-factor. The smoothing filter causes a delay of 3 to
6 periods (see tb and td in Figure 5). The rest of the delay is caused by the build-up time
of the antenna signal and is conditioned on the Q-factor (see ta and tc in Figure 5).
Figure 5. Output Timing
Ref.2
100%
50%
Ref.1
Coil
input
Comparator
output
N_DATA
ta tb
tON
tc
td
tOFF
5
4598D–AUTO–03/04
The following diagrams show the delay of the data signal as a function of the antenna
Q-factor.
Figure 6. Turn On Delay Time (tON) versus Antenna Q-Factor
250
ffield = 125 kHz
200
Typ.
Max.
150
100
Min.
50
0
0
10
20
30
40
50
Q-factor
Figure 7. Turn Off Delay Time (toff) versus Antenna Q-Factor
200
180
160
140
120
100
80
ffield = 125 kHz
Typ.
Max.
60
Min.
40
20
0
0
10
20
30
40
50
Q-factor
Data Output
The data output N_DATA outputs the demodulated and digitized LF signal according to
the envelope of the antenna input signal. In the standby mode the N_DATA output is
disabled and set to level 1. It is enabled by the wake-up signal and it outputs 1 level if
the IC detects the carrier signal and a 0 level during the gaps (see Figure 3).
As the circuit does not check the received data (except the preamble), it is up to the user
to choose the kind of encoding (pulse distance, Manchester, bi-phase...) wanted.
Wake-up Signal
The wake-up signal (N_WAKEUP) indicates that the ATA5283 has detected the end of a
preamble signal and has left the standby mode. It can be used as a wake-up or a chip
select signal for an external device (see Figure 3).
After a preamble is detected the first valid gap (Start Gap) sets the N_WAKEUP output
to low and enables the data output N_DATA. The N_WAKEUP holds the low level until
the IC is reset to the standby mode by a reset signal.
6
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Reset
The IC is reset either by the internal POR circuit during a power on sequence or by a
high pulse at the RESET pin. After the reset all internal counters are in the initial state
and the IC is in the standby listen mode.
The POR circuit generates a reset while the supply voltage VDD is below the power on
reset threshold VPOR and release the function of the IC if VDD exceeds this threshold.
A high signal at the RESET pin resets the complete circuit. If the IC is activated a reset
signal is necessary to activate the standby listen mode.
The RESET pin can also be used to hold the IC in a power down state. In this state the
the IC is out of operation and the current consumption is below the standby current.
Note:
The RESET pin is high impedance CMOS input. To avoid floating effects like undefined
input states and malfunctions it should not be open.
Standby Listen Mode
In the standby listen mode the IC monitors the coil input with a very low current con-
sumption. The automatic gain control is switched off and the gain is set to the maximum
value. The N_DATA and the N_WAKEUP output are set to a high level.
Before the controller enters its standby mode after the communication, it should activate
the standby listen mode of the ATA5283 with a reset signal. This measure ensures that
the IC enters the power saving standby mode and that the IC wakes the controller cor-
rectly with the next preamble signal.
Applications
Figure 8 shows a typical TPM application of the ATA5283. Combined with the antenna
resonant circuit the ATA5283 is used as wake-up receiver for the microcontroller and
the connected temperature- and pressure-sensor.
Note:
To avoid supply voltage ripples to affect the microcontroller, an RC filter (R1 = 100 Ω,
C1 = 10 nF) is recommended.
Figure 8. Application
R1
C1
125 kHz
8
ATA5283
Temp.
Sensor
Amplifier
with
AGC
RESET
5
Antenna
Driver
Central
Board
Controller
1
N_WAKEUP
N_DATA
Micro
controller
7
6
∫
ATA5275
Pressure
Sensor
Vref
LA CA
2
4
3
UHF - Rx
T5743
UHF - Tx
433 MHz
ATAR862
7
4598D–AUTO–03/04
Figure 9. Pin Connection and Pin Protection
ATA5283
COIL_X
VDD
1
8
Divider impedance
143 kΩ ... 5 MΩ
VDD
VDD
N_WAKEUP
TST1
2
3
7
6
2 k
VDD
VDD
VDD
TST2
N_DATA
2 k
VDD
VSS
4
5
RESET
1 k
Figure 10. Coil Input Impedance
10000
max.
typ.
min.
1000
100
1
10
100
1000
10000
Coil Input Signal (mVPP
)
8
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Absolute Maximum Ratings
Parameters
Symbol
VDD
VIN
Value
Unit
V
Power supply
-0.3 to +6.5
Input voltage (except coil inputs)
Input current coil
VSS-0.3 < VIN < VDD + 0.3
V
ICI
±10
mA
V
Input voltage coil
VCI
VDD-3.5 < VCI < VDD + 3.5
ESD protection (human body)
Operating temperature range
Withstanding 175°C
Storage temperature range
Soldering temperature
VESD
Tamb
tTEMP
Tstg
4
kV
°C
min.
°C
°C
-40 to +125
30
-40 to +150
260
Tsld
Thermal Resistance
Parameters
Symbol
Value
Unit
Thermal resistance junction ambient
RthJA
210
K/W
Operating Range
Parameters
Symbol
VDD
Value
2 to 3.8
Unit
V
Power supply range
Operating temperature range
TOP
-40 to -125
°C
Electrical Characteristics
VSS = 0 V, VDD = 2 V to 3.8 V, Tamb = -40° C to +105°C, characterized up to 125°C, unless other specified
No.
1
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
Power Supply and Coil Limiter
Power supply
1.1
8
VDD
2
3.2
3.8
0.8
0.8
0.8
1.0
1.5
V
A
A
A
C
A
C
Reset supply current -40
Reset supply current +25
Reset supply current +85
Reset supply current +105
Reset supply current +125
µA
µA
µA
µA
µA
1, 2,
3, 8
1.2
IDDR
0.4
Supply current
(standby listen mode) -40
1.4
1.5
1.6
1.6
1.7
µA
µA
µA
µA
µA
A
A
C
A
C
Supply current
(standby listen mode) +25
Supply current
(standby listen mode) +85
1, 2,
3, 8
1.3
IDDL
1.1
Supply current
(standby listen mode) +105
Supply current
(standby listen mode) +125
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
9
4598D–AUTO–03/04
Electrical Characteristics (Continued)
VSS = 0 V, VDD = 2 V to 3.8 V, Tamb = -40° C to +105°C, characterized up to 125°C, unless other specified
No.
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
Supply current with carrier
(AGC active) -40
4.0
µA
A
Supply current with carrier
(AGC active) +25
4.1
4.2
4.2
4.2
µA
µA
µA
µA
Vp
Vp
Vp
A
C
A
C
A
A
A
Supply current with carrier
(AGC active) +85
1,2,
3, 8
1.4
IDD
2
Supply current with carrier
(AGC active) +105
Supply current with carrier
(AGC active) +125
ICI = ± 1 mA
±1.4
±1.6
±1.8
VDD = 2 V
Coil input voltage referred to
VDD (Input coil limiter for
channels X, Y, Z)
ICI = ± 1 mA
VDD = 3.2 V
1.5
1-3
VC
ICI = ± 1 mA
VDD = 3.8 V
2
Amplifiers
2.1
2.2
2.3
2.4
2.5
Wake-up sensitivity
Bandwidth
125 kHz input signal
Without coil
7
6
6
6
1
VSENS
BW
fu
1
2.2
mVrms
kHz
kHz
kHz
kΩ
A
C
C
C
A
150
180
30
Upper corner frequency
Lower corner frequency
Input impedance
Without coil
Without coil
fo
f = 125 kHz
RIN
143
V
IN ≥ 1 mVrms at
2.6
3
Input capacitance
1
CIN
10
pF
C
125 kHz
Automatic Gain Control
Preamble detection time
VIN ≥ 3 mVrms at
3.1
tDAGC
192
Periods
B
125 kHz
f = 125 kHz
VIN = 1 mVrms
tAGC
0
VIN = 3 mVrms
VIN = 30 mVrms
3.2
AGC adjustment time
48
Periods
C
tAGC
tAGC
tAGC
tAGC
220
292
450
VIN = 100 mVrms
VIN = 1 Vrms
512
20
Signal change rate
(gap detection)
Coil input signal
100% to 37% (τ )
3.3
3.4
1
1
1
tEOS
tCORR
tCORR
Periods
Periods
Periods
C
C
C
Coil input signal:
50 to 100% changing
52
AGC correction time
(no gap detection)
Coil input signal:
100 to 50% changing
208
3.5
3.6
3.7
Data rate (Q < 20)
125 kHz ASK
DR
tON
4
kbits/s
µs
A
A
A
Delay time RF signal to data 125 kHz ASK
Delay time RF signal to data 125 kHz ASK
40
40
tOFF
µs
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
10
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Electrical Characteristics (Continued)
VSS = 0 V, VDD = 2 V to 3.8 V, Tamb = -40° C to +105°C, characterized up to 125°C, unless other specified
No.
4
Parameters
Interface
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
0.8 ×
VDD
4.1
4.1.1
4.2
Reset input level high
Reset pulse width
5
5
5
VHRESET
tRESET
VDD
V
µs
V
A
A
C
VRESET = VDD
20
0.2 ×
VDD
Reset input level low
VLRESET
0
Reset input leakage current
low
4.3
4.4
4.5
4.6
4.7
V
RESET = VSS
5
5
7
7
6
6
IIL
-0.2
0
0
µA
µA
V
A
A
A
A
A
A
Reset input leakage current
high
VRESET = VDD
IIH
0.2
VDD
N_WAKEUP output level
high
0.8 ×
VDD
INWAKEUP = -100 µA
VHNWAKE
VLNWAKE
VHNDATA
VLNDATA
0.2 ×
VDD
N_WAKEUP output level low
N_DATA output level high
I
NWAKEUP = 100 µA
IN_DATA = -100 µA
N_DATA = 100 µA
0
V
0.8 ×
VDD
VDD
V
0.2 ×
VDD
4.8
5
N_DATA output level low
I
0
1
V
Power Supply and Reset
VDD power on reset
threshold
5.1
VPOR
tPON
tRST
1.5
1.9
100
200
V
A
C
C
Switch on VDD to
circuit active
5.2
5.3
Power-up time
ms
µs
RESET reactivation caused
by negative spikes on VDD
tBDN = 500 ns
7
10
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
11
4598D–AUTO–03/04
Ordering Information
Extended Type Number
Package
TSSOP8L
TSSOP8L
Remarks
ATA5283P-6AQ
Taped and reeled
Taped and reeled
ATA5283P-6AP
Package Information
12
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Revision History
Please note that the following page numbers referred to in this section refer to the
specific revision mentioned, not to this document.
Changes from Rev.
4598C - 08/03 to Rev.
4598D - 03/04
1. Electrical Characteristics table: some values changed
2. Ordering Information changed
13
4598D–AUTO–03/04
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4598D–AUTO–03/04
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