T2526N036-6AQY [ATMEL]
Telecom Circuit, 1-Func, PDSO8, 3 MM, LEAD FREE, TSSOP-8;
| 型号： | T2526N036-6AQY |
| 厂家： | 
ATMEL |
| 描述： | Telecom Circuit, 1-Func, PDSO8, 3 MM, LEAD FREE, TSSOP-8 ATM 异步传输模式 电信 光电二极管 电信集成电路 |
| 文件： | 总13页 (文件大小：246K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
•
•
•
•
•
•
•
No External Components Except PIN Diode
Supply-voltage Range: 2.7V to 5.5V
Automatic Sensitivity Adaptation (AGC)
Automatic Strong Signal Adaptation (ATC)
Automatic Supply Voltage Adaptation
Enhanced Immunity against Ambient Light Disturbances
Available for Carrier Frequencies between 30 kHz to 76 kHz; adjusted
by Zener-Diode Fusing ±2.5%
Low-voltage
IR Receiver
ASSP
•
TTL and CMOS Compatible
Applications
•
•
•
Audio Video Applications
Home Appliances
Remote Control Equipment
T2526
1. Description
The IC T2526 is a complete IR receiver for data communication developed and opti-
mized for use in carrier-frequency-modulated transmission applications. Its function
can be described using the block diagram of Figure 1-1. The input stage meets two
main functions. First it provides a suitable bias voltage for the PIN diode. Secondly the
pulsed photo-current signals are transformed into a voltage by a special circuit which
is optimized for low noise applications. After amplification by a Controlled Gain Ampli-
fier (CGA) the signals have to pass a tuned integrated narrow bandpass filter with a
center frequency f0 which is equivalent to the choosen carrier frequency of the input
signal The demodulator is used first to convert the input burst signal to a digital enve-
lope output pulse and to evaluate the signal information quality, i.e., unwanted pulses
will be suppressed at the output pin. All this is done by means of an integrated
dynamic feedback circuit which varies the gain as a function of the present enviro-
mental conditions (ambient light, modulated lamps etc.). Other special features are
used to adapt to the current application to secure best transmission quality. The
T2526 operates in a supply-voltage range from 2.7V to 5.5V. By default, the T2526 is
optimized for best performance within 2.7V to 3.3V.
Figure 1-1. Block Diagram
VS
IN
OUT
Demo-
dulator
Micro-
controller
CGA and
filter
Input
AGC/ATC
and digital control
Oscillator
Carrier frequency f0
T2526
Modulated IR signal
min 6 or 10 pulses
GND
Rev. 4597D–AUTO–08/05
2. Pin Configuration
Figure 2-1. Pinning TSSOP8
NC
NC
VS
NC
1
2
3
4
8
7
6
5
OUT
NC
GND
IN
3. Pin Description
Pin
Symbol
Function
1
VS
Supply voltage
Not connected
Data output
2
NC
3
OUT
NC
4
Not connected
Input PIN-diode
Ground
5
IN
6
GND
NC
7
Not connected
Not connected
8
NC
4. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameter
Symbol
VS
Value
–0.3 to +6
3
Unit
V
Supply voltage
Supply current
IS
mA
V
Input voltage
VIN
IIN
–0.3 to VS
0.75
Input DC current at VS = 5V
Output voltage
mA
V
VO
–0.3 to VS
10
Output current
IO
mA
°C
Operating temperature
Storage temperature
Power dissipation at Tamb = 25°C
Tamb
Tstg
Ptot
–25 to +85
–40 to +125
°C
mW
30
2
T2526
4597D–AUTO–08/05
T2526
5. Thermal Resistance
Parameters
Symbol
Value
Unit
Junction ambient TSSOP8
RthJA
TBD
K/W
6. Electrical Characteristics, 3-V Operation
Tamb = 25°C, VS = 3V unless otherwise specified.
No. Parameters
Supply
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
1
1.1 Supply-voltage range
1.2 Supply current
1
1
VS
IS
2.7
0.7
3.0
0.9
3.3
1.3
V
C
B
IIN =0
mA
2
Output
Tamb = 25°C
See Figure 8-10 on page 9
2.1 Internal pull-up resistor(1)
1, 3
RPU
30/40
kΩ
A
R2 = 2.4 kΩ
See Figure 8-10 on page 9
2.2 Output voltage low
3, 6
3, 1
3, 6
VOL
VOH
IOCL
250
Vs
mV
V
B
B
B
2.3 Output voltage high
2.4 Output current clamping
VS – 0.25
R2 = 0
See Figure 8-10 on page 9
8
mA
3
Input
VIN = 0
See Figure 8-10 on page 9
3.1 Input DC current
5
5
IIN_DCMAX
IIN_DCMAX
–150
µA
µA
C
B
Input DC current
3.2
VIN = 0; Vs = 3V
See Figure 8-3 on page 6 Tamb = 25°C
–350
–700
Minimum detection
3.3 threshold current
Test signal:
See Figure 8-9 on page 9
See Figure 8-1 on page 6 VS = 3V
Tamb= 25°C, IIN_DC=1 µA
3
3
IEemin
pA
pA
B
C
Minimum detection
threshold current with AC
3.4 current disturbance
IIN_AC100 =
square pp
burst N = 16
f = f0; tPER = 10 ms
Figure 8-8 on page 8
BER = 50(2)
IEemin
–1500
3 µA at 100 Hz
Test signal:
See Figure 8-9 on page 9
VS = 3V, Tamb = 25°C
IIN_DC = 1 µA
square pp
burst N = 16
Maximum detection
3.5 threshold current with
VIN > 0V
3
IEemax
–200
µA
D
f = f0; tPER = 10 ms
Figure 8-8 on page 8
BER = 5%(2)
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. Depending on version, see “Ordering Information”
2. BER = bit error rate; e.g., BER = 5% means that with P = 20 at the input pin 19...21 pulses can appear at the pin OUT
3. After transformation of input current into voltage
3
4597D–AUTO–08/05
6. Electrical Characteristics, 3-V Operation (Continued)
Tamb = 25°C, VS = 3V unless otherwise specified.
No. Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
4
Controlled Amplifier and Filter
Maximum value of
variable gain (CGA)
4.1
GVARMAX
GVARMIN
GMAX
f03V_FUSE
f03V
51
-5
71
f0
dB
dB
dB
%
D
D
D
A
C
C
C
Minimum value of variable
gain (CGA)
4.2
4.3
4.4
4.5
4.6
Total internal
amplification(3)
Center frequency fusing
accuracy of bandpass
VS = 3V, Tamb = 25°C
–2.5
–5.5
–4.5
+2.5
+3.5
+3.0
Overall accuracy center
frequencyofbandpass
f0
%
Overall accuracy center
frequencyofbandpass
Tamb = 0 to 70°C
f03V
f0
%
–3 dB; f0 = 38 kHz;
See Figure 8-7 on page 8
4.7 BPF bandwidth
B
3.8
kHz
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. Depending on version, see “Ordering Information”
2. BER = bit error rate; e.g., BER = 5% means that with P = 20 at the input pin 19...21 pulses can appear at the pin OUT
3. After transformation of input current into voltage
7. Electrical Characteristics, 5-V Operation
Tamb = 25°C, VS = 5V unless otherwise specified.
No. Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
5
Supply
5.1
5.2
6
Supply-voltage range
Supply current
Output
1
1
VS
IS
4.5
0.9
5.0
1.2
5.5
1.6
V
C
B
IIN =0
mA
Tamb = 25°C
6.1
Internal pull-up resistor(1) See Figure 8-10 on page
9
1, 3
RPU
30/40
kΩ
A
R2 = 2.4 kΩ
6.2
6.3
6.4
Output voltage low
Output voltage high
See Figure 8-10 on page
9
3, 6
3, 1
3, 6
VOL
VOH
IOCL
250
Vs
mV
V
B
B
B
VS – 0.25
R2 = 0
Output current clamping See Figure 8-10 on page
9
8
mA
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. Depending on version, see “Ordering Information”
2. BER = bit error rate; e.g., BER = 5% means that with P = 20 at the input pin 19...21 pulses can appear at the pin OUT
3. After transformation of input current into voltage
4
T2526
4597D–AUTO–08/05
T2526
7. Electrical Characteristics, 5-V Operation (Continued)
Tamb = 25°C, VS = 5V unless otherwise specified.
No. Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
7
Input
VIN = 0
7.1
Input DC current
Input DC-current
See Figure 8-10 on page
9
5
5
3
IIN_DCMAX
IIN_DCMAX
IEemin
–400
µA
µA
pA
C
B
B
VIN = 0; Vs = 5V
7.2
7.3
–700
–890
See Figure 8-4 on page 7 Tamb = 25°C
Min. detection threshold Test signal:
current
See Figure 8-9 on page 9
See Figure 8-2 on page 6 VS = 5V
Tamb = 25°C
IN_DC = 1 µA
square pp
I
Min. detection threshold
current with AC current
disturbance IIN_AC100 =
3 µA at 100 Hz
burst N = 16
7.4
7.5
3
3
IEemin
–2500
pA
µA
C
D
f = f0; tPER = 10 ms
Figure 8-8 on page 8
BER = 50(2)
Test signal:
See Figure 8-9 on page 9
VS = 5V, Tamb = 25×C
IIN_DC = 1 µA
square pp
burst N = 16
Max. detection threshold
current with VIN > 0V
IEemax
–500
f = f0; tPER = 10 ms
Figure 8-8 on page 8
BER = 5%(2)
8
Controlled Amplifier and Filter
Maximum value of
variable gain (CGA)
8.1
GVARMAX
GVARMIN
GMAX
51
–5
71
dB
dB
dB
D
D
D
Minimum value of variable
gain (CGA)
8.2
8.3
Total internal
amplification(3)
Resulting center
frequency fusing
accuracy
f0 fused at VS = 3V
VS = 5V, Tamb = 25°C
f03V-FUSE
+ 0.5
8.4
f05V
%
A
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. Depending on version, see “Ordering Information”
2. BER = bit error rate; e.g., BER = 5% means that with P = 20 at the input pin 19...21 pulses can appear at the pin OUT
3. After transformation of input current into voltage
7.1
7.2
ESD
All pins 2000V HBM; 200V MM, MIL-STD-883C, Method 3015.7
Reliability
Electrical qualification (1000h) in molded plastic package
5
4597D–AUTO–08/05
8. Typical Electrical Curves at Tamb = 25°C
Figure 8-1. IEemin versus IIN_DC, VS = 3V
100.0
VS = 3 V
f = f0
10.0
1.0
0.1
0.1
1.0
10.0
I IN_DC (µA)
100.0
1000.0
1000.0
1000.0
Figure 8-2.
I
Eemin versus IIN_DC, VS = 5V
100.0
VS = 5 V
f = f0
10.0
1.0
0.1
0.1
1.0
10.0
I IN_DC (µA)
100.0
Figure 8-3.
V
IN versus IIN_DC, VS = 3V
3.5
VS = 3 V
f = f0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.0
0.1
1.0
I
10.0
(µA)
100.0
IN_DC
6
T2526
4597D–AUTO–08/05
T2526
Figure 8-4. VIN versus IIN_DC, VS = 5V
3.5
3.0
2.5
2.0
VS = 5 V
f = f0
1.5
1.0
0.5
0.0
0.0
0.1
1.0
10.0
(µA)
100.0
1000.0
I
IN_DC
Figure 8-5. Data Transmission Rate, VS = 3V
5000
4500
4000
VS = 3 V
Short burst
3500
3000
2500
Standard type
Lamp type
2000
1500
1000
500
0
25.0
35.0
45.0
55.0
65.0
75.0
85.0
f 0 (kHz)
Figure 8-6. Data Transmission Rate, VS = 5V
5000
4500
4000
VS = 5 V
Short burst
3500
3000
2500
Standard type
Lamp type
2000
1500
1000
500
0
25.0
35.0
45.0
55.0
65.0
75.0
85.0
f 0 (kHz)
7
4597D–AUTO–08/05
Figure 8-7. Typical Bandpass Curve
1.10
VS = 3 V
1.00
0.90
0.80
Bandwidth (-3 dB)
0.70
0.60
0.50
0.40
0.92
0.94
0.96
0.98
1.00
1.02
1.04
1.06
1.08
f/f0
Q = f/f0/B; B => –3 dB values.
Example: Q = 1/(1.047 – 0.954) = 11
Figure 8-8. Illustration of Used Terms
Example: f = 30 kHz, burst with 16 pulses, 16 periods
Period (P = 16)
7
1066 µs
16
Burst (N = 16 pulses)
533 µs
7
IN
1
7
tDON
tDOFF
33 µs
OUT
533 µs
Envelope 16
Envelope 1
17056 µs/data word
Telegram pause
OUT
Data word
Data word
17 ms
T
= 62 ms
REF
8
T2526
4597D–AUTO–08/05
T2526
Figure 8-9. Test Circuit
IEe = ∆U1/400k
VDD = 3 V to 5 V
∆U1
IEe
IIN_DC
1 nF
400k
R1 = 220
VS
20k
IIN
IIN_AC100
VPulse
IN
OUT
1 nF
T2526
∆U2
GND
IIN_DC = ∆U2/40k
C1
20k
-
f0
4.7 µF
16
DC
+
tPER = 10 ms
Figure 8-10. Application Circuit
V
DD = 3 V to 5 V
*) optional
R1 = 220
R2* > 2,4k
RPU
IS
VS
IOCL
Microcontroller
IN
T2526
IIN
OUT
GND
VIN
VO
C1
4.7 µF
C2* = 470 pF
IEe
IIN_DC
9
4597D–AUTO–08/05
9. Chip Dimensions
Figure 9-1. Chip Size in µm
1210, 1040
GND
336, 906
IN
783, 887
Scribe
VS
55, 652
T2526
55, 62
FUSING
OUT
0, 0
Width
Pad coordinates are given for lower left corner of the pad in µm from the origin 0,0
Note:
Dimensions
Length inclusive scribe
Width inclusive scribe
Thickness
1.15 mm
1.29 mm
290 µ ± 5%
90 µ × 90 µ
70 µ × 70 µ
AlCu/AlSiTi(1)
0.8 µm
Pads
Fusing pads
Material
Pad metallurgy
Finish
Thickness
Material
Si3N4/SiO2
0.7/0.3 µm
Thickness
Note:
1. Value depends on manufacture location.
10
T2526
4597D–AUTO–08/05
T2526
10. Ordering Information
Delivery: unsawn wafers (DDW) in box and TSSOP8 (3 mm body)
Extended Type
PL(2)
RPU
30
30
40
40
30
30
D(4)
Type
(3)
Number
T2526N0xx(1)-yyy(5)
T2526N1xx(1)-DDW
T2526N2xx(1)-yyy(5)
T2526N3xx(1)-DDW
T2526N6xx(1)-yyy(5)
T2526N7xx(1)-DDW
2
1
2
1
2
1
2179
2179
1404
1404
3415
3415
Standard type: ≥ 10 pulses, enhanced sensibility, high data rate
Lamp type: ≥ 10 pulses, enhanced suppression of disturbances, secure
data transmission
Short burst type: ≥ 6 pulses, enhanced data rate
Notes: 1. xx means the used carrier frequency value f0 30, 33, 36, 38, 40, 44 or 56 kHz (76 kHz type on request)
2. Two pad layout versions (see Figure 10-1 and Figure 10-2) available for different assembly demand
3. Integrated pull-up resistor at pin OUT (see electrical characteristics)
4. Typical data transmission rate up to bit/s with f0 = 56 kHz, VS = 5 V (see Figure 8-8 on page 8)
5. yyy means kind of packaging:
DDW -> unsawn wafers in box
6AQY -> (only on request, TSSOP8 taped and reeled, PB-free)
10.1 Pad Layout
Figure 10-1. Pad Layout 1 (DDW only)
GND
IN
OUT
T2526
FUSING
VS
Figure 10-2. Pad Layout 2 (DDW or TSSOP8)
GND
(6)
IN
(5)
(1)
VS
T2526
(3)
OUT
FUSING
11
4597D–AUTO–08/05
11. Revision History
Please note that the following page numbers referred to in this section refer to the specific revision
mentioned, not to this document.
Revision No.
History
• Put datasheet in a new template
• First page: Pb-free logo added
4597D-AUTO-08/05
• Page 11: Ordering Information changed
• Page 2, 3, 5, 11, 13: SO8 deleted
12
T2526
4597D–AUTO–08/05
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4597D–AUTO–08/05
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