AMMP-5620_13 [AVAGO]

6 – 20 GHz High Gain Amplifier in SMT Package; 6 ???? 20 GHz高增益放大器采用SMT封装
AMMP-5620_13
型号: AMMP-5620_13
厂家: AVAGO TECHNOLOGIES LIMITED    AVAGO TECHNOLOGIES LIMITED
描述:

6 – 20 GHz High Gain Amplifier in SMT Package
6 ???? 20 GHz高增益放大器采用SMT封装

放大器
文件: 总7页 (文件大小:201K)
中文:  中文翻译
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AMMP-5620  
6 – 20 GHz High Gain Amplifier in SMT Package  
Data Sheet  
Description  
Features  
The AMMP-5620 MMIC is a GaAs wide-band amplifier in Surface Mount Package, 5.0 x 5.0 x 1.25 mm  
a surface mount package designed for medium output  
Wide Frequency Range 6-20 GHz  
High Gain: 17.5 dB Typical  
Medium Output P1dB: 14.8 dBm Typical  
Input and Output Return Loss: <-10 dB Typical  
50 Ohm Input and Output Match  
power and high gain over the 6-20 GHz frequency range.  
The 3 cascaded stages provide high gain while the single  
bias supply offers ease of use. It is fabricated using a  
PHEMT integrated circuit process. The RF input and  
output ports have matching circuitry for use in 50-ohms  
environments. The MMIC is a cost effective alternative  
to hybrid (discrete FET) amplifiers that require complex  
tuning and assembly processes.  
Single Supply Bias: 5V @ 95 mA Typical  
Applications  
Package Diagram  
Generalpurpose,widebandamplifierincommunication  
systems or microwave instrumentation  
NC  
1
Vd  
2
NC  
3
High Gain Amplifier  
Pin  
1
2
Function  
NC  
Functional Block Diagram  
Vd  
3
4
5
NC  
RF_out  
NC  
Vd  
0.1uF  
RFin  
8
4
RFout  
6
7
NC  
NC  
1
2
3
8
RF_in  
7
6
5
100pF  
NC  
NC  
NC  
RFin  
RFout  
7
6
5
AMMP-5620  
Note: Package base: GND  
Attention: Observe precautions for  
handling electrostatic sensitive devices.  
ESD Machine Model (40V)  
ESD Human Body Model (150V)  
Refer to Avago Application Note A004R:  
Electrostatic Discharge, Damage and Control.  
Note: MSL Rating = Level 2A  
Electrical Specifications  
1. Small/large signal data measured in a fully de-embedded test fixture at TA = 25 degree Celsius.  
2. Specifications are derived from measurements in a 50 Ohm test environment. Aspects of the amplifier performance  
may be improved over a narrower bandwidth by application of additional conjugate, linearity, or low noise matching.  
3. All tested parameters guaranteed with measurement accuracy 0.5 dB for NF and 1.0 dB for gain.  
Table 1. RF Electrical Characteristics (T =25°C, Freq=18GHz, Vd=5.0V, Idq=95mA)  
A
Parameter  
Min  
Typ.  
17.5  
5.1  
Max  
19.5  
7.0  
Unit  
dB  
Small-signal Gain, Gain  
15.5  
Noise Figure, NF  
dB  
Output Power at 1dB Gain Compression, P1dB  
Third Order Intercept Point, OIP3  
Input Return Loss, RLin  
14.8  
22.5  
11.5  
11.6  
-43.0  
dBm  
dBm  
dB  
Output Return Loss, RLout  
Reverse Isolation, Isolation  
dB  
dB  
Table 2. Recommended Operating Range  
Description  
Min.  
Typical  
Max.  
Unit  
V
Drain Supply Voltage, Vd  
Drain Supply Current, Id  
Notes:  
5
70  
95  
130  
mA  
1. Ambient operation temperature TA = 25°C unless otherwise noted.  
2. Channel-to-board Thermal Resistance is measured using Infrared Microscopy method.  
Table 3. Thermal Properties  
Parameter  
Test Conditions  
Value  
Thermal Resistance, θjc  
θjc = 28 °C/W  
Note: Channel-to-board Thermal Resistance is measured using Infrared Microscopy method.  
Absolute Minimum and Maximum Ratings  
Table 4. Minimum and Maximum Ratings  
Description  
Min.  
Max.  
7.5  
Unit  
V
Comments  
Drain Supply Voltage, Vd  
Total Drain Current, Id  
RF Input Power, Pin  
135  
20  
mA  
dBm  
W
CW  
Power Dissipation, Pd  
Channel Temperature, Tch  
Storage Temperature, Tstg  
Maximum Assembly Temperature, Tmax  
Notes:  
1.0  
+150  
+150  
+260  
°C  
-65  
°C  
°C  
1. Operation in excess of any one of these conditions may result in permanent damage to this device. The absolute maximum ratings for Vd, Id, Pd  
and Pin were determined at an ambient temperature of 25°C unless noted otherwise.  
2
Selected performance plots  
All data measured on at Vd = 5V, Id = 95mA, Ta = 25°C, and 50 Ω at all ports.  
20  
16  
12  
8
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
0
-10  
-20  
-30  
-40  
4
0
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
Frequency (GHz)  
Frequency (GHz)  
Frequency (GHz)  
Figure 3. Input Return Loss  
Figure 1. Gain  
Figure 2. Isolation  
8
7
6
5
4
3
2
1
0
0
-5  
20  
16  
12  
8
-10  
-15  
-20  
-25  
-30  
-35  
4
0
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
Frequency (GHz)  
Frequency (GHz)  
Frequency (GHz)  
Figure 4. Output Return Loss  
Figure 5. Noise Figure  
Figure 6. P1dB  
20  
120  
115  
110  
105  
100  
95  
18 GHz  
15  
13 GHz  
7 GHz  
10  
5
0
-5  
-10  
90  
-20 -15 -10  
-5  
0
5
10  
Pin (dBm)  
Figure 7. Pout and Id vs. Pin  
Note: These measurements are obtained using demo board with 50 Ohm traces at input and output. Aspects of the amplifier performance may be  
improved over a narrower bandwidth by application of additional conjugate, linearity or low noise matching.  
3
Over Voltage plots  
All data measured on at Vd = 5V, Id = 95mA, Ta = 25°C, and 50 Ω at all ports.  
20  
0
-10  
-20  
-30  
-40  
0
-10  
Vd=4V  
Vd=5V  
Vd=6V  
16  
12  
8
-20  
-30  
-40  
-50  
-60  
-70  
Vd=4V  
Vd=5V  
Vd=6V  
Vd=4V  
Vd=5V  
Vd=6V  
4
0
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
Frequency (GHz)  
Frequency (GHz)  
Frequency (GHz)  
Figure 8. Gain and Voltage  
Figure 9. Isolation and Voltage  
Figure 10. Input Return Loss and Voltage  
8
7
6
5
4
3
2
1
0
0
-5  
20  
16  
12  
8
-10  
-15  
-20  
-25  
-30  
-35  
Vd=4V  
Vd=5V  
Vd=6V  
Vd=4V  
Vd=5V  
Vd=6V  
Vd=4V  
Vd=5V  
Vd=6V  
4
0
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
Frequency (GHz)  
Frequency (GHz)  
Frequency (GHz)  
Figure 11. Output Return Loss and Voltage  
Figure 12. Noise Figure and Voltage  
Figure 13. P1dB and Voltage  
Note: These measurements are obtained using demo board with 50 Ohm traces at input and output. Aspects of the amplifier performance may be  
improved over a narrower bandwidth by application of additional conjugate, linearity or low noise matching.  
4
Over Temperature Performance Plots  
All data measured on at Vd = 5V, Id = 95mA, Ta = 25°C, and 50 Ω at all ports  
0
-10  
-20  
-30  
-40  
20  
16  
12  
8
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-40 °C  
25 °C  
85 °C  
-40 °C  
25 °C  
85 °C  
-40 °C  
25 °C  
85 °C  
4
0
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
Frequency (GHz)  
Frequency (GHz)  
Frequency (GHz)  
Figure 14. Gain and Temperature  
Figure 15. Isolation and Temperature  
Figure 16. Input Return Loss and Temperature  
0
-5  
8
7
6
5
4
3
2
1
0
20  
16  
12  
-10  
-15  
-20  
-25  
-30  
-35  
8
-40 °C  
25 °C  
85 °C  
-40 °C  
25 °C  
85 °C  
-40 °C  
25 °C  
85 °C  
4
0
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
4
7
10  
13  
16  
19  
22  
Frequency (GHz)  
Frequency (GHz)  
Frequency (GHz)  
Figure 19. P1dB and Temperature  
Figure 17. Output Return Loss and Temperature  
Figure 18. Noise Figure and Temperature  
100  
95  
90  
-40 °C  
25 °C  
85  
85 °C  
80  
3
3.5  
4
4.5  
5
5.5  
6
Vd (V)  
Figure 20. Id vs. Vd  
Note: These measurements are obtained using demo board with 50 Ohm traces at input and output. Aspects of the amplifier performance may be  
improved over a narrower bandwidth by application of additional conjugate, linearity or low noise matching.  
5
Biasing and Operation  
The AMMP-5620 only requires a single positive supply  
connected to the Vd pin (2). The recommended supply  
voltage is 5V. The supply should be bypassed with a  
0.1uF capacitor placed as close to the component as  
possible. The package base is the RF and DC ground con-  
nection. The biasing arrangement is shown in Figure 21.  
The AMMP Packaged Devices are compatible with high  
volume surface mount PCB assembly processes.  
The PCB material and mounting pattern, as defined in  
the data sheet, optimizes RF performance and is strongly  
recommended. An electronic drawing of the land pattern  
is available upon request from Avago Sales & Application  
Engineering.  
Figure 22 shows a simplifies schematic for the amplifier  
die. All three stages are self-biased as shown. Each stage  
has feedback around it to control the gain, match and  
performance, resulting in excellent wideband perfor-  
mance. Also shown are the on-chip DC blocking capaci-  
tors for both the RFin and RFout pins.  
Please refer to the Absolute Maximum Ratings table for  
allowed DC and thermal conditions.  
Figure 23. Demonstration Board (available upon request)  
Figure 21. Typical Application  
Figure 22. Simplified MMIC Schematics  
6
Typical Scattering Parameters  
Please refer to <http://www.avagotech.com> for typical scattering parameters data.  
Package Dimension, PCB Layout and Tape and Reel information  
Please refer to Avago Technologies Application Note 5520, AMxP-xxxx production Assembly Process (Land Pattern A).  
Part Number Ordering Information  
Devices per  
Part Number  
Container  
Container  
Antistatic Bag  
7Reel  
AMMP-5620-BLKG  
AMMP-5620-TR1G  
AMMP-5620-TR2G  
10  
100  
500  
7Reel  
For product information and a complete list of distributors, please go to our web site: www.avagotech.com  
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.  
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. Obsoletes AV01-0585EN  
AV02-0513EN - July 16, 2013  

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