SFX-102G [CONNOR-WINFIELD]

Synchronous Clock Generators;
SFX-102G
型号: SFX-102G
厂家: CONNOR-WINFIELD CORPORATION    CONNOR-WINFIELD CORPORATION
描述:

Synchronous Clock Generators

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SFX-102G  
Synchronous Clock  
Generators  
PLL  
2111 Comprehensive Drive  
Aurora, Illinois 60505  
Phone: 630-851-4722  
Fax: 630-851-5040  
www.conwin.com  
Applications  
SONET / SDH / ATM  
DWDM / FDM  
DSL-PON Interconnects  
FEC (Forward Error Correction)  
Features  
3.3V High Precision PLL  
Accepts 1 of 4 Selectable, Pre-determined Input Frequencies  
77.76 MHz to 170 MHz Output Frequencies Available.  
Jitter Generation OC-192 Compliant  
1.0” x 0.80” x 0.285”, Surface Mount  
ROHS compliant  
Bulletin  
SG166  
1 of 8  
Page  
Revision  
00  
Date  
12 FEB 09  
Issued By  
ENG  
General Description  
The SFX-102G provides high precision phase lock loop frequency  
translation for the telecommunication applications. The SFX-102G  
product generates LVPECL outputs from an intrinsically low jitter,  
voltage controlled crystal oscillator.  
SFX-102G is well suited for use in line cards, service termination  
cards and similar functions to provide reliable reference, phase  
locked, synchronization for TDM, PDH, SONET and SDH network  
equipment. The SFX-102G provides a jitter filtered, wander  
following output signal sychronized to a superior Stratum or peer  
input reference signal.  
LVPECL outputs may be put into the tri-state high impedance  
condition for external testing purposes by asserting a high signal  
to the Enable/Disable pin.  
The SFX-102G locks to any one of four pred-determined input  
frequencies selected using the SELECT (A&B) lines (See Table  
4). The output may be any single frequency from 77.76 MHz to  
170 MHZ.  
The SFX-102G is a 3.3 Volt component that will typically draw  
75mA. The SFX-102G is designed to be used in applications  
that require temperature rating of -40°C - 85° C. The SFX-102G  
package typical dimensions are 1.0” x 0.80” x 0.285” (See fig. 2 for  
maximum dimensions).  
The SFX-102G includes a lock detect alarm output. The PLL  
control voltage is brought out through a 470 krestistor and can  
be used to determine when the pull range limits are reached.The  
This product is ROHS compliant.  
Functional Block Diagram  
Figure 1  
VCXO  
Monitor  
Enable/Disable  
Lock  
Detector  
Q
Frequency  
Divider  
PECL  
VCXO  
Input  
Frequency  
Filter  
QN  
Frequency  
Divider  
Select A  
Select B  
Absolute Maximum Rating  
Table 1  
Symbol  
Vccꢀ  
VIꢀ  
Parameter  
PowerꢀSupplyꢀVoltageꢀ  
InputꢀVoltageꢀ  
Minimum  
-0.3ꢀ  
Nominal  
Maximum  
5.5ꢀ  
Units  
Volts  
Volts  
°C  
Notes  
-0.3ꢀ  
-55ꢀ  
Vccꢀ  
125ꢀ  
Tsꢀ  
StorageꢀTemperatureꢀ  
Data Sheet #: SG166 Page 2 of 8  
Rev: 00  
Date: 02/12/09  
© Copyright 2009 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice  
                                          
ꢀꢀ4ꢀ  
ꢀꢀ5ꢀ  
ꢀꢀ6ꢀ  
ꢀꢀ7ꢀ  
VCXOꢀMonitorꢀꢀ  
----ꢀ  
NCꢀ  
GNDꢀ  
                                          
ControlꢀvoltageꢀlevelꢀforꢀtheꢀPECLꢀoscillatorꢀ(Betweenꢀ0.3Vꢀandꢀ3.0Vꢀwhenꢀlocked)  
Missing  
Noꢀconnection  
Ground  
                                          
                                          
VCC  
                                          
Powerꢀsupplyꢀvoltageꢀ(3.3ꢀVdcꢀ ꢀ5%)  
                                          
Logicꢀ“1”ꢀindicatesꢀthatꢀtheꢀunitꢀisꢀlockedꢀtoꢀtheꢀinputꢀreference  
Logicꢀ“0”ꢀindicatesꢀthatꢀtheꢀreferenceꢀisꢀlostꢀorꢀoutꢀofꢀlockꢀrange  
Specifications  
Table 2  
Symbol  
Parameter  
Minimum  
Nominal  
Maximum  
Units  
Notes  
fINꢀ  
AvailableꢀInputꢀFrequenciesꢀꢀCMOS  
8ꢀkꢀ  
1ꢀMꢀ  
100ꢀMꢀ  
100ꢀMꢀ  
Hz  
Hz  
PECL  
fOUTꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ  
Vccꢀ  
OutputꢀFrequencies(LVPECL)ꢀ  
SupplyꢀVoltageꢀ  
SupplyꢀCurrentꢀ  
InputꢀLogicꢀꢀꢀꢀꢀꢀꢀꢀAꢀ=ꢀCMOSꢀ  
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀD =ꢀPECLꢀ  
77.76ꢀMꢀ  
3.135ꢀ  
170ꢀMꢀ  
3.465ꢀ  
100ꢀ  
Hz  
Volts  
mA  
3.3ꢀ  
75ꢀ  
CMOSꢀ  
PECL  
ICC  
CLKINꢀ  
1ꢀ  
CLKOUTꢀ  
VOHꢀ  
VOLꢀ  
TR/TFꢀ  
SYMꢀ  
BWꢀ  
OutputꢀLogicꢀꢀꢀꢀꢀFꢀ=ꢀComp.ꢀPECLꢀ  
PECLꢀ  
2.275ꢀ  
V
V
ns  
%
Hz  
ps  
1.68ꢀ  
1ꢀ  
55ꢀ  
Rise/FallꢀTimeꢀ  
OutputꢀSymmetryꢀ  
Bandwidthꢀ  
JitterꢀGenerationꢀRMSꢀ  
(12ꢀkHzꢀ-ꢀ20ꢀMHz)  
JitterꢀTransferꢀ  
0.5ꢀ  
20ꢀ  
0.5ꢀ  
45ꢀ  
JGEN  
1ꢀ  
JTRANꢀ  
APRꢀ  
0.1ꢀ  
dBꢀ  
ppm  
2
InputꢀFrequencyꢀTrackingꢀ  
50ꢀ  
TOP  
OperatingꢀTemperatureꢀꢀꢀꢀꢀꢀꢀꢀFꢀ=ꢀ  
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀCꢀ=ꢀ  
-40ꢀ  
0ꢀ  
85ꢀ  
70ꢀ  
°Cꢀ  
°C  
NOTES:ꢀ 1.0:ꢀ  
OnlyꢀHCMOSꢀandꢀLVHCMOSꢀisꢀsupportedꢀforꢀinputꢀfrequenciesꢀ<ꢀ1MHz  
GR-253-CORE,ꢀSec.ꢀ5.6.2.1.2  
2.0:ꢀ  
Pin Description  
Table 3  
Pin #  
Connection  
Description  
ꢀꢀ1ꢀ  
CLKINꢀ  
InputꢀFrequencyꢀ-ꢀTheꢀSFX-102GꢀACꢀcouplesꢀtheꢀinputꢀ,ꢀthisꢀmeansꢀthatꢀtheꢀunitꢀisꢀꢀ  
capableꢀofꢀhandlingꢀHCMOS,ꢀLVCMOS,ꢀPECL,ꢀLVPECLꢀinputꢀsignals.  
ꢀꢀ2ꢀ  
ꢀꢀ3ꢀ  
GNDꢀ  
LockꢀDetectorꢀ  
Ground  
ꢀꢀ8ꢀ  
Enable/Disableꢀ  
Logicꢀ“0”ꢀ(orꢀnoꢀconnect)ꢀ=ꢀOutputꢀEnabledꢀ  
Logicꢀ“1”ꢀ=ꢀOutputꢀDisabledꢀ(Tri-Stated)  
ꢀ  
ꢀꢀ9ꢀ  
10ꢀ  
11ꢀ  
12ꢀ  
13ꢀ  
14ꢀ  
15ꢀ  
16ꢀꢀ  
Outꢀ  
COutꢀ  
NCꢀ  
SelectꢀAꢀ  
SelectꢀBꢀ  
NCꢀ  
Output  
ComplementaryꢀOutput  
Noꢀconnection  
InputꢀFrequencyꢀSelectꢀControlꢀPin.ꢀSeeꢀTableꢀ4.  
InputꢀFrequencyꢀSelectꢀControlꢀPin.ꢀSeeꢀTableꢀ4.  
Noꢀconnection  
GNDꢀ  
Ground  
Data Sheet #: SG166 Page of 8  
Rev: 00  
Date: 02/12/09  
© Copyright 2007 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice  
Input Frequency Selection  
Table 4  
Input Freq  
SEL A  
SEL B  
f1  
f2  
f3  
f4  
0
0
1
1
0
1
0
1
Output Load and Power Supply Filtering Recommendations  
Figure 2  
*
It is highly recommended  
*
*
*
that either a linear regulator  
or bypass capacitors be  
used. Typical values would  
be 10 uF, 0.1 uF, 100 pF.  
VCXO  
Monitor  
VCC -2 VDC  
Enable/Disable  
Lock  
Detector  
50  
50Ω  
Q
Frequency  
Divider  
PECL  
VCXO  
Input  
Frequency  
Filter  
(FOUT  
)
QN  
Frequency  
Divider  
Select A  
Select B  
Data Sheet #: SG166 Page of 8  
Rev: 00  
Date: 02/12/09  
© Copyright 2009 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice  
Ordering Information  
Table 5  
10 MHz  
10 kHz  
8 kHz  
16 kHz  
A
B
C
D
E
F
G
H
J
8.192 MHz  
13.00 MHz  
16.384 MHz  
19.44 MHz  
20.48 MHz  
26.00 MHz  
27.00 MHz  
38.88 MHz  
44.736 MHz  
53.10468 MHz  
L
51.84 MHz  
61.44 MHz  
77.76 MHz  
82.944 MHz  
112.00 MHz  
139.264 MHz  
155.52 MHz  
166.6286 MHz  
114.0 MHz  
125.0 MHz  
0
1
2
3
4
5
6
7
8
9
M
N
P
R
T
W
X
Y
Z
64 kHz  
1.024 MHz  
1.048 MHz  
1.544 MHz  
2.048 MHz  
4.096 MHz  
K
For any model, the reference inputs and output frequency must have a common frequency of 2.667Hz (8kHz/3)  
Ex 1: A Model with reference inputs of 8kHz, 16kHz, 32kHz and 64kHz with a Output frequency of 155.52MHz is valid due to the  
common frequency of 2.667kHz. Contact CW regarding models that do not have a input/output common frequency of 2.667kHz.  
SCG102AG- D F F - A 1 P 6  
Output Frequency (2 to 9)  
Supply Voltage  
See chart above. If a custom  
D = 3.3 VDC 5ꢀ  
frequency is desired, enter S followed  
by the frequency. Contact a sales  
representative for the availabilty of  
custom frequencies.  
Output Type  
F = Comp. PECL  
Input Frequency (A to ꢀ)  
See chart above.  
If more than one frequency is desired,  
enter S and list all desired frequencies.  
Contact a sales representative for the  
availabilty of custom frequencies.  
Temperature Range  
C = 0°C to 70°C  
F = -40°C to 85°C  
Number of Input Frequencies  
1 = 1 Input Frequency  
2 = 2 Input Frequencies  
= 3 Input Frequencies  
= 4 Input Frequencies  
Sample Part Number Examples:  
SFX-102G- DFF-A1C2  
SFX-102G- DFF-A4S2, S = 8 kHz, 16.384 MHz, 19.44 MHz, 38.88 MHz  
SFX-102G-DFF-D1ZS, S = Custom Frequency  
Input Logic  
A = CMOS  
D = PECL  
Data Sheet #: SG166 Page of 8  
Rev: 00  
Date: 02/12/09  
© Copyright 2007 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice  
Package Dimensions  
Recommended Footprint Dimensions  
Figure 3  
Figure 4  
Solder Profile  
Figure 5  
Data Sheet #: SG166 Page 6 of 8  
Rev: 00  
Date: 02/12/09  
© Copyright 2009 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice  
Data Sheet #: SG166 Page of 8  
Rev: 00  
Date: 02/12/09  
© Copyright 2007 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice  
2111 Comprehensive Drive  
Aurora, Illinois 60505  
Phone: 630-851-4722  
Fax: 630-851-5040  
www.conwin.com  
Revision  
Revision Date Note  
00ꢀ  
02/12/09ꢀ  
Release  

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