CY25701LXC-ZZZT_技术文档

CY25701

Programmable High Frequency Crystal Oscillator with

Spread Spectrum (SSXO) and No Spread Spectrum (XO) Option

Programmable High Frequency Crystal Oscillator with Spread Spectrum (SSXO) and No Spread Spectrum (XO) Option

Features

Benefits

■ Crystal Oscillator with Spread Spectrum Clock (SSXO)

■ No Spread Spectrum (XO) Option

■ Provides a wide range of spread percentages for maximum

electromagnetic interference (EMI) reduction to meet

regulatory agency electromagnetic compliance (EMC)

requirements. Reduces development and manufacturing costs

and time-to-market.

■ Wide operating output clock frequency range of 10 to166 MHz

■ Programmable spread spectrum with nominal 31.5 kHz

modulation frequency

■ This versatile programming feature enables the user to switch

between SSXO (with Spread) and XO (without Spread)

functions with ease.

■ Center spread: ±0.25% to ±2.0%

■ Down spread: –0.5% to –4.0%

■ No spread: ±0.0%

■ Internal PLL to generate up to 166 MHz output.

■ Suitable for most PC, consumer, and networking applications

■ Application compatibility in standard and low power systems

■ Integrated phase-locked loop (PLL)

■ 85 ps typical cycle-to-cycle jitter with SSCLK = 133 MHz

■ 3.3 V operation

■ In house programming of samples and prototype quantities is

available using CY3672-USB programming kit and CY3724

socket adapters. Production quantities are available through

Cypress’s value added distribution partners or by using third

party programmers from BP Microsystems, and HiLo Systems,

and others.

■ Output enable function

■ Package available in 4-pin ceramic LCC SMD

■ Pb-free package

■ Industrial temperature from –40 °C to 85 °C

Logic Block Diagram

Cypress Semiconductor Corporation

Document Number: 001-07313 Rev. *F

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised September 26, 2011

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CY25701

Contents

Pin Configuration .............................................................3

Pin Definitions - CY25701 4-pin Ceramic SMD ..............3

Functional Description .....................................................3

Programming Description ...............................................3

Factory and Field Programmable CY25701 ................3

Output Frequency, SSCLK Output (SSCLK, pin 3) .....3

Spread Percentage (SSCLK, pin 3) ............................3

Frequency Modulation (SSCLK, pin 3) ........................3

Absolute Maximum Ratings ............................................4

Operating Conditions .......................................................4

DC Electrical Characteristics ..........................................5

AC Electrical Characteristics ..........................................5

Application Circuit ............................................................6

Switching Waveforms ......................................................6

Informational Graphs .......................................................7

Possible Configurations ...............................................8

Ordering Code Definitions ...........................................8

Package Drawings and Dimensions .............................10

Acronyms ........................................................................11

Document Conventions .................................................11

Units of Measure .......................................................11

Document History Page .................................................12

Sales, Solutions, and Legal Information ......................13

Worldwide Sales and Design Support .......................13

Products ....................................................................13

PSoC Solutions .........................................................13

Document Number: 001-07313 Rev. *F

Page 2 of 13

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CY25701

Pin Configuration

Figure 1. Pin Diagram - CY25701 4-pin Ceramic SMD

4

3

VDD

SSCLK

OE

1

VSS

2

Pin Definitions - CY25701 4-pin Ceramic SMD

1

Name

OE

Description

Output Enable pin: Active HIGH. If OE = 1, SSCLK is enabled

Power supply ground

2

VSS

3

SSCLK Spread spectrum clock output (with or without spread)

VDD 3.3 V power supply

4

Functional Description

Programming Description

The CY25701 is a Spread Spectrum Crystal Oscillator (SSXO)

IC used to reduce the EMI found in today’s high speed digital

electronic systems.

Factory and Field Programmable CY25701

Factory and field programming is available for samples and

manufacturing by Cypress and its distributors. Submit your

request to the local Cypress Field Application Engineer (FAE) or

sales representative. Once the request is processed, you receive

a new part number, samples, and data sheet with the

programmed values. This part number is used for additional

sample request and the production orders. Contact your local

Cypress FAE or sales representative for details.

The device uses a Cypress proprietary PLL and Spread

Spectrum Clock (SSC) technology to synthesize and modulate

the frequency of the embedded input crystal. By frequency

modulating the clock, the measured EMI at the fundamental and

harmonic frequencies are greatly reduced. This reduction in

radiated energy significantly reduces the cost of complying with

regulatory agency (EMC) requirements and improves

time-to-market without degrading system performance.

Additional information on the CY25701 is available at the

Cypress web site www.cypress.com.

The CY25701 uses a programmable configuration memory array

to synthesize output frequency and spread percentage.

Output Frequency, SSCLK Output (SSCLK, pin 3)

The spread percentage is programmed to center spread or down

spread with various spread percentages. The range for center

spread is from ±0.25% to ±2.00%. The range for down spread is

from –0.5% to –4.0%. Contact the factory for smaller or larger

spread percentage amounts if required. See Table 2 on page 4

for spread selection and no spread values.

The modulated frequency at the SSCLK output is produced by

synthesizing from the embedded crystal oscillator frequency

input. The range of synthesized clock is from 10 to 166 MHz.

Spread Percentage (SSCLK, pin 3)

The SSCLK spread is programmable to various spread

percentage values from ±0.25% to ±2.0% for center spread and

from –0.5% to –4.0% for down spread. See Table 2 on page 4

for available spread options. Enter ±0.0% (No spread) for XO

(crystal oscillator) without spread option.

The frequency modulated SSCLK output is programmable from

10 to 166 MHz.

The CY25701 is available in a 4-pin ceramic SMD package with

an operating temperature range of –40 °C to 85 °C.

Frequency Modulation (SSCLK, pin 3)

The default frequency modulation is programmed at 31.5 kHz for

all SSCLK frequencies from 10 to 166 MHz. Alternate frequency

modulations at 30.1 kHz or 32.9 kHz are selectable using

CyberClocks™ Online software. Contact the factory for other

alternate modulation frequencies if required.

Document Number: 001-07313 Rev. *F

Page 3 of 13

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CY25701

Table 1. Programming Data Requirement

Pin Function

Pin Name

Pin#

Output Frequency

Spread Percent Code ^[1]

Frequency Modulation

SSCLK

3

%

3

kHz

Units

MHz

Program Value

ENTER DATA

ENTER DATA 31.5

Table 2. Spread Percent Selection

Center Spread

Code

Percentage

Code

A

B

C

±0.75%

J

D

E

F

Z

±0.25%

G

±0.5%

H

±1.0%

K

±1.5%

L

±2.0%

M

±0.0%

Z

Down Spread

Percentage

–0.5%

–1.0%

–1.5%

–2.0%

–3.0%

–4.0%

±0.0%

Storage Temperature

Absolute Maximum Ratings

(Non-condensing) .................................... –55 °C to +100 °C

Junction Temperature ............................. –40 °C to +125 °C

Data Retention at T_J= 125 °C ..............................> 10 years

Package Power Dissipation ..................................... 350 mW

Supply Voltage (V_DD) ...................................–0.5 V to +7.0 V

DC Input Voltage ................................ –0.5 V to V_DD+ 0.5 V

Operating Conditions

Parameter

Description

Min

3.00

–20

–40

–

Typ

3.30

–

Max

3.60

70

Unit

V

Supply voltage

DD

T

Ambient temperature (commercial)

Ambient temperature (industrial)

Max. load capacitance at pin 3

°C

A

T

–

85

°C

A

C

–

15

pF

LOAD

SSCLK

MOD

PU

F

T

SSCLK output frequency, C

= 15 pF

10

–

166

33.0

500

MHz

kHz

ms

LOAD

Spread Spectrum Modulation Frequency

30.0

0.05

31.5

–

Power up time for VDD to reach minimum specified voltage (power ramp

must be monotonic)

Note

1. ±0.0% or Code “Z” for XO (No-Spread) option.

Document Number: 001-07313 Rev. *F

Page 4 of 13

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CY25701

DC Electrical Characteristics

Parameter

Description

Condition

Min

Typ

Max

Unit

I

Output high current (pin 3)

V

= V – 0.5 V,

10

12

–

mA

OH

DD

= 3.3 V (source)

Output low current (pin 3)

Input high voltage (pin 1)

Input low voltage (pin 1)

Input high current (pin 1)

Input low current (pin 1)

Output leakage current (pin 3)

Input capacitance (pin 1)

Supply current

V

= 0.5 V, V = 3.3 V (sink)

10

12

–

mA

V

OL

DD

V

I

CMOS levels, 70% of V

CMOS levels, 30% of V

V = V

0.7 × V

V

IH

DD

–

0.3 × V

10

V

IL

DD

–

A

pF

mA

IH

in

DD

SS

I

V = V

–

10

IL

OZ

in

Three-state output, OE = 0

Pin 1, or OE

–10

–

10

[2]

5

7

C

I

IN

V

C

=3.3 V, SSCLK=10to166MHz,

DD

–

50

VDD

= 0, OE = V

DD

LOAD

f/f

Initial accuracy at room temp.

Freq. stability over temp. range

T = 25 °C, 3.3 V

–25

–12

–5

–

25

12

5

ppm

A

T = –20 °C to 70 °C, 3.3 V

A

Freq. stability over voltage range 3.0 to 3.6 V

Aging

T = 25 °C, First year

A

AC Electrical Characteristics

Parameter ^[2]

Description

Output Duty Cycle

Condition

Min

45

–

Typ

50

–

Max

55

Unit

%

DC

SSCLK, Measured at V /2

DD

t

Output Rise Time

Output Fall Time

20%–80% of V_DD,C_L= 15 pF

2.7

200

ns

R

–

ns

F

[3]

–

85

ps

Cycle-to-Cycle Jitter SSCLK

(Pin 3)

SSCLK 133 MHz,

Measured at V_DD/2

T

CCJ1

–

215

–

400

ps

s

25 MHz  SSCLK <133 MHz,

Measured at V_DD/2

1% of

1/SSCK

SSCLK < 25 MHz,

Measured at V_DD/2

T

Output Disable Time (pin1 = OE) Time from falling edge on OE to

stopped outputs (Asynchronous)

150

350

ns

OE1

Output Enable Time (pin1 = OE) Time from rising edge on OE to

350

OE2

outputs at

a

valid frequency

(Asynchronous)

T

PLL Lock Time

Time for SSCLK to reach valid

frequency

–

10

ms

LOCK

Notes

2. Guaranteed by characterization, not fully tested.

3. For more information on Jitter Specifications, please see whitepaper - Datasheet Jitter Specifications for Cypress Timing Products available at

http://www.cypress.com/?rID=12791.

Document Number: 001-07313 Rev. *F

Page 5 of 13

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CY25701

Application Circuit

Figure 2. Application Circuit Diagram

0.1 µF

Power

3

4

SSCLK

VDD

CY25701

VSS

2

OE

1

VDD

Switching Waveforms

Figure 3. Duty Cycle Waveform

Duty Cycle Timing (DC = t1A/t1B)

t

1B

t

1A

SSCLK

Figure 4. Output Rise/Fall Time Waveform

V_DD

0 V

SSCLK

Tr

Tf

Output Rise time (Tr) = (0.6 × V_DD)/SR1 (or SR3)

Output Fall time (Tf) = (0.6 × V_DD)/SR2 (or SR4)

Refer to AC Electrical Characteristics table for SR (Slew Rate) values.

Figure 5. Output Enable/Disable Timing Waveforms

V_DD

V_IH

OUTPUT

T_OE2

ENABLE

V_IL

0 V

High Impedance

SSCLK

(Asynchronous)

T_OE1

Document Number: 001-07313 Rev. *F

Page 6 of 13

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CY25701

Informational Graphs^[4]

172.5

171.5

169.5

169

168.5

Spread Spectrum Profile: Fnom=166MHz,

Fmod=30kHz, Spread%= +/-1%

Spread Spectrum Profile: Fnom=166MHz,

Fmod=30kHz, Spread%= -4%

170.5

169.5

168

167.5

167

166.5

168.5

167.5

166.5

Fnominal

166

165.5

165

164.5

164

163.5

163

Fnominal

165.5

164.5

163.5

162.5

161.5

160.5

159.5

162.5

0

20

40

60

80

100 120 140

Time (us)

160 180 200

0

20

40

60

80

100

Time (us)

120

140 160 180

200

68.5

68

Spread Spectrum Profile: Fnom=66MHz,

Fmod=30kHz, Spread%= -4%

67.5

Spread Spectrum Profile: Fnom=66MHz,

Fmod=30kHz, Spread%= +/-1%

67

66.5

66

67.5

67

66.5

66

Fnominal

65.5

65

65.5

64.5

64

65

63.5

64.5

0

20

40

60

80

100

Time (us)

120

140 160

180

200

0

20

40

60 80

100 120 140 160 180 200

Time (us)

Note

4. The “Informational Graphs” are meant to convey typical performance levels. No performance specifications are implied or guaranteed. Refer to the tables on pages

three and four for device specifications.

Document Number: 001-07313 Rev. *F

Page 7 of 13

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CY25701

Ordering Information

Part Number

Package Description

Product Flow

Pb-free

CY25701FLXCT ^{[5, 6]}

CY25701FLXIT ^{[5, 6]}

Programmer

4-pin Ceramic LCC SMD -Tape and Reel

Commercial, 0 °C to 70 °C

Industrial, –40 °C to 85 °C

Programming Kit

CY3672-USB

Socket adapter board, for programming CY25701

CY3724 Socket Adapter

Possible Configurations

Some product offerings are factory programmed customer specific devices with customized part numbers.The Possible Configurations

table shows the available device types, but not complete part numbers. Contact your local Cypress FAE of Sales Representative for

more information.

Part Number

Package Description

Product Flow

Pb-Free

CY25701LXCzzzT ^{[6, 7]}

CY25701LXIzzzT ^{[6, 7]}

4-pin Ceramic LCC SMD -Tape and Reel

Commercial, 0 °C to 70 °C

Industrial, –40 °C to 85 °C

Ordering Code Definitions

CY 25701 F

L

X

- zzz

T

T = Tape and Reel; blank = Tube

Dash Code. For factory-programmed devices only

Temperature Range: X = C or I

C = Commercial; I = Industrial

X = Pb-free package

Package Type:

L = 4-pin Ceramic LCC

Field programmable device

Base part number

Company ID: CY = Cypress

Notes

5. “FLX” suffix is used for products programmed in the field by Cypress distributors.

6. Temp can be C (Commercial) or I (Industrial).

7. “ZZZ” denotes the assigned product dash number. This number is assigned by the factory after the output frequency and spread percent programming data is received

from the customer.For more details, contact your local Cypress FAE or Sales Representative.

Document Number: 001-07313 Rev. *F

Page 8 of 13

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CY25701

Figure 6. Actual Marking ^[8]

CY25701LX*

CY25701FLX*

F=Field

Programmable

Marketing Part Number (CY25701)

L = LCC

C Y

2

z

5

z

7

z

0 1 L

Y W W

C Y

2

*

5

7

0 1

F

X

*

X

Y W W

L

zzz = Programmable Dash Code YWW = Date Code (Year & WW)

Temp

Pin 1 mark

X = Pb free

YWW = Date Code (Year & WW)

Temp

Pin 1 mark

L = LCC X = Pb free

Note

8. Temp can be C (Commercial) or I (Industrial).

Document Number: 001-07313 Rev. *F

Page 9 of 13

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CY25701

Package Drawings and Dimensions

Figure 7. 4-pin Ceramic LCC (3.2 × 5.0 × 1.3 mm) LZ04A Package Outline, 001-02743

001-02743 *E

Document Number: 001-07313 Rev. *F

Page 10 of 13

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CY25701

Acronyms

Document Conventions

Units of Measure

Acronym

Description

CMOS

EMC

EMI

complementary metal oxide semiconductor

electromagnetic compliance

electromagnetic interference

field application engineer

leadless chip carrier

Symbol

°C

Unit of Measure

degree Celsius

kilohertz

kHz

MHz

µA

µF

mA

mm

ms

mW

ns

FAE

LCC

OE

megahertz

microampere

microfarad

milliampere

millimeter

millisecond

milliwatt

output enable

PLL

phase locked loop

SMD

SSC

SSXO

XO

surface mount device

spread spectrum clock

spread spectrum crystal oscillator

crystal oscillator

nanosecond

ohm



%

percent

pF

ppm

ps

picofarad

parts per million

picosecond

second

s

V

volt

Document Number: 001-07313 Rev. *F

Page 11 of 13

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CY25701

Document History Page

Document Title: CY25701, Programmable High Frequency Crystal Oscillator with Spread Spectrum (SSXO) and No Spread

Spectrum (XO) Option

Document Number: 001-07313

Orig. of

Change

Submission

Date

REV.

ECN

Description of Change

**

442944

487736

RGL

See ECN New data sheet

*A

*B

KKVTMP

See ECN Added Industrial temp

1414203 DPF / VED

See ECN Replaced the Package Drawing and Dimension figure on page seven and

various copy edits; the reference to the software is now CyberClocks (TM)

Online rather than CyberClocks software.

*C

*D

2542310

2624529

AESA

07/24/08

Updated template. Added Note “Not recommended for new designs.”

Added part number CY25701KFLXCT, CY25701KFLXIT, CY25701KLXCzzzT,

and CY25701KLXIzzzT in Ordering Information.

Added note reference 5 to CY25701KFLXCT and CY25701KFLXIT, and note

reference 6 to CY25701KLXCzzzT and CY25701KLXIzzzT.

CXQ /

PYRS

12/18/08

Removed Note “Not recommended for new designs.”

Removed part number CY25701KFLXCT, CY25701KFLXIT,

CY25701KLXCzzzT, and CY25701KLXIzzzT in Ordering Information.

*E

*F

2897744

3381730

CXQ

03/23/2010

Moved ‘ZZZ’ parts to Possible Configurations table

Updated package diagram

PURU

09/26/2011 Updated Benefits (Replaced “CY3672 programming kit” with “CY3672-USB

programming kit” and given hyperlink to the same as

“http://www.cypress.com/?rID=44009” and also given hyperlink to “CY3724

socket adapters” as “http://www.cypress.com/?rID=37857”.

Updated Logic Block Diagram (Replaced the previous Logic Block Diagram

with the present Logic Block Diagram).

Added Ordering Code Definitions.

Updated Package Drawings and Dimensions (Updated the next revision

package outline for Figure 7).

Added Acronyms and Units of Measure.

Updated in new template.

Document Number: 001-07313 Rev. *F

Page 12 of 13

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CY25701

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support

Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office

closest to you, visit us at Cypress Locations.

Products

Automotive

cypress.com/go/automotive

cypress.com/go/clocks

cypress.com/go/interface

cypress.com/go/powerpsoc

cypress.com/go/plc

PSoC Solutions

Clocks & Buffers

Interface

psoc.cypress.com/solutions

PSoC 1 | PSoC 3 | PSoC 5

Lighting & Power Control

Memory

cypress.com/go/memory

cypress.com/go/image

cypress.com/go/psoc

Optical & Image Sensing

PSoC

Touch Sensing

USB Controllers

Wireless/RF

cypress.com/go/touch

cypress.com/go/USB

cypress.com/go/wireless

any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for

medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as

critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems

application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),

United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,

and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress

integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without

the express written permission of Cypress.

Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES

OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not

assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where

a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer

assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Document Number: 001-07313 Rev. *F

Revised September 26, 2011

Page 13 of 13

All products and company names mentioned in this document may be the trademarks of their respective holders.

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型号：	CY25701LXC-ZZZT
厂家：	CYPRESS
描述：	Clock Generator, 166MHz, CMOS, CDSO4, 5 X 3.20 MM, LEAD FREE, CERAMIC, LCC-4 时钟 CD 外围集成电路
文件：	总13页 (文件大小：573K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CY25701LXC-ZZZT [CYPRESS]

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