MTA050P01S3 [CYSTEKEC]
-14V P-Channel Enhancement Mode MOSFET;型号: | MTA050P01S3 |
厂家: | CYSTECH ELECTONICS CORP. |
描述: | -14V P-Channel Enhancement Mode MOSFET |
文件: | 总9页 (文件大小:400K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Spec. No. : C101S3
Issued Date : 2016.06.07
Revised Date :
CYStech Electronics Corp.
Page No. : 1/9
-14V P-Channel Enhancement Mode MOSFET
BVDSS
-14V
-1.7A
MTA050P01S3
ID @ VGS=-10V, TA=25°C
RDSON@VGS=-4.5V, ID=-1.7A
RDSON@VGS=-2.5V, ID=-1.7A
RDSON@VGS=-1.8V, ID=-1A
RDSON@VGS=-1.5V, ID=-1A
66mΩ(typ)
86mΩ(typ)
121mΩ(typ)
181mΩ(typ)
Features
• Low gate charge
• Compact and low profile SOT-323 package
• Advanced trench process technology
• High density cell design for ultra low on resistance
• Pb-free lead plating package
Symbol
Outline
MTA050P01S3
SOT-323
D
S
G:Gate
G
S:Source
D:Drain
Ordering Information
Device
Package
Shipping
3000 pcs / tape & reel
SOT-323
MTA050P01S3-0-T1-G
(Pb-free lead plating and halogen-free package)
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant
and green compound products
Packing spec, T1 : 3000 pcs / tape & reel, 7” reel
Product rank, zero for no rank products
Product name
MTA050P01S3
CYStek Product Specification
Spec. No. : C101S3
Issued Date : 2016.06.07
Revised Date :
CYStech Electronics Corp.
Page No. : 2/9
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
VDS
Limits
-14
±8
Unit
V
Drain-Source Voltage
Gate-Source Voltage
VGS
-1.7
-1.4
-6.8
Continuous Drain Current @ TA=25°C, VGS=-4.5V (Note 3)
Continuous Drain Current @ TA=70°C, VGS=-4.5V (Note 3)
ID
A
Pulsed Drain Current
(Notes 1, 2)
IDM
PD
Maximum Power Dissipation
(Note 3)
0.34
W
Operating Junction and Storage Temperature Range
Tj ; Tstg
-55~+150
°C
Thermal Performance
Parameter
Symbol
Limit
367
Unit
Thermal Resistance, Junction-to-Ambient(PCB mounted) (Note 3)
RθJA
°C/W
Note : 1. Pulse width limited by maximum junction temperature.
2. Pulse width≤ 300μs, duty cycle≤2%.
3. Surface mounted on 1 in² copper pad of FR-4 board.
Electrical Characteristics (Tj=25°C, unless otherwise noted)
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Static
BVDSS
∆BVDSS/∆Tj
VGS(th)
-14
-
-0.4
-
8
-
-
-
V
VGS=0V, ID=-250μA
mV/°C Reference to 25°C, ID=-250μA
-1.0
V
VDS=VGS, ID=-250μA
±
±
IGSS
-
-
-
-
-
-
-
-
-
-
-
100
-1
nA
VGS= 8V, VDS=0V
VDS=-12V, VGS=0V
VDS=-10V, VGS=0V (Tj=70°C)
VGS=-4.5V, ID=-1.7A
VGS=-2.5V, ID=-1.7A
VGS=-1.8V, ID=-1A
IDSS
μA
-10
90
120
170
270
-
66
86
121
181
5.5
*RDS(ON)
mΩ
VGS=-1.5V, ID=-1A
VDS=-5V, ID=-2A
*GFS
Dynamic
Ciss
S
-
-
-
-
-
-
-
-
-
-
516
144
134
9.8
22.6
39.6
21.2
7.6
-
-
-
-
-
-
-
-
-
-
pF
ns
VDS=-10V, VGS=0V, f=1MHz
Coss
Crss
td(ON)
tr
td(OFF)
tf
Qg
Qgs
Qgd
Ω
VDS=-10V, ID=-1A, VGS=-5V, RG=3.3
VDS=-10V, ID=-2A, VGS=-4.5V
nC
0.8
2.8
MTA050P01S3
CYStek Product Specification
Spec. No. : C101S3
Issued Date : 2016.06.07
Revised Date :
CYStech Electronics Corp.
Page No. : 3/9
Source-Drain Diode
*VSD
Trr
Qrr
-
-
-
-0.9
30
9.5
-1.2
-
-
V
ns
nC
VGS=0V, IS=-1.7A
VGS=0V, IF=-2A, dIF/dt=100A/μs
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
Recommended Soldering Footprint
MTA050P01S3
CYStek Product Specification
Spec. No. : C101S3
Issued Date : 2016.06.07
Revised Date :
CYStech Electronics Corp.
Page No. : 4/9
Typical Characteristics
Brekdown Voltage vs Ambient Temperature
Typical Output Characteristics
10
8
1.4
1.2
1
-VGS=5V, 4V, 3V, 2.5V
6
-VGS=2V
0.8
0.6
0.4
4
ID=-250μA,
2
VGS=0V
-VGS=1.5V
0
-75 -50 -25
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
0
1
2
3
4
5
-VDS, Drain-Source Voltage(V)
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
1000
100
10
1.6
1.4
1.2
1
VGS=0V
-VGS=1.5V
-VGS=1.8V
Tj=25°C
Tj=150°C
0.8
0.6
0.4
0.2
-VGS=4.5V
-VGS=3V
0
2
4
6
8
10
0.01
0.1
1
10
-ID, Drain Current(A)
-IDR, Reverse Drain Current (A)
Drain-Source On-State Resistance vs Junction Tempearture
VGS=-4.5V, ID=-1.7A
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
400
1.6
360
320
280
240
200
160
120
80
1.4
1.2
1
ID=-3.6A
0.8
0.6
0.4
ID=-1.7A
40
-75 -50 -25
0
25 50 75 100 125 150 175
0
1
2
3
4
5
-VGS, Gate-Source Voltage(V)
Tj, Junction Temperature(°C)
MTA050P01S3
CYStek Product Specification
Spec. No. : C101S3
Issued Date : 2016.06.07
Revised Date :
CYStech Electronics Corp.
Page No. : 5/9
Typical Characteristics(Cont.)
Threshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
1.4
1.2
1
1000
Ciss
ID=-1mA
0.8
0.6
0.4
C
oss
μ
ID=-250 A
Crss
100
-75 -50 -25
0
25 50 75 100 125 150 175
0
1
2
3
4
5
6
7
8
9
10
-VDS, Drain-Source Voltage(V)
Tj, Junction Temperature(°C)
Gate Charge Characteristics
Maximum Safe Operating Area
5
4
3
2
1
0
10
VDS=-10V
ID=-2A
100μs
1
0.1
1ms
10ms
100ms
TA=25°C, Tj=150°C,
1
θ
VGS=-4.5V, R JA=367°C/W
Single Pulse
DC
0.01
0
1
2
3
4
5
6
7
8
0.01
0.1
1
10
100
-VDS, Drain-Source Voltage(V)
Qg, Total Gate Charge(nC)
Maximum Drain Current vs JunctionTemperature
Typical Transfer Characteristics
2
1.8
10
-VDS=5V
1.6
1.4
1.2
1
8
6
4
2
0
0.8
0.6
0.4
0.2
0
θJA
TA=25°C, VGS=-4.5V, R =367°C/W
25
50
75
100
125
150
175
0
1
2
3
4
5
Tj, Junction Temperature(°C)
-VGS, Gate-Source Voltage(V)
MTA050P01S3
CYStek Product Specification
Spec. No. : C101S3
Issued Date : 2016.06.07
Revised Date :
CYStech Electronics Corp.
Page No. : 6/9
Typical Characteristics(Cont.)
Forward Transfer Admittance vs Drain Current
Power Derating Curve
10
0.4
0.3
0.2
0.1
0
Mounted on FR-4 board
with minimum pad area
1
0.1
0.01
VDS=-5V
Pulsed
Ta=25°C
0
20
40
60
80 100 120 140 160
0.001
0.01
0.1
-ID, Drain Current(A)
1
10
TA, Ambient Temperature(℃)
Transient Thermal Response Curves
1
D=0.5
1.RθJA(t)=r(t)*RθJA
0.2
0.1
2.Duty Factor, D=t1/t2
3.TJM-TA=PDM*RθJA(t)
=367
4.RθJA
°C/W
0.1
0.05
0.02
0.01
Single Pulse
0.01
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
1.E+01
1.E+02
t1, Square Wave Pulse Duration(s)
MTA050P01S3
CYStek Product Specification
Spec. No. : C101S3
Issued Date : 2016.06.07
Revised Date :
CYStech Electronics Corp.
Page No. : 7/9
Reel Dimension
Carrier Tape Dimension
MTA050P01S3
CYStek Product Specification
Spec. No. : C101S3
Issued Date : 2016.06.07
Revised Date :
CYStech Electronics Corp.
Page No. : 8/9
Recommended wave soldering condition
Product
Peak Temperature
Soldering Time
5 +1/-1 seconds
Pb-free devices
260 +0/-5 °C
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Time maintained above:
−Temperature (TL)
− Time (tL)
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
10-30 seconds
20-40 seconds
Ramp down rate
6°C/second max.
6°C/second max.
8 minutes max.
6 minutes max.
Time 25 °C to peak temperature
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTA050P01S3
CYStek Product Specification
Spec. No. : C101S3
Issued Date : 2016.06.07
Revised Date :
CYStech Electronics Corp.
Page No. : 9/9
SOT-323 Dimension
Marking:
Date Code
A5P
3-Lead SOT-323 Plastic
Surface Mounted Package
CYStek Package Code: S3
Style: Pin 1.Gate 2.Source 3.Drain
Millimeters
DIM
Inches
Min.
Millimeters
Inches
DIM
Min.
Max.
Max.
0.043
0.004
0.039
0.016
0.006
0.087
0.053
Min.
Max.
Min.
Max.
A
A1
A2
b
0.900
0.000
0.900
0.200
0.080
2.000
1.150
1.100
0.100
1.000
0.400
0.150
2.200
1.350
0.035
0.000
0.035
0.008
0.003
0.079
0.045
E1
e
e1
L
L1
θ
2.150
1.200
2.450
0.650 TYP
0.085
0.047
0.096
0.026 TYP
1.400
0.055
0.525 REF
0.021 REF
c
D
E
0.260
0.460
0.010
0.018
0°
8°
0°
8°
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTA050P01S3
CYStek Product Specification
相关型号:
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