MTB50N10E3-0-UB-X [CYSTEKEC]

N-Channel Enhancement Mode Power MOSFET;
MTB50N10E3-0-UB-X
型号: MTB50N10E3-0-UB-X
厂家: CYSTECH ELECTONICS CORP.    CYSTECH ELECTONICS CORP.
描述:

N-Channel Enhancement Mode Power MOSFET

文件: 总8页 (文件大小:391K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Spec. No. : C893E3  
Issued Date : 2016.06.01  
Revised Date :  
CYStech Electronics Corp.  
Page No. : 1/8  
N-Channel Enhancement Mode Power MOSFET  
MTB50N10E3  
BVDSS  
100V  
29A  
ID@VGS=10V, TC=25°C  
RDS(ON)@VGS=10V, ID=25A  
RDS(ON)@VGS=5V, ID=20A  
Features  
Low Gate Charge  
Simple Drive Requirement  
Repetitive Avalanche Rated  
Fast Switching Characteristic  
Pb-free lead plating and RoHS compliant package  
32mΩ (typ)  
33mΩ (typ)  
Symbol  
Outline  
TO-220  
MTB50N10E3  
GGate  
DDrain  
SSource  
G D S  
Ordering Information  
Device  
Package  
Shipping  
50 pcs/tube, 20 tubes/box, 4 boxes / carton  
TO-220  
(Pb-free lead plating package)  
MTB50N10E3-0-UB-X  
Environment friendly grade : S for RoHS compliant products, G for RoHS  
compliant and green compound products  
Packing spec, UB : 50 pcs / tube, 20 tubes/box  
Product rank, zero for no rank products  
Product name  
MTB50N10E3  
CYStek Product Specification  
Spec. No. : C893E3  
Issued Date : 2016.06.01  
Revised Date :  
CYStech Electronics Corp.  
Page No. : 2/8  
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)  
Parameter  
Symbol  
Limits  
Unit  
V
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
VGS  
100  
±20  
29  
20.5  
5
4
107  
24  
Continuous Drain Current @VGS=10V, TC=25°C  
Continuous Drain Current @VGS=10V, TC=100°C  
Continuous Drain Current @TA=25°C, VGS=10V  
Continuous Drain Current @TA=70°C, VGS=10V  
Pulsed Drain Current  
ID  
(Note 2)  
(Note 2)  
(Note 3)  
(Note 3)  
A
IDM  
IAS  
Avalanche Current  
Avalanche Energy @ L=0.5mH, ID=24A, VDD=50V (Note 4)  
Repetitive Avalanche Energy@ L=0.05mH  
EAS  
EAR  
144  
8.3  
mJ  
Total Power Dissipation (TC=25)  
Total Power Dissipation (TC=100)  
Total Power Dissipation (TA=25)  
Total Power Dissipation (TA=70)  
Operating Junction and Storage Temperature  
(Note 1)  
(Note 1)  
(Note 2)  
(Note 2)  
83  
41  
2.1  
1.4  
PD  
W
Tj, Tstg  
-55~+175  
°C  
Thermal Data  
Parameter  
Thermal Resistance, Junction-to-case, max  
Thermal Resistance, Junction-to-ambient, max (Note 2)  
Symbol  
RθJC  
RθJA  
Value  
1.8  
58  
Unit  
°C/W  
°
.
Note : 1 The power dissipation PD is based on TJ(MAX)=175 C, using junction-to-case thermal resistance, and is more useful  
in setting the upper dissipation limit for cases where additional heatsinking is used.  
.
2 The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment  
°
with TA=25 C. The power dissipation PDSM is based on RθJA and the maximum allowed junction  
temperature of 150°C. The value in any given application depends on the user’s specific board design, and the  
maximum temperature of 175°C may be used if the PCB allows it.  
°
.
3 Pulse width limited by junction temperature TJ(MAX)=175 C. Ratings are based on low frequency and low duty  
cycles to keep initial TJ=25°C.  
4. 100% tested by conditions of L=0.1mH, IAS=15A, VGS=10V, VDD=50V  
MTB50N10E3  
CYStek Product Specification  
Spec. No. : C893E3  
Issued Date : 2016.06.01  
Revised Date :  
CYStech Electronics Corp.  
Page No. : 3/8  
Characteristics (TC=25°C, unless otherwise specified)  
Symbol  
Min.  
Typ.  
Max.  
Unit  
Test Conditions  
Static  
BVDSS  
BVDSS/Tj  
VGS(th)  
100  
-
0.1  
-
28  
-
-
-
32  
33  
-
-
2
-
100  
1
25  
43  
45  
V
V/°C  
V
S
nA  
VGS=0V, ID=250μA  
-
1
-
-
-
-
-
-
Reference to 25°C, ID=250μA  
VDS = VGS, ID=250μA  
VDS =10V, ID=20A  
GFS  
IGSS  
±
±
VGS= 20V  
VDS =80V, VGS =0V  
VDS =80V, VGS =0V, Tj=125°C  
VGS =10V, ID=25A  
IDSS  
μA  
Ω
m
*RDS(ON)  
VGS =5V, ID=20A  
Dynamic  
*Qg  
-
-
-
-
-
-
-
-
-
-
-
25.1  
3
5.9  
-
-
-
-
-
-
-
-
-
-
-
nC  
ID=25A, VDS=50V, VGS=10V  
VDS=50V, ID=1A, VGS=10V,  
*Qgs  
*Qgd  
*td(ON)  
*tr  
*td(OFF)  
*tf  
Ciss  
Coss  
Crss  
8.2  
17.4  
56.8  
24.6  
950  
108  
56  
ns  
Ω
RG=6  
pF  
VGS=0V, VDS=30V, f=1MHz  
f=1MHz  
Ω
Rg  
3.5  
Source-Drain Diode  
*IS  
*ISM  
*VSD  
*trr  
-
-
-
-
-
-
-
29  
A
107  
1.2  
-
0.9  
27  
38.5  
V
ns  
nC  
IS=25A, VGS=0V  
IF=25A, VGS=0V, dIF/dt=100A/μs  
*Qrr  
-
*Pulse Test : Pulse Width 300μs, Duty Cycle2%  
MTB50N10E3  
CYStek Product Specification  
Spec. No. : C893E3  
Issued Date : 2016.06.01  
Revised Date :  
CYStech Electronics Corp.  
Page No. : 4/8  
Typical Characteristics  
Brekdown Voltage vs Junction Temperature  
Typical Output Characteristics  
1.4  
1.2  
1
80  
70  
60  
50  
40  
30  
20  
10  
0
10V,9V,8V,7V,6V,5V  
4
V
0.8  
0.6  
0.4  
3
V
ID=250μA,  
VGS=0V  
VGS=2.5V  
-75 -50 -25  
0
25 50 75 100 125 150 175 200  
0
2
4
6
DS, Drain-Source Voltage(V)  
8
10  
V
Tj, Junction Temperature(°C)  
Static Drain-Source On-State resistance vs Drain Current  
Reverse Drain Current vs Source-Drain Voltage  
100  
1.2  
VGS=4.5V  
VGS=5V  
1
0.8  
0.6  
0.4  
0.2  
Tj=25°C  
VGS=10V  
Tj=150°C  
10  
0.1  
1
10  
100  
0
4
8
12  
16  
20  
ID, Drain Current(A)  
IDR, Reverse Drain Current(A)  
Drain-Source On-State Resistance vs Junction Tempearture  
Static Drain-Source On-State Resistance vs Gate-Source  
Voltage  
100  
2.8  
2.4  
2
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
VGS=10V, ID=25A  
ID=25A  
1.6  
1.2  
0.8  
0.4  
0
RDS(ON)@Tj=25°C : 32mΩ typ.  
-75 -50 -25  
0
25 50 75 100 125 150 175 200  
0
2
4
6
GS, Gate-Source Voltage(V)  
8
10  
V
Tj, Junction Temperature(°C)  
MTB50N10E3  
CYStek Product Specificati
Spec. No. : C893E3  
Issued Date : 2016.06.01  
Revised Date :  
CYStech Electronics Corp.  
Page No. : 5/8  
Typical Characteristics(Cont.)  
Threshold Voltage vs Junction Tempearture  
Capacitance vs Drain-to-Source Voltage  
10000  
1.4  
1.2  
1
Ciss  
1000  
100  
10  
ID=1mA  
0.8  
0.6  
0.4  
0.2  
C
oss  
ID=250μA  
Crss  
25  
-75 -50 -25  
0
25 50 75 100 125 150 175 200  
0
5
10  
15  
20  
30  
VDS, Drain-Source Voltage(V)  
Tj, Junction Temperature(°C)  
Gate Charge Characteristics  
VDS=50V  
Forward Transfer Admittance vs Drain Current  
VDS=10V  
100  
10  
10  
8
VDS=20V  
6
VDS=15V  
1
VDS=80V  
4
0.1  
0.01  
2
Pulsed  
Ta=25°C  
ID=25A  
0
0
5
10  
15  
20  
25  
30  
0.001  
0.01  
0.1  
1
10  
100  
ID, Drain Current(A)  
Total Gate Charge---Qg(nC)  
Maximum Drain Current vs Case Temperature  
Maximum Safe Operating Area  
30  
1000  
100  
10  
25  
20  
15  
10  
5
RDS(ON)  
Limited  
10 s  
μ
100μs  
1ms  
10ms  
TC=25°C, Tj=175°C,  
JC  
100ms  
DC  
1
θ
VGS=10V,R =1.8°C/W  
JC  
θ
VGS=10V, R =1.8°C/W  
single pulse  
0
0.1  
25  
50  
75  
100  
125  
150 175  
200  
0.1  
1
V
10  
DS, Drain-Source Voltage(V)  
100  
1000  
TC, Case Temperature(°C)  
MTB50N10E3  
CYStek Product Specification  
Spec. No. : C893E3  
Issued Date : 2016.06.01  
Revised Date :  
CYStech Electronics Corp.  
Page No. : 6/8  
Typical Characteristics(Cont.)  
Single Pulse Maximum Power Dissipation  
Typical Transfer Characteristics  
3000  
2500  
2000  
1500  
1000  
500  
80  
VDS=10V  
70  
TJ(MAX)=175°C  
TC=25°C  
60  
50  
40  
30  
20  
10  
0
θ
R
JC=1.8°C/W  
0
0
1
2
3
4
5
6
7
8
9
10  
0.0001  
0.001  
0.01 0.1  
Pulse Width(s)  
1
10  
VGS, Gate-Source Voltage(V)  
Transient Thermal Response Curves  
1
D=0.5  
JC  
θ
1.RθJC(t)=r(t)*R  
2.Duty Factor, D=t1/t2  
3.TJM-TC=PDM*RθJC(t)  
0.2  
JC  
θ
4.R =1.8 °C/W  
0.1  
0.1  
0.05  
0.02  
0.01  
Single Pulse  
0.01  
1.E-05  
1.E-04  
1.E-03  
1.E-02  
1.E-01  
1.E+00  
1.E+01  
t1, Square Wave Pulse Duration(s)  
MTB50N10E3  
CYStek Product Specification  
Spec. No. : C893E3  
Issued Date : 2016.06.01  
Revised Date :  
CYStech Electronics Corp.  
Page No. : 7/8  
Recommended wave soldering condition  
Product  
Peak Temperature  
Soldering Time  
5 +1/-1 seconds  
Pb-free devices  
260 +0/-5 °C  
Recommended temperature profile for IR reflow  
Profile feature  
Average ramp-up rate  
(Tsmax to Tp)  
Sn-Pb eutectic Assembly  
Pb-free Assembly  
3°C/second max.  
3°C/second max.  
Preheat  
Temperature Min(TS min)  
Temperature Max(TS max)  
Time(ts min to ts max)  
100°C  
150°C  
60-120 seconds  
150°C  
200°C  
60-180 seconds  
Time maintained above:  
Temperature (TL)  
Time (tL)  
183°C  
60-150 seconds  
240 +0/-5 °C  
217°C  
60-150 seconds  
260 +0/-5 °C  
Peak Temperature(TP)  
Time within 5°C of actual peak  
temperature(tp)  
10-30 seconds  
20-40 seconds  
Ramp down rate  
6°C/second max.  
6°C/second max.  
6 minutes max.  
8 minutes max.  
Time 25 °C to peak temperature  
Note : All temperatures refer to topside of the package, measured on the package body surface.  
MTB50N10E3  
CYStek Product Specification  
Spec. No. : C893E3  
Issued Date : 2016.06.01  
Revised Date :  
CYStech Electronics Corp.  
Page No. : 8/8  
TO-220 Dimension  
Marking:  
B50  
N10  
□□□□  
Device  
Name  
Date  
Code  
1
2 3  
3-Lead TO-220 Plastic Package  
Style: Pin 1.Gate 2.Drain 3.Source  
4.Drain  
CYStek Package Code: E3  
*: Typical  
Millimeters  
Inches  
Min.  
Millimeters  
Inches  
DIM  
DIM  
Min.  
4.470  
2.520  
0.710  
1.170  
0.310  
1.170  
10.010  
8.500  
Max.  
4.670  
2.820  
0.910  
1.370  
0.530  
1.370  
10.310  
8.900  
Max.  
0.184  
0.111  
0.036  
0.054  
0.021  
0.054  
0.406  
0.350  
Min.  
Max.  
Min.  
Max.  
12.460  
A
A1  
b
b1  
c
c1  
D
E
0.176  
0.099  
0.028  
0.046  
0.012  
0.046  
0.394  
0.335  
E1  
e
e1  
F
h
L
12.060  
0.475  
0.491  
2.540*  
0.100*  
4.980  
2.590  
0.000  
5.180  
2.890  
0.300  
0.196  
0.102  
0.000  
0.528  
0.140  
0.147  
0.204  
0.114  
0.012  
0.543  
0.156  
0.155  
13.400 13.800  
L1  
Φ
3.560  
3.735  
3.960  
3.935  
Notes: 1.Controlling dimension: millimeters.  
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.  
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.  
Material:  
Lead: Pure tin plated.  
Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.  
Important Notice:  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.  
CYStek reserves the right to make changes to its products without notice.  
CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.  
CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.  
MTB50N10E3  
CYStek Product Specification  

相关型号:

MTB50P03HDL

TMOS POWER FET LOGIC LEVEL 50 AMPERES 30 VOLTS
MOTOROLA

MTB50P03HDL

Power MOSFET 50 Amps, 30 Volts, Logic Level P−Channel D2PAK
ONSEMI

MTB50P03HDLG

Power MOSFET 50 Amps, 30 Volts, Logic Level P−Channel D2PAK
ONSEMI

MTB50P03HDLT4

Power MOSFET 50 Amps, 30 Volts, Logic Level P−Channel D2PAK
ONSEMI

MTB50P03HDLT4G

Power MOSFET 50 Amps, 30 Volts, Logic Level P−Channel D2PAK
ONSEMI

MTB50SA

Full-Size (7.3mm or 4.7mm height)
ETC

MTB50SAM

Full-Size (7.3mm or 4.7mm height)
ETC

MTB50SAV

Full-Size (7.3mm or 4.7mm height)
ETC

MTB50SAVM

Full-Size (7.3mm or 4.7mm height)
ETC

MTB50SB

Full-Size (7.3mm or 4.7mm height)
ETC

MTB50SBM

Full-Size (7.3mm or 4.7mm height)
ETC

MTB50SBV

Full-Size (7.3mm or 4.7mm height)
ETC