6MBP75RTJ-060 [ETC]

IGBTs ; IGBT的\n
6MBP75RTJ-060
型号: 6MBP75RTJ-060
厂家: ETC    ETC
描述:

IGBTs
IGBT的\n

双极性晶体管
文件: 总22页 (文件大小:921K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SPECIFICATION  
IGBT - IPM  
Device Name :  
6MBP75RTJ060  
MS6M 0673  
Type Name  
Spec. No.  
:
:
Fuji Electric Co.,Ltd.  
Matsumoto Factory  
N.Matsuda  
Jan. 29 ‘03  
Jan. 29 ‘03  
Jan.-29 -‘03  
a
Nishiura  
T.Fujihira  
1
MS6M 0673  
K.Yamada  
22  
H04-004-07  
R e v i s e d R e c o r d s  
Classi-  
Applied  
date  
Date  
fication  
Ind.  
Content  
Drawn  
Checked  
Approved  
T.Fujihira  
A.Nishiura  
K.Yamada  
Issued  
date  
enactment  
N.Matsuda  
Jan.-29-’03  
T.Miyasaka  
K.Yamada  
a
N.Matsuda  
T.Fujihira  
Reliability Test Items  
May.-19-’03  
Revision  
a
2
MS6M 0673  
22  
H04-004-06  
a
1. Package Outline Drawings  
Package type : P621  
109 ±1  
±0.3  
95  
13.8±0.3  
66.44  
±0.2  
3.22±0.3  
10±0.2  
10  
10±0.2 12±0.25  
4-φ5.5  
±0.15  
±0.15  
±0.15  
6
2±0.1  
6
6
1
B
P
N
W
V
U
0.5  
24  
26  
26  
19-0.5  
2-φ2.5  
6-M5  
Lot No.  
Indication of Lot No.  
Odered No. in monthly  
Manufactured month  
(Jan.Sep.:19,Oct.:O,Nov.:N,Dec.:D)  
2±0.1  
Last digit of manufactured year  
2±0.1  
2±0.1  
3.22±0.3  
2
2
2
φ2.5  
(φ11.5)  
0.5  
Details of control terminals  
Dimensions in mm  
a
3
MS6M 0673  
22  
H04-004-03  
2Pin Descriptions  
Main circuit  
Symbol  
Description  
Positive input supply voltage.  
P
U
V
W
N
B
Output (U).  
Output (V).  
Output (W).  
Negative input supply voltage.  
No contact.  
Control circuit  
Symbol  
GNDU High side ground (U).  
Description  
ALMU Alarm signal output (U).  
VinU Logic input for IGBT gate drive (U).  
VccU High side supply voltage (U).  
GNDV High side ground (V).  
ALMV Alarm signal output (V).  
VinV Logic input for IGBT gate drive (V).  
VccV High side supply voltage (V).  
GNDW High side ground (W).  
ALMW Alarm signal output (W).  
VinW Logic input for IGBT gate drive (W).  
VccW High side supply voltage (W).  
GND Low side ground.  
Vcc Low side supply voltage.  
VinDB No contact.  
VinX Logic input for IGBT gate drive (X).  
VinY Logic input for IGBT gate drive (Y).  
VinZ Logic input for IGBT gate drive (Z).  
ALM Low side alarm signal output.  
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3. Block Diagram  
P
VccU  
VinU  
Pre-Driver  
Pre-Driver  
Pre-Driver  
ALMU  
RALM 1.5k  
Vz  
Vz  
Vz  
GNDU  
VccV  
U
VinV  
ALMV  
RALM 1.5k  
GNDV  
VccW  
V
VinW  
ALMW  
RALM 1.5k  
GNDW  
W
Vcc  
VinX  
Pre-Driver  
Pre-Driver  
Pre-Driver  
Vz  
Vz  
Vz  
GND  
VinY  
VinZ  
NC  
B
VinDB  
N
Over heating protection  
circuit  
ALM  
RALM 1.5k  
Pre-drivers include following functions  
1.Amplifier for driver  
2.Short circuit protection  
3.Under voltage lockout circuit  
4.Over current protection  
5.IGBT chip over heating protection  
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MS6M 0673  
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4Absolute Maximum Ratings  
Tc25unless otherwise specified.  
Items  
Symbol  
VDC  
VDC(surge)  
Vsc  
Vces  
Ic  
Min.  
0
0
200  
0
-
-
-
-
-0.5  
-0.5  
-
-0.5  
-
Max.  
450  
500  
400  
600  
75  
150  
75  
198  
20  
Units  
V
V
V
V
A
A
A
W
V
V
mA  
V
mA  
Bus Voltage  
DC  
(between terminal P and N)  
Surge  
Short operating  
Collector-Emitter Voltage *1  
Collector Current  
DC  
1ms  
Icp  
-Ic  
Pc  
Vcc  
Vin  
Duty=75.0% *2  
One transistor *3  
Collector Power Dissipation  
Supply Voltage of Pre-Driver *4  
Input Signal Voltage *5  
Input Signal Current  
Vcc+0.5  
3
Iin  
Alarm Signal Voltage *6  
Alarm Signal Current *7  
Junction Temperature  
Operating Case Temperature  
Storage Temperature  
VALM  
ALM  
Tj  
Topr  
Tstg  
Vcc  
20  
150  
100  
125  
-
-20  
-40  
Isolating Voltage  
(Terminal to base, 50/60Hz sine wave 1min.) *8  
Viso  
-
-
-
AC2500  
3.5  
V
Terminal (M5)  
Mounting(M5)  
Screw Torque  
Nm  
Note  
*1 Vces shall be applied to the input voltage between terminal P and U or or W,  
N and U or V or W  
*2 125/FWD Rth(j-c)/(Ic×VF MAX)=125/0.855/(75×2.6)×100=75.0%  
*3 Pc=125/IGBT Rth(j-c)=125/0.63=198W [Inverter]  
*4 VCC shall be applied to the input voltage between terminal No.4 and 1, 8 and 5,  
12 and 9, 14 and 13  
*5 Vin shall be applied to the input voltage between terminal No.3 and 1, 7 and 5, 11 and 9,  
16,17,18 and 13.  
*6 : VALM shall be applied to the voltage between terminal No.2 and 1, No6 and 5,  
No10 and 9, No.19 and 13.  
*7 : IALM shall be applied to the input current to terminal No.2,6,10 and 19.  
*8 50/60Hz sine wave 1minute.  
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H04-004-03  
5. Electrical Characteristics  
Tj25℃,Vcc15V unless otherwise specified.  
5.1 Main circuit  
Item  
Conditions  
600V  
Symbol  
Min.  
-
Typ.  
-
Max.  
1.0  
Units  
mA  
Collector Current  
CE=  
ICES  
at off signal input  
Collector-Emitter  
saturation voltage  
Vin terminal open.  
Ic=75A Terminal  
Chip  
-
-
2.0  
-
2.4  
-
V
V
VCE(sat)  
-
-Ic=75A Terminal  
Chip  
-
-
2.6  
-
Forward voltage of FWD  
VF  
1.6  
-
VDC300VTj=125℃  
Ic75AFig.1Fig.6  
VDC300V  
Turn-on time  
ton  
toff  
1.2  
-
-
Turn-off time  
-
3.6  
us  
Reverse recovery time  
trr  
-
-
-
0.3  
-
IF75AFig.1Fig.6  
internal wiring  
Maximum AvalancheEnergy  
(A non-repetition)  
PAV inductance50nH  
Main circuit wiring  
40  
mJ  
inductance54nH  
5.2 Control circuit  
Item  
Conditions  
Switching Frequency  
: 015kHz  
Symbol  
Iccp  
Min.  
-
Typ.  
-
Max.  
18  
Units  
mA  
Supply current  
of P-side pre-driver (one unit)  
Supply current  
Iccn Tc-20125Fig.7  
-
-
65  
mA  
of N-side pre-driver  
ON  
Vin(th)  
1.00  
1.35  
1.60  
8.0  
-
1.70  
Input signal threshold voltage  
Input Zener Voltage  
V
V
OFF  
1.25  
1.95  
Vz  
Rin20k  
-
1.1  
-
-
-
Tc-20℃ꢀFig.2  
Alarm Signal Hold Time  
Current Limit Resistor  
tALM Tc25℃ꢀFig.2  
Tc125℃ꢀFig.2  
2.0  
-
-
ms  
-
4.0  
1575  
RALM Alarm terminal  
1425  
1500  
Ω
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5.3 Protection Section Vcc=15V)  
Item  
Symbol  
Ioc  
Conditions  
Tj=125℃  
Min.  
113  
Typ.  
-
Max.  
-
Units  
A
Over Current Protection Level  
of Inverter circuit  
Over Current Protection Delay time  
SC Protection Delay time  
tdoc  
tsc  
Tj=125℃  
-
-
5
-
-
8
-
us  
us  
Tj=125Fig.4  
Surface  
IGBT Chips Over Heating  
TjOH  
150  
-
Protection Temperature Level  
Over Heating Protection Hysteresis  
Over Heating Protection  
ofIGBT Chips  
TjH  
-
20  
-
-
TcOH  
VDC=0V, Ic=0A  
110  
125  
Protection Temperature Level  
Over Heating Protection Hysteresis  
Under Voltage Protection Level  
Under Voltage Protection Hysteresis  
Case Temperature  
TcH  
VUV  
VH  
-
20  
-
-
12.5  
-
11.0  
0.2  
V
0.5  
6. Thermal Characteristics (Tc=25℃)  
Item  
Symbol  
Rth(j-c)  
Rth(j-c)  
Rth(c-f)  
Min.  
Typ.  
Max.  
0.63  
0.855  
-
Units  
Junction to Case  
Inverter  
IGBT  
FWD  
-
-
-
-
-
/W  
Thermal Resistance *9  
Case to Fin Thermal Resistance with Compound  
0.05  
7. Noise Immunity  
Item  
Vdc=300VVcc=15VTest Circuit Fig 5.)  
Conditions  
Min.  
±2.0  
Typ.  
-
Max.  
-
Units  
kV  
Common mode  
Pulse width 1us,polarity ±,10 minuets  
rectangular noise  
Common mode  
lightning surge  
Judgeno over-current, no miss operating  
Rise time 1.2us,Fall time 50usInterval 20s,10 times  
Judgeno over-current, no miss operating  
±5.0  
-
-
kV  
8. Recommended Operating Conditions  
Item  
Symbol  
VDC  
Vcc  
Min.  
-
Typ.  
Max.  
400  
16.5  
3.0  
Units  
V
DC Bus Voltage  
-
15.0  
-
Power Supply Voltage of Pre-Driver  
Screw Torque (M5)  
13.5  
2.5  
V
-
Nm  
9. Weight  
Item  
Symbol  
Wt  
Min.  
-
Typ.  
450  
Max.  
-
Units  
g
Weight  
*9( For 1device Case is under the device )  
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Vin(th)  
On  
Vin  
Ic  
Vin(th)  
trr  
90%  
50%  
90%  
ton  
10%  
toff  
Figure 1. Switching Time Waveform Definitions  
off  
off  
/Vin  
Vge (Inside IPM)  
Fault (Inside IPM)  
/ALM  
on  
on  
Gate On  
Gate Off  
normal  
alarm  
2ms(typ.)  
tALMMax.  
tALMMax.  
tALM  
FaultOver-current,Over-heat or Under-voltage  
Figure 2. Input/Output Timing Diagram  
Necessary conditions for alarm reset (refer to to in figure2.)  
This represents the case when a failure-causing Fault lasts for a period more than tALM.  
The alarm resets when the input Vin is OFF and the Fault has disappeared.  
This represents the case when the ON condition of the input Vin lasts for a period more  
than tALM. The alarm resets when the Vin turns OFF under no Fault conditions.  
This represents the case when the Fault disappears and the Vin turns OFF within tALM.  
The alarm resets after lasting for a period of the specified time tALM.  
off  
/Vin  
on  
Ioc  
on  
Ic  
alarm  
tdoc  
/ALM  
tdoc  
Figure 3. Over-current Protection Timing Diagram  
Period :  
Period :  
When a collector current over the OC level flows and the OFF command is input within  
a period less than the trip delay time tdoc, the current is hard-interrupted and no alarm  
is output.  
When a collector current over the OC level flows for a period more than the trip delay  
time tdoc, the current is soft-interrupted. If this is detected at the lower arm IGBTs,  
an alarm is output.  
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MS6M 0673  
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tSC  
Ic  
Ic  
Ic  
IALM  
IALM  
IALM  
Figure.4 Definition of tsc  
CT  
P
U
V
W
N
VccU  
VinU  
20k  
20k  
IPM  
DC  
15V  
SW1  
SW2  
AC200V  
Noise  
GNDU  
Vcc  
+
DC  
15V  
VinX  
GND  
4700p  
Earth  
Cooling  
Fin  
Figure 5. Noise Test Circuit  
Vcc  
P
L
DC  
300V  
20k  
IPM  
DC  
15V  
+
Vin  
HCPL-  
4504  
GND  
N
Ic  
Figure 6. Switching Characteristics Test Circuit  
Icc  
Vcc  
A
P
U
V
W
N
IPM  
DC  
Vin  
GND  
15V  
P.G  
+8V  
fsw  
Figure 7. Icc Test Circuit  
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10. Truth table  
10.1 IGBT Control  
The following table shows the IGBT ON/OFF status with respect to the input signal Vin.  
The IGBT turn-on when Vin is at “Low” level under no alarm condition.  
Input  
(Vin)  
Output  
(IGBT)  
Low  
High  
ON  
OFF  
10.2 Fault Detection  
(1) When a fault is detected at the high side, only the detected arm stops its output.  
At that time the IPM dosen’t any alarm.  
(2) When a fault is detected at the low side, all the lower arms stop their outputs and the IPM  
outputs an alarm of the low side.  
IGBT  
Alarm Output  
Fault  
U-phase V-phase W-phase Low side ALM-U ALM-V ALM-W  
ALM  
H
OC  
UV  
OFF  
*
*
*
*
*
*
L
L
H
H
H
L
H
H
H
H
H
H
L
High side U-  
phase  
OFF  
H
TjOH  
OC  
OFF  
*
*
*
*
L
H
OFF  
OFF  
OFF  
*
*
*
H
H
H
H
H
H
H
H
H
H
High side V-  
phase  
UV  
*
*
*
L
H
TjOH  
OC  
*
*
*
L
H
*
OFF  
OFF  
OFF  
*
*
H
H
H
H
H
H
H
High side W-  
phase  
UV  
*
*
*
L
H
TjOH  
OC  
*
*
*
L
H
*
*
OFF  
OFF  
OFF  
H
H
H
L
Low side  
UV  
*
*
*
L
TjOH  
*
*
*
L
Case  
TcOH  
*
*
*
OFF  
H
H
H
L
Temperature  
*Depend on input logic.  
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11. Cautions for design and application  
1. Trace routing layout should be designed with particular attention to least stray capacity  
between the primary and secondary sides of optical isolators by minimizing the wiring  
length between the optical isolators and the IPM input terminals as possible.  
フォトカプラとIPMの入力端子間の配線は極力短くし、フォトカプラの一次側と二次側の浮遊容量を小さくした  
パターンレイアウトにして下さい。  
2. Mount a capacitor between Vcc and GND of each high-speed optical isolator as close to  
as possible.  
高速フォトカプラのVcc-GND間に、コンデンサを出来るだけ近接して取り付けて下さい。  
3. For the high-speed optical isolator, use high-CMR type one with tpHL, tpLH 0.8µs.  
高速フォトカプラは、tpHL,tpLH0.8us、高CMRタイプをご使用ください。  
4. For the alarm output circuit, use low-speed type optical isolators with CTR 100%.  
アラーム出力回路は、低速フォトカプラCTR100%のタイプをご使用ください。  
5. For the control power Vcc, use four power supplies isolated each. And they should be  
designed to reduce the voltage variations.  
制御電源Vccは、絶縁された4電源を使用してください。また、電圧変動を抑えた設計として下さい。  
6. Suppress surge voltages as possible by reducing the inductance between the DC bus P  
and N, and connecting some capacitors between the P and N terminals.  
P-N間の直流母線は出来るだけ低インダクタンス化し、P-N端子間にコンデンサを接続するなどしてサージ  
電圧を低減して下さい。  
7. To prevent noise intrusion from the AC lines, connect a capacitor of some 4700pF between  
the three-phase lines each and the ground.  
ACラインからのノイズ侵入を防ぐために、3相各線-アース間に4700pF程のコンデンサを接続して下さい。  
8. At the external circuit, never connect the control terminal GNDU to the main terminal  
U-phase, GNDV to V-phase, GNDW to W-phase, and GND to N-phase. Otherwise,  
malfunctions may be caused.  
制御端子①GNDUと主端子U相、制御端子⑤GNDVと主端子V相、制御端子⑨GNDWと主端子W相、  
制御端子⑬GNDと主端子Nを外部回路で接続しないで下さい。誤動作の原因になります。  
9. Take note that an optical isolator’s response to the primary input signal becomes slow  
if a capacitor is connected between the input terminal and GND.  
入力端子-GND間にコンデンサを接続すると、フォトカプラ一次側入力信号に対する応答時間が長くなります  
のでご注意ください。  
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10. Taking the used isolator’s CTR into account, design with a sufficient allowance to decide  
the primary forward current of the optical isolator.  
フォトカプラの一次側電流は、お使いのフォトカプラのCTRを考慮し十分に余裕をもった設計にして下さい。  
11. Apply thermal compound to the surfaces between the IPM and its heat sink to reduce  
the thermal contact resistance.  
接触熱抵抗を小さくするために、IPMとヒートシンクの間にサーマルコンパウンドを塗布して下さい。  
12. Finish the heat sink surface within roughness of 10µm and flatness (camber) between screw  
positions of 0 to +100µm. If the flatness is minus, the heat radiation becomes worse due to  
a gap between the heat sink and the IPM. And, if the flatness is over +100µm, there is a danger  
that the IPM copper base may be deformed and this may cause a dielectric breakdown.  
ヒートシンク表面の仕上げは、粗さ10um以下、ネジ位置間  
+100μm  
0
での平坦度(反り)は、0100umとして下さい。平坦度がマ  
イナスの場合、ヒートシンクとIPMの間に隙間ができ放熱が  
Heat sink  
悪化します。また、平坦度が+100um以上の場合IPMの銅  
Mounting holes  
ベースが変形し絶縁破壊を起こす危険性があります。  
13. This product is designed on the assumption that it applies to an inverter use. Sufficient  
examination is required when applying to a converter use. Please contact Fuji Electric Co.,Ltd  
if you would like to applying to converter use.  
本製品は、インバータ用途への適用を前提に設計されております。コンバータ用途へ適用される場合は、  
十分な検討が必要です。もし、コンバータへ適用される場合は御連絡ください。  
14. Please see theꢀ『Fuji IGBT-IPM R SERIES APPLICATION MANUALand Fuji IGBT  
MODULES N SERIES APPLICATION MANUAL.  
『富士IGBT-IPM Rシリーズ アプリケーションマニュアル』及び『IGBTモジュール Nシリーズ アプリケーション  
マニュアル』を御参照ください。  
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12. Example of applied circuit 応用回路例  
A
V
C 2 0 0  
2 0  
k
Ω
P
+
IF  
10 u F  
0 . 1 u F  
V c c  
U
V
W
+
5 V  
1 k  
2 0  
k Ω  
+
B
N
IF  
10 u F  
0 . 1 u F  
V c c  
5 V  
1 k  
2 0 k  
Ω
+
IF  
10 u F  
0 . 1 u F  
V c c  
5 V  
1 k  
I P M  
V c c  
10 u F  
IF  
2
0 k  
0 . 1 u F  
Ω
2 0 kΩ  
0 . 1 u F  
IF  
IF  
10 u F  
2 0 kΩ  
0 . 1 u F  
10 u F  
5 V  
1 k  
The alarm signal should be connected to Vcc when it it is not used.  
不使用のアーム端子は、 制御電Vccに接い。  
13. Package and Markingꢀ梱包仕様  
Please see the MT6M4140 which is packing specification of P610 & P611 & P621 package.  
P610,611,621 梱包仕様書 MT6M4140を御参照ください。  
14. Cautions for storage and transportationꢀ保管、運搬上の注意  
Store the modules at the normal temperature and humidity (5 to 35°C, 45 to 75%).  
常温常湿(535℃、4575%)で保存して下さい。  
Avoid a sudden change in ambient temperature to prevent condensation on the module  
surfaces.  
モジュールの表面が結露しないよう、急激な温度変化を避けて下さい。  
Avoid places where corrosive gas generates or much dust exists.  
腐食性ガスの発生場所、粉塵の多い場所は避けて下さい。  
Store the module terminals under unprocessed conditions  
モジュールの端子は未加工の状態で保管すること。.  
Avoid physical shock or falls during the transportation.  
運搬時に衝撃を与えたり落下させないで下さい。  
15. Scope of applicationꢀ適用範囲  
This specification is applied to the IGBT-IPM (type: 6MBP75RTJ060).  
本仕様書は、IGBT-IPM (型式:6MBP75RTJ060)に適用する。  
16. Based safety standardsꢀ準拠安全規格  
UL1557  
a
14  
MS6M 0673  
22  
H04-004-03  
a
18. Reliability Test Items  
Reference  
norms  
Test  
Accept-  
ance  
number  
Number  
of sample  
cate-  
Test items  
Test methods and conditions  
EIAJ  
gories  
ED-4701  
Test Method 401  
1 Terminal strength Pull force  
端子強度  
: 40 N (main terminal)  
10 N (control terminal)  
: 10 ±1 sec.  
5
( 1 : 0 )  
Method  
(Pull test)  
Test time  
2 Mounting Strength Screw torque  
: 2.5 ~ 3.5 Nm (M5)  
: 10 ±1 sec.  
: 10500 Hz  
Test Method 402  
5
5
( 1 : 0 )  
( 1 : 0 )  
method  
Test time  
Range of frequency  
締付け強度  
3 Vibration  
Test Method 403  
Condition code B  
Sweeping time  
: 15 min.  
振動  
100 m/s2  
:
Acceleration  
Sweeping direction  
Test time  
Maximum acceleration :  
Pulse width  
: Each X,Y,Z axis  
: 6 hr. (2hr./direction)  
5000 m/s2  
4 Shock  
衝撃  
Test Method 404  
Condition code B  
5
5
( 1 : 0 )  
( 1 : 0 )  
1.0 ms  
Direction  
Test time  
: Each X,Y,Z axis  
: 3 times/direction  
: 235 ±5 ℃  
: 5.0 ±0.5 sec.  
: 1 time  
5 Solderabitlity  
はんだ付け性  
Solder temp.  
Immersion duration  
Test time  
Test Method 303  
Condition code A  
Each terminal should be Immersed in solder  
within 1~1.5mm from the body.  
6 Resistance to  
soldering heat  
はんだ耐熱性  
Solder temp.  
Immersion time  
Test time  
: 260 ±5 ℃  
: 10 ±1sec.  
: 1 time  
5
( 1 : 0 )  
Test Method 302  
Condition code A  
Each terminal should be Immersed in solder  
within 1~1.5mm from the body.  
Test Method 201  
Test Method 202  
1 High temperature Storage temp.  
: 125 ±5 ℃  
: 1000 hr.  
: -40 ±5 ℃  
: 1000 hr.  
: 85 ±2 ℃  
: 85 ±5%  
5
5
5
( 1 : 0 )  
( 1 : 0 )  
( 1 : 0 )  
storage 高温保存 Test duration  
2 Low temperature  
storage 低温保存 Test duration  
3 Temperature Storage temp.  
Storage temp.  
Test Method 103  
Test code C  
humidity storage Relative humidity  
Test duration  
Test temp.  
Atmospheric pressure  
Test humidity  
Test duration  
Test temp.  
: 1000hr.  
高温高湿保存  
Test Method 103  
Test code E  
4 Unsaturated  
pressure cooker  
プレッシャークッカー  
: 120 ±2 ℃  
5
5
( 1 : 0 )  
( 1 : 0 )  
1.7x105 Pa  
:
: 85 ±5%  
: 96 hr.  
Test Method 105  
5 Temperature  
cycle  
:
Minimum storage temp. -40 ±5℃  
Maximum storage temp. 125 ±5℃  
Normal temp.  
5 ~ 35℃  
温度サイクル  
Dwell time  
: Tmin ~ TN ~ Tmax ~ TN  
1hr. 0.5hr. 1hr. 0.5hr.  
: 100 cycles  
Number of cycles  
Test temp.  
Test Method 307  
6 Thermal shock  
熱衝撃  
5
( 1 : 0 )  
+0  
High temp. side 100 -5  
:
method  
Condition code A  
+5  
Low temp. side 0 -0  
Fluid used  
: Pure water (running water)  
: 5 min. par each temp.  
: 10 sec.  
Dipping time  
Transfer time  
Number of cycles  
: 10 cycles  
a
19  
MS6M 0673  
22  
H04-004-03  
a
Reference  
norms  
Test  
cate-  
gories  
Accept-  
ance  
number  
Number  
of sample  
Test items  
Test methods and conditions  
EIAJ  
ED-4701  
Test Method 101  
1 High temperature Test temp.  
reverse bias  
:
5
5
5
( 1 : 0 )  
( 1 : 0 )  
( 1 : 0 )  
Ta = 125 ±5℃  
(Tj 150 )  
Bias Voltage  
: VC = 0.8×VCES  
: Applied DC voltage to C-E  
Vcc = 15V  
: 1000 hr.  
: 85 ±2 ℃  
: 85 ±5 %  
: VC = 0.8×VCES  
Vcc = 15V  
: Applied DC voltage to C-E  
: 1000 hr.  
: 2 sec.  
高温逆バイアス  
Bias Method  
Test duration  
Test temp.  
Relative humidity  
Bias Voltage  
Test Method 102  
Condition code C  
2 Temperature  
humidity bias  
高温高湿バイアス  
Bias Method  
Test duration  
ON time  
OFF time  
Test temp.  
3 Intermitted  
operating life  
(Power cycle)  
断続動作  
Test Method 106  
: 18 sec.  
:
Tj=100 ±5deg  
Tj 150 , Ta=25 ±5℃  
Number of cycles  
: 15000 cycles  
19. Failure Criteria  
Item  
Characteristic  
Symbol  
Failure criteria  
Lower limit Upper limit  
Unit  
Note  
Electrical  
characteristic Saturation voltage  
Forward voltage  
Leakage current  
ICES  
VCE(sat)  
VF  
th(j-c)  
th(j-c)  
Ioc  
-
-
-
-
-
USL×2  
USL×1.2  
USL×1.2  
USL×1.2 /W  
USL×1.2 /W  
mA  
V
V
Thermal  
IGBT  
resistance FWD  
Over Current Protection  
Alarm signal hold time  
Over heating Protection  
Isolation voltage  
Visual inspection  
Peeling  
LSL×0.8 USL×1.2  
LSL×0.8 USL×1.2 ms  
LSL×0.8 USL×1.2  
Broken insulation  
tALM  
TcOH  
Viso  
-
Visual  
inspection  
-
The visual sample  
-
Plating  
and the others  
LSL : Lower specified limit.  
USL : Upper specified limit.  
Note :  
Each parameter measurement read-outs shall be made after stabilizing the components  
at room ambient for 2 hours minimum, 24 hours maximum after removal from the tests.  
And in case of the wetting tests, for example, moisture resistance tests, each component  
shall be made wipe or dry completely before the measurement.  
a
20  
MS6M 0673  
22  
H04-004-03  
Warnings  
1. This product shall be used within its absolute maximum rating (voltage, current, and temperature).  
This product may be broken in case of using beyond the ratings.  
製品の絶対最大定格(電圧,電流,温度等)の範囲内で御使用下さい。絶対最大定格を超えて使用すると、素子が  
破壊する場合があります。ꢀ  
2. Connect adequate fuse or protector of circuit between three-phase line and this product to prevent  
the equipment from causing secondary destruction.  
万一の不慮の事故で素子が破壊した場合を考慮し、商用電源と本製品の間に適切な容量のヒューズ又はブレーカーを  
必ず付けて2次破壊を防いでください。  
3. When studying the device at a normal turn-off action, make sure that working paths of the turn-off  
voltage and current are within the RBSOA specification. And ,when studying the device duty at  
a short-circuit current non-repetitive interruption, make sure that the paths are also within the  
avalanche proof(PAV) specification which is calculated from the snubber inductance, the IPM  
inner inductance and the turn-off current. In case of use of IGBT-IPM over these specifications,  
it might be possible to be broken.  
通常のターンオフ動作における素子責務の検討の際には、ターンオフ電圧・電流の動作軌跡がRBSOA仕様内にある  
ことを確認して下さい。また、非繰返しの短絡電流遮断における素子責務の検討に際しては、スナバーインダクタンスと  
IPM内部インダクタンス及びターンオフ電流から算出されるアバランシェ耐量(PAV)仕様内である事を確認して下さい。  
これらの仕様を越えて使用すると、素子が破壊する場合があります。  
4. Use this product after realizing enough working on environment and considering of product's reliability  
life. This product may be broken before target life of the system in case of using beyond the product's  
reliability life.  
製品の使用環境を十分に把握し、製品の信頼性寿命が満足できるか検討の上、本製品を適用して下さい。製品の信頼性  
寿命を超えて使用した場合、装置の目標寿命より前に素子が破壊する場合があります。  
5. If the product had been used in the environment with acid, organic matter, and corrosive gas  
(For example : hydrogen sulfide, sulfurous acid gas), the product's performance and appearance  
can not be ensured easily.  
酸・有機物・腐食性ガス(硫化水素,亜硫酸ガス等)を含む環境下で使用された場合、製品機能・外観などの保証は  
致しかねます。  
6. The thermal stress generated from rise and fall of Tj restricts the product lifetime.  
You should estimate the Tj from power losses and thermal resistance, and design the inverter lifetime  
within the number of cycles provided from the power cycle curve. (Technical Rep. No.: MT6M4057)  
製品の寿命は、接合温度の上昇と下降によって起こる熱ストレスで決まります。損失と熱抵抗からTjを推定し、パワー  
サイクル寿命カーブで決まるサイクル数以下で、インバータの寿命を設計して下さい(技術資料№:MT6M4057)。  
7. Never add mechanical stress to deform the main or control terminal.  
The deformed terminal may cause poor contact problem.  
主端子及び制御端子に応力を与えて変形させないで下さい。ꢀ端子の変形により、接触不良などを引き起こす場合が  
あります。  
a
21  
MS6M 0673  
22  
H04-004-03  
8. Never add mechanical stress to deform the main or control terminal.  
The deformed terminal may cause poor contact problem.  
主端子及び制御端子に応力を与えて変形させないで下さい。ꢀ端子の変形により、接触不良などを引き起こす場合が  
あります。  
9. If excessive static electricity is applied to the control terminals, the devices can be broken.  
Implement some countermeasures against static electricity.  
制御端子に過大な静電気が印加された場合、素子が破壊する場合があります。取り扱い時は静電気対策を  
実施して下さい。  
Caution  
1. Fuji Electric is constantly making every endeavor to improve the product quality and reliability.  
However, semiconductor products may rarely happen to fail or malfunction. To prevent accidents  
causing injury or death, damage to property like by fire, and other social damage resulted from  
a failure or malfunction of the Fuji Electric semiconductor products, take some measures to keep  
safety such as redundant design, spread-fire-preventive design, and malfunction-protective design.  
富士電機は絶えず製品の品質と信頼性の向上に努めています。しかし、半導体製品は故障が発生したり、誤動作する  
場合があります。富士電機製半導体製品の故障または誤動作が、結果として人身事故・火災等による財産に対する  
損害や社会的な損害を起こさないように冗長設計・延焼防止設計・誤動作防止設計など安全確保のための手段を  
講じて下さい。  
2. The application examples described in this specification only explain typical ones that used the Fuji  
Electric products. This specification never ensure to enforce the industrial property and other rights,  
nor license the enforcement rights.  
本仕様書に記載してある応用例は、富士電機製品を使用した代表的な応用例を説明するものであり、本仕様書に  
よって工業所有権、その他権利の実施に対する保障または実施権の許諾を行うものではありません。  
3. The product described in this specification is not designed nor made for being applied to the equipment  
or systems used under life-threatening situations. When you consider applying the product of this  
specification to particular used, such as vehicle-mounted units, shipboard equipment, aerospace  
equipment, medical devices, atomic control systems and submarine relaying equipment or systems,  
please apply after confirmation of this product to be satisfied about system construction and required  
reliability.  
本仕様書に記載された製品は、人命にかかわるような状況下で使用される機器あるいはシステムに用いられることを  
目的として設計・製造されたものではありません。本仕様書の製品を車両機器、船舶、航空宇宙、医療機器、原子力  
制御、海底中継機器あるいはシステムなど、特殊用途へのご利用をご検討の際は、システム構成及び要求品質に  
満足することをご確認の上、ご利用下さい。  
If there is any unclear matter in this specification, please contact Fuji Electric Co., Ltd.  
a
22  
MS6M 0673  
22  
H04-004-03  

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