EDI8F81026C85M6C [ETC]
1Mx8 STATIC RAM CMOS, MODULE; 1Mx8静态RAM CMOS ，模块
| 型号： | EDI8F81026C85M6C |
| 厂家： | 
ETC |
| 描述： | 1Mx8 STATIC RAM CMOS, MODULE |
| 文件： | 总6页 (文件大小：154K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EDI8F81026C
White Electronic Designs
1Mx8 STATIC RAM CMOS, MODULE
FEATURES
DESCRIPTION
The EDI8F81026C is an 8Mb CMOS Static RAM based
on two 512Kx8 Static RAMs mounted on a multi-layered
epoxy laminate (FR4) substrate.
ꢀ
1Mx8 bit CMOS Static RAM
• Access Times 20 through 35ns
• TTL Compatible Inputs and Outputs
• Fully Static, No Clocks
The EDI8F81026C is packaged in a 36 pin DIP and features
the JEDEC approved, revolutionary pinout.
ꢀ
ꢀ
High Density Packaging
All inputs and outputs are TTLcompatible and operate from
a single 5V supply.
• JEDEC Aproved, Revolutionary Pinout
• 36 Pin DIP, No. 179
Fully asynchronous, the EDI8F81026C requires no clocks
or refreshing for operation.
Single +5V ( 10ꢀ) Supply Operation
Pin Configuration
Pin Description
A0-A19
E#
W#
Address Inputs
Chip Enable
Write Enable
Output Enable
A0 1
A1 2
36 NC
35 A19
34 A18
33 A17
32 A16
31 G#
G#
A2 3
DQ0-DQ7 Common Data Input/Output
A3 4
VCC
VSS
NC
Power (+5V 10ꢀ%
Ground
No Connection
A4 5
E# 6
DQ0 7
DQ1 8
30 DQ7
29 DQ6
28 VSS
27 VCC
26 DQ5
25 DQ4
24 A15
23 A14
22 A13
21 A12
20 A11
19 A10
V
CC
9
VSS 10
DQ2 11
DQ3 12
W# 13
A5 14
A6 15
A7 16
A8 17
A9 18
Block Diagram
A0-A18
512k
DQ0-DQ7
W#
x 8
G#
512k
x 8
A19
E#
DECODER
July 2004
Rev. 0
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81026C
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS*
RECOMMENDED DC OPERATING CONDITIONS
Voltage on any pin relative to VSS
Operating Temperature TA (Ambient%
Commercial
-0.5V to 7.0V
Parameter
Sym
VCC
VSS
VIH
Min
4.5
0
2.2
-0.3
Typ
5.0
0
—
—
Max
5.5
0
6.0
0.8
Units
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
V
V
V
V
0°C to +70°C
-40°C to +85°C
-55°C to +125°C
2.0 Watt
Industrial
Storage Temperature
Power Dissipation
Output Current
VIL
20 mA
* Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
AC TEST CONDITIONS
Input Pulse Levels
VSS to 3.0V
5ns
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
1.5V
1TTL, CL =35pF
(Note: For tEHQZ, tGHQZ and tWLQZ, CL=5pF%
TRUTH TABLE
CAPACITANCE
(f=1.0MHz, VIN=VCC or VSS
%
G# E# W#
Mode
Standby
Output Deselect
Read
Output
High Z
High Z
DOUT
Power
CC2, ICC3
Parameter
Address Lines
Data Lines
Sym
CI
CD/Q
CC
Max
12
43
10
32
Unit
X
H
L
H
L
L
L
X
H
H
L
I
pF
pF
pF
pF
ICC1
ICC1
ICC1
Chip Enable Line
X
Write
DIN
Write and Output Enable Lines
CW
These parameters are sampled, not 100ꢀ tested.
DC ELECTRICAL CHARACTERISTICS
Parameter
Sym
ICC1
ICC2
ICC3
ILI
ILO
VOH
VOL
Conditions
Min
—
—
—
—
—
2.4
—
Typ*
212
35
20
—
—
—
—
Max
120
50
12
10
10
—
0.4
Units
mA
mA
mA
µA
µA
V
Operating Power Supply Current
Standby (TTL% Power Supply Current
Full Standby Power Supply Current (CMOS%
Input Leakage Current
Output Leakage Current
Output High Voltage
W#, E# = VIL, II/O = 0mA, Min Cycle
E > VIH, VIN < VIL, VIN > VIH
E > VCC-0.2V, VIN > VCC-0.2V or VIN< 0.2V
VIN = 0V to VCC
V I/O = 0V to VCC
IOH =-4.0mA
Output Low Voltage
IOL = 8.0mA
V
*Typical: TA = 25°C, VCC = 5.0V
July 2004
Rev. 0
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81026C
White Electronic Designs
AC CHARACTERISTICS READ CYCLE
Parameter
Symbol
20ns
25ns
35ns
Units
JEDEC
Alt.
tRC
tAA
tACS
tCLZ
tCHZ
tOH
tOE
tLOZ
tOHZ
Min
20
Max
Min
25
Max
Min
35
Max
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable to Output in Low Z (1%
Chip Disable to Output in High Z (1%
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1%
Output Disable to Output in High Z(1%
Note 1: Parameter guaranteed, but not tested
tAVAV
tAVQV
tELQV
tELQX
tEHQZ
tAVQX
tGLQV
tGLQX
tGHQZ
ns
ns
ns
ns
ns
ns
ns
ns
ns
20
20
25
25
35
35
3
3
3
3
3
3
3
3
3
10
8
12
10
10
15
12
12
8
FIGURE 2 – READ CYCLE 1 - W# HIGH, G#, E# LOW
tAVAV
A
ADDRESS 1
ADDRESS 2
tAVQX
tAVQV
Q
DATA 2
DATA 1
FIGURE 3 – READ CYCLE 2 - W# HIGH
tAVAV
A
tAVQV
tELQV
E#
tEHQZ
tGHQZ
tELQX
G#
Q
tGLQV
tGLQX
July 2004
Rev. 0
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81026C
White Electronic Designs
AC CHARACTERISTICS WRITE CYCLE
Parameter
Symbol
JEDEC
20ns
25ns
35ns
Units
Alt.
Min
Max
Min
Max
Min
Max
Write Cycle Time
tAVAV
tWC
20
25
35
ns
Chip Enable to End of Write
tELWH
tELEH
tAVWL
tAVEL
tAVWH
tAVEH
tWLWH
tWLEH
tWHAX
tEHAX
tWHDX
tEHDX
tCW
15
20
30
ns
tCW
15
20
30
ns
Address Setup Time
Address Valid to End of Write
Write Pulse Width
tAS
tAS
tAW
tAW
tWP
tWP
tWR
tWR
0
0
15
15
15
15
0
0
0
0
15
15
20
20
0
0
0
0
20
20
25
25
0
0
ns
ns
ns
ns
ns
ns
ns
ns
Write Recovery Time
Data Hold Time
tDH
tDH
0
0
0
0
0
0
ns
ns
Write to Output in High Z (1%
Data to Write Time
tWLQZ
tDVWH
tDVEH
tWHZ
tDW
tDW
0
12
12
8
0
15
15
12
0
20
20
15
ns
ns
ns
Output Active from End of Write (1%
tWHQX
tWLZ
3
3
3
ns
Note 1: Parameter guaranteed, but not tested.
FIGURE 4 – WRITE CYCLE 1 - W# CONTROLLED
tAVAV
A
E#
tELWH
tAVWH
tWHAX
tWHDX
tWLWH
W#
tAVWL
tDVWH
DATA VALID
D
tWHQX
tWLQZ
HIGH Z
Q
July 2004
Rev. 0
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81026C
White Electronic Designs
FIGURE 5 – WRITE CYCLE 2 E# CONTROLLED
tAVAV
A
tAVEL
tELEH
E#
tAVEH
tEHAX
tEHDX
tWLEH
W#
tDVEH
D
Q
DATA VALID
HIGH Z
ORDERING INFORMATION
Standard Power
EDI8F81026C20M6C
EDI8F81026C85M6C
EDI8F81026C35M6C
Speed (ns)
Package No.
Height*
20
25
35
179
179
179
7.37 (0.290"%
7.37 (0.290"%
7.37 (0.290"%
Note: To order an Industrial grade product substitute the letter C in the Suffix with the letter I,
eg. EDI8F81026C20M6C becomes EDI8F81026C20M6I.
PACKAGE DESCRIPTION
Package No. 179: 36 Pin Dual-in-line Package
55.50
(2.185% MAX.
15.88
(0.625%
MAX.
P1
3.81
(0.150%
REF.
7.34
(0.290%
MAX.
15.75 (0.620%
14.99 (0.590%
2.54 (0.100% TYP.
4.45 (0.175%
3.18 (0.125%
17 X 2.54 (0.100%
43.18 (1.700% REF.
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES%.
July 2004
Rev. 0
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81026C
White Electronic Designs
Document Title
1M X 8 SRAM Module
Revision History
Rev #
History
Release Date Status
Rev 0
0.1 Updated datasheet format
0.2 Added package height
7-2004
Final
0.3 Added metric measurements
0.4 Added new document title page
July 2004
Rev. 0
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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