ML22P808 [ETC]
LAPIS Semiconductor ADPCM Algorithm-Based Speech Synthesis LSI;
| 型号： | ML22P808 |
| 厂家： | 
ETC |
| 描述： | LAPIS Semiconductor ADPCM Algorithm-Based Speech Synthesis LSI PC |
| 文件： | 总41页 (文件大小：601K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FEDL2280XFULL-04
Issue Date: Nov.16, 2009
ML22808/ML22804/ML22802-XXX
ML22P808/ML22P804/ML22P802
LAPIS Semiconductor ADPCM Algorithm-Based Speech Synthesis LSI
GENERAL DESCRIPTION
The ML22808/ML22804/ML22802-xxx are speech synthesis LSI devices that have P2ROM for storing voice
data. The voice output component has an ADPCM2 decoder to enable high speech quality, a D/A converter,
and a low-pass filter.
It is easy to configure a speech synthesizer by connecting a power amplifier and a CPU externally.
The ML22808/ML22804/ML22802-xxx allow selection of a playback method from among the 8-bit PCM,
non-linear 8-bit PCM, 16-bit PCM, and 4-bit ADPCM2 algorithms and enable volume control.
The ML22808/ML22804/ML22802-xxx, supported by the ROM codes, are the products in which written speech
data is included.
The ML22P808/ML22P804/ML22P802 are OTP products in which speech data can be easily written by the user
using a dedicated writer. These devices are suitable for applications in developing products, manufacturing of a
wide variety of products in small quantities, and requiring quick turn around.
• Capacity of the internal memory device and the maximum vocal reproduction time (when 4-bit ADPCM2
algorithm used)
Maximum vocal reproduction time (sec)
Product name
ROM capacity
FSAM = 4.0 kHz
FSAM = 8.0 kHz
FSAM = 16 kHz
ML22808-XXX/ML22P808
ML22804-XXX/ML22P804
ML22802-XXX/ML22P802
8 Mbits
4 Mbits
2 Mbits
524
262
131
262
131
65
131
65
32
• Speech synthesis method:
An algorithm can be specified for each phrase from among the following:
4-bit ADPCM2
8-bit Nonlinear PCM
8-bit PCM/16-bit PCM
• Sampling frequency:
A fsam value can be specified fro each phrase.
4.0/8.0/16.0 kHz, 5.3/10.7 kHz, 6.4/12.8 kHz
• Built-in low-pass filter and 12-bit D/A converter
• CPU command interface:
3-wired serial / clock synchronous
• Maximum number of phrases: 256 phrases, from 00h to FFh (per bank)
• Memory bank switching:
• Memory bank selecting:
Enabled between bank 1 and bank 4 using the SEL0 and SEL1 pins
Selectable between bank 1 and bank 4 by setting the SEL0 and SEL1 pins
(Other than ML22802/ML22P802)
Selectable between bank1 and bank 2 (ML22802/ML22P802)
Can be adjusted in 16 levels or set to OFF
LOOP command
• Volume control:
• Repeat function:
• Source oscillation frequency: 4.096 MHz
• Power supply voltage: 2.7 to 3.6 V
• Operating temperature range: -20 to +85°C
• Package:
30-pin plastic SSOP (SSOP30-P-56-0.65-K)
• Product name:
ML22P808MB, ML22P804MB, ML22P802MB
ML22808-xxxMB, ML22804-xxxMB, ML22802-xxxMB
(xxx indicates a ROM code number)
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The table below summarizes the differences between the ML2216 and the ML2280X.
Item
CPU interface
ML2216
Serial
ML2280X
Serial
4-bit ADPCM2
8-bit straight PCM
8-bit non-linear PCM
16-bit straight PCM
256
4-bit ADPCM2
8-bit straight PCM
8-bit non-linear PCM
16-bit straight PCM
256 up to 1024 (per bank)
4.0/5.3/6.4/
Playback method
Maximum number of phrases
Sampling frequency (kHz)
4.0/5.3/6.4/
8.0/10.7/12.8
16.0
8.0/10.7/12.8
16.0
4.096 MHz (has a crystal
oscillator circuit built-in)
Current-type 12-bit
3D comb filter
Built-in type;
4.096 MHz (has a crystal
oscillator circuit built-in)
Current-type 12-bit
3D comb filter
Clock frequency
D/A converter
Low-pass filter
Speaker driving amplifier
No
0.3W (at 8Ω, VDD=5V)
Yes
Edit ROM
Yes
Volume control
16 levels
16 levels
Yes
Yes
20 to 1024 ms (4 ms steps)
Yes
Silence insertion
20 to 1024 ms (4 ms steps)
Yes
Repeat function
Interval at which a seam is
silent during continuous
playback (*1)
No
No
Memory bank switching
Package
No
Yes
44-pin QFP
30-pin SSOP
*1: Continuous playback as shown below is possible.
1 phrase
1 phrase
No silence interval
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BLOCK DIAGRAM
ML22808/ML22804/ML22P808/ML22P804:
Address Controller
19-/20-bit Multiplexer
4-/8-Mbit ROM
VPP
DVDD
PVDD
PGND
DGND
Phrase Address Latch
19-/20-bit
Address Counter
ADPCM Synthesizer
CS
SCK
DI
PCM Synthesizer
LPF
BUSY
NCR
I/O
DIPH
Timing
Controller
Interface
SEL0
SEL1
TEST0
12-bit DAC
TEST1
OSC
RESET
TESTO1
TESTO2
XT
XT
AOUT
AVDD AGND
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ML22802/ML22P802:
Address Controller
18-bit Multiplexer
2-Mbit ROM
VPP
DVDD
PVDD
PGND
DGND
Phrase Address Latch
18-bit
Address Counter
ADPCM Synthesizer
CS
SCK
PCM Synthesizer
LPF
DI
BUSY
NCR
I/O
Interface
DIPH
Timing
Controller
SEL
TEST0
TEST1
RESET
TESTO1
TESTO2
12-bit DAC
OSC
XT XT
AOUT
AVDD AGND
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PIN CONFIGURATION (TOP VIEW)
ML22808/ML22804/ML22P808/ML22P804:
XT
XT
1
2
3
4
5
6
7
8
9
30 DVDD
29 AVDD
28 AOUT
27 NC
26 AGND
25 VPP
24 PGND
23 TESTO1
22 PVDD
21 NC
TEST0
TEST1
DGND
DIPH
SEL0
SEL1
CS
SCK 10
DI 11
20 NC
BUSY 12
NCR 13
RESET 14
NC 15
19 PGND
18 TESTO0
17 NC
16
NC
NC: No Connection
30-Pin Plastic SSOP
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ML22802/ML22P802:
XT
XT
1
2
3
4
5
6
7
8
9
30 DVDD
29 AVDD
28 AOUT
27 NC
26 AGND
25 VPP
TEST0
TEST1
DGND
DIPH
SEL
TEST2
CS
24 PGND
23 TESTO1
22 PVDD
21 NC
SCK 10
DI 11
20 NC
BUSY 12
NCR 13
RESET 14
NC 15
19 PGND
18 TESTO0
17 NC
16 NC
NC: No Connection
30-Pin Plastic SSOP
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PIN DESCRIPTION
Pin
Symbol
Type
I
Description
Connects to a crystal or a ceramic resonator.
A feedback resistor of around 1 MΩ is built in between this XT pin and
XT pin. When using an external clock, input the clock from this pin.
If a crystal or a ceramic resonator is used, connect it as close to the LSI
as possible.
1
XT
Connects to a crystal or a ceramic resonator.
When using an external clock, leave this pin open.
If a crystal or a ceramic resonator is used, connect it as close to the LSI
as possible
2
XT
O
3
4
5
TEST0
TEST1
DGND
I
I
Input pin for testing. Tie this pin at a “L” level (DGND level).
Input pin for testing. Tie this pin at a “L” level (DGND level).
Digital ground pin.
—
Pin for choosing between rising edges and falling edges as to the edges
of the SCK pulses used for shifting serial data input to the DI pin into the
inside of the LSI. When this pin is at a “L” level, DI input data is shifted
into the LSI on the rising edges of the SCK clock pulses; when this pin is
at a “H” level, DI input data is shifted into the LSI on the falling edges of
the SCK clock pulses.
6
DIPH
SEL0
I
I
Memory bank selecting pin. Enabled when memory bank selecting is
specified at the time the PUP1 or PUP2 command is input. Do not
change during speech playback (when the BUSY pin is at “L”)
ML22808/ML22804/ML22P808/ML22P804:
7
(SEL)
Memory bank selecting pin. Enabled when memory bank selecting is
specified at the time the PUP1 or PUP2 command is input. Do not
change during speech playback (when the BUSY pin is at “L”)
ML22802/ML22P802:
Input pin for testing. Tie this pin at “L” (DGND level).
Chip select input pin.
8
SEL1
I
I
(TEST2)
9
CS
A “L” level on this pin enables the serial interface.
Serial clock input pin.
10
11
SCK
DI
I
I
Serial data input pin.
Pin that outputs a signal that indicates the phrase playback status.
If the LSI is playing a phrase, this pin outputs a “L” level.
If the LSI is in a standby state, this pin outputs a “H” level.
Pin that outputs a signal that indicates whether command input is
enabled or disabled.
If command input is enabled, this pin outputs a “H” level.
If command input is disabled, this pin outputs a “L” level.
During a reset input, the entire circuit is stopped and enters a power
down state.
12
BUSY
O
13
NCR
O
14
RESET
I
Upon power-on, input a “L” level to this pin. Put this pin into a “H” level
after the power supply voltage is stabilized.
18
TESTO0
PGND
O
Output pin for testing. Leave this pin open.
19,24
—
Ground pin for the internal P2ROM.
Power supply pin for the internal P2ROM.
Connect a capacitor of 0.1 μF or more between this pin and PGND.
Output pin for testing. Leave this pin open.
22
23
PVDD
—
O
TESTO1
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Pin
25
Symbol
VPP
Type
I
Description
VPP power supply pin used for writing data to the internal P2ROM.
Tie this pin at the DGND level.
26
28
AGND
AOUT
—
O
Analog ground pin.
Playback signal output pin.
Analog power supply pin.
Connect a capacitor of 0.1 μF or more between this pin and PGND.
Digital power supply pin.
29
30
AVDD
DVDD
—
—
Connect a capacitor of 0.1 μF or more between this pin and PGND.
Note:
The pin names in the parentheses are applied to ML22802/ML22P802.
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ABSOLUTE MAXIMUM RATINGS
(DGND = PGND = AGND = 0 V)
Parameter
Digital power supply
voltage
Symbol
Condition
Ta = 25°C
Rating
Unit
DVDD, PVDD
–0.3 to +5.0
V
Analog power supply
voltage
AVDD
VIN
–0.3 to +5.0
–0.3 to DVDD+0.3
1.3
V
V
Ta = 25°C
When a JEDEC2-layer
board is mounted
Input voltage
Power dissipation
PD
W
Output short-circuit
current
ISC
—
—
10
mA
°C
Storage temperature
TSTG
–55 to +150
RECOMMENDED OPERATING CONDITIONS
(DGND = PGND = AGND = 0 V)
Parameter
Digital power supply
voltage
Symbol
Condition
—
Range
Unit
DVDD, PVDD
2.7 to 3.6
V
Analog power supply
voltage
AVDD
TOP
—
—
2.7 to 3.6
V
Operating temperature
-20 to +85
Typ.
°C
Min.
3.5
Max.
4.5
Master clock frequency
fOSC
—
—
MHz
pF
4.096
External crystal
oscillator capacitance
Cd, Cg
15
30
45
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ELECTRICAL CHARACTERISTICS
DC Characteristics
DVDD = PVDD = AVDD = 2.7 to 3.6 V, DGND = PGND = AGND = 0 V, Ta = -20 to +85°C
Parameter
Symbol
Condition
Min.
0.86 ×
VDD
Typ.
Max.
Unit
“H” input voltage
VIH
—
—
—
V
0.14 ×
VDD
—
“L” input voltage
VIL
—
—
—
V
“H” output current 1
“H” output current 2 (*1)
“L” output current 1
“L” output current 2 (*1)
“H” input current 1
“H” input current 2 (*2)
“L” input current 1
“L” input current 2 (*2)
“H” output leakage
current (*3)
VOH1
VOH2
VOL1
VOL2
IIH1
IOH = −1 mA
IOH = −100 µA
IOL = 2 mA
VDD – 0.4
VDD – 0.4
—
—
—
V
V
—
—
0.4
0.4
10
V
IOL = 100 µA
VIH = DVDD
VIH = DVDD
VIL = DGND
VIL = DGND
—
—
V
—
—
µA
µA
µA
µA
IIH2
0.3
2.0
—
15
IIL1
–10
—
IIL2
–15
−2.0
–0.3
ILOH
ILOL
IDD
VIH = DVDD
—
–10
—
—
—
—
1
10
—
10
20
µA
µA
mA
µA
“L” output leakage
current (*3)
VIL = DGND
Supply current during
playback
fOSC = 4.096 MHz
No output load
Power-down supply
current
IDDS
Ta = -20 to +85°C
—
Note: The input voltages and input currents apply to all the input pins except the XT pin.
The output voltages apply to all the output pins except the AOUT pin.
*1: Applies to the XT pin.
*2: Applies to the XT pin.
*3: Applies to the TESTO0 and TESTO1 pins.
Analog Section Characteristics
DVDD = PVDD = AVDD = 2.7 to 3.6 V, DGND = PGND = AGND = 0 V, Ta = -20 to +85°C
Parameter
Symbol
Condition
During silence
playback
Min.
Typ.
Max.
Unit
kΩ
V
AOUT output load resistance
AOUT output voltage range
RLAO
5
—
—
VAOUT
No output load
0.07 × AVDD
—
0.64 × AVDD
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AC Characteristics
DVDD = AVDD = 2.7 to 3.6 V, DGND = PGND = AGND = 0 V, Ta = -20 to +85°C
Parameter
Symbol
fduty
Condition
—
Min.
40
Typ.
50
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
60
Unit
%
Master clock duty cycle
RESET input pulse width
tRST
—
1
—
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCK setup time for falling edge of CS
SCK hold time for falling edge of CS
Data setup time for rising edge of SCK
Data hold time for rising edge of SCK
Data setup time for rising edge of SCK
Data hold time for rising edge of SCK
SCK “H” level pulse width
tCKS
—
200
200
50
—
tCKH
tDIS1
tDIH1
tDIS2
tDIH2
tSCKH
tSCKL
tDN1
—
—
DIPH = “L”
DIPH = “L”
DIPH = “H”
DIPH = “H”
—
—
50
—
50
—
50
—
200
200
—
—
SCK “L” level pulse width
—
—
NCR output delay time for rising edge of SCK
NCR output delay time for falling edge of SCK
BUSY output delay time for rising edge of SCK
BUSY output delay time for falling edge of SCK
SEL0 and SEL1 setup time for falling edge of
BUSY (*4)
DIPH = “L”
DIPH = “H”
DIPH = “L”
DIPH = “H”
Memory bank
function used
Memory bank
function used
fOSC = 4.096 MHz;
At STOP, SLOOP,
CLOOP or VOL
command input
fOSC = 4.096 MHz;
During continuous
playback;
150
150
150
150
tDN2
—
tDB1
—
tDB2
—
tSB
tBS
1
1
—
—
—
—
μs
μs
SEL0 and SEL1 hold time for falling edge of
BUSY (*4)
Command input interval time
tINT
6
—
—
—
μs
Command input enable time
tcm
—
10
ms
At SLOOP input
“L” level output time of NCR and BUSY at
PUP1 command input
tPUP1
tPUP2
tPD1
When a 4.096 MHz
external clock is
input
1.9
65
—
2.0
66
—
2.1
67
6
ms
ms
μs
“L” level output time of NCR and BUSY at
PUP2 command input
“L” level output time of NCR and BUSY at
PDWN1 command input
fOSC = 4.096 MHz
“L” level output time of NCR and BUSY at
PDWN2 command input
tPD2
63
—
64
—
65
6
ms
NCR “L” level output time 1 (*1)
tNCR1
fOSC = 4.096 MHz
fOSC = 4.096 MHz;
After phrase data
input by the PLAY
command
μs
NCR “L” level output time 2 (*2)
tNCR2
—
—
4.125
—
4.38
6
ms
BUSY “L” level output time (*3)
tBSY
fOSC = 4.096 MHz
μs
Note: Output pin load capacitance = 55 pF (Max)
*1: Applies to cases where a command is input except after a PUP1, PUP2, PDWN1, PDWN2, SLOOP, or
CLOOP command input or except after a phrase data input by the PLAY command.
*2: Indicates the time when the sampling frequency of the phrase played last was 4 kHz. For any other
sampling frequency, the NCR “L” output time 2 is proportional to that sampling frequency. After reset
release, a sampling freuency is set to 4 kHz.
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*3: Applies to when a command is input except after a PUP1, PUP2, PDWN1, PDWN2, SLOOP, or CLOOP
command input or except after a phrase data input by the PLAY command, providing no phrase is being
played.
*4: For ML22802/ML22P802, applied to the SEL pin.
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TIMING DIAGRAMS
Serial CPU Interface Timing (When DIPH = “L”)
VIH
CS
VIL
tCSH
tESCK
tSCKH
VIH
VIL
SCK
DI
tDIS1
tDIH1
tSCKL
VIH
VIL
tDN1
VOH
VOL
NCR
tDB1
VOH
VOL
BUSY
Serial CPU Interface Timing (When DIPH = “H”)
VIH
CS
VIL
tCSH
tESCK
tSCKL
VIH
VIL
SCK
DI
tDIS1
tDIH1
tSCKH
VIH
VIL
tDN1
VOH
VOL
NCR
tDB1
VOH
VOL
BUSY
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Power-On Timing
VDD
VDD
tRST
VIH
VIL
RESET
Processing reset
Power down
Status
Oscillation is stopped at power-on.
Power-Up Timing
• PUP1 command input
CS
SCK
DI
VOH
VOL
NCR
tPUP1
VOH
VOL
BUSY
Oscillation
stopped
Oscillating
XT•XT
1V
AOUT
GND
Oscillation stabilized
Awaiting command
Power down
Status
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• PUP2 command input
CS
SCK
DI
VOH
VOL
NCR
BUSY
XT•XT
tPUP2
VOH
VOL
Oscillation stopped
Power down
Oscillating
1V
AOUT
Status
GND
Suppressing pop noise
Awaiting command
Oscillation stabilized
Power-Down Timing
• PDWN1 command input
CS
SCK
DI
VOH
NCR
VOL
tPD1
VOH
VOL
BUSY
Oscillation
stopped
Oscillating
XT•XT
1V
AOUT
GND
Command is being
processed
Awaiting command
Power down
Status
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• PDWN2 command input
CS
SCK
DI
VOH
NCR
VOL
tPD2
VOH
VOL
BUSY
XT•XT
AOUT
Oscillation
stopped
Oscillating
1V
GND
Pop noise is being
suppressed
Awaiting command
Power down
Status
Command is being processed
• RESET input
RESET
BUSY
tRST
Oscillating
Playing
Oscillation stopped
XT•XT
AOUT
Status
GND
Power down
Note:
The same timing applies in cases where the RESET signal is input during waiting for command.
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• Playback Timing by the PLAY Command
PLAY command
1st byte
PLAY command
2nd byte
CS
SCK
DI
tSB
tBS
SEL1
SEL0
tNCR1
tNCR2
VOH
VOL
NCR
(*1)
tBSY
VOH
VOL
BUSY
AOUT
Status
1V
Address is being
controlled
Awaiting command
Awaiting command
Command standby
Playing
Command is being processed
Note:
Length of a “L” interval of BUSY is = tNCR2 + voice reproduction time length.
• Playback Stop Timing
STOP command
CS
SCK
DI
tNCR1
VOH
NCR
VOL
VOH
BUSY
VOL
1V
AOUT
Playing
Awaiting command
Status
Command is being processed
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• Continuous Playback Timing by the PLAY Command
PLAY command
2nd byte
PLAY command PLAY command
1st byte 2nd byte
CS
SCK
DI
tcm
tNCR1
tNCR2
VOH
VOL
(*1)
NCR
BUSY
1V
AOUT
Awaiting command
Playing phrase 1
Playing phrase 2
Status
Address is being controlled
Address is being controlled
*1: The “L” level period of the NCR pin during playback varis depending on the timing at which the PLAY
command is input.
• Silence Insertion Timing by the MUON Command
PLAY command
2nd byte
MUON command MUON command
1st byte 2nd byte
PLAY command PLAY command
1st byte 2nd byte
CS
SCK
DI
tcm
tNCR1
tNCR1
tNCR2
VOH
VOL
(*1)
(*1)
NCR
BUSY
1V
AOUT
Status
Awaiting command
Playing
Silence is being inserted
Playing
Address is being controlled
Waiting for silence insertion to be finished
*1: The “L” level period of the NCR pin during playback or silence insertion operation varis depending on
the timing at which the MUON command is input.
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• Repeat Playback Set/Release Timing by the SLOOP and CLOOP Commands
SLOOP command
CLOOP command
PLAY command
2nd byte
VIH
VIL
CS
tINT
SCK
DI
tcm
tNCR2
VOH
VOL
NCR
BUSY
1V
AOUT
Status
Awaiting command
Address is being controlled
Playing
Playing
Awaiting command
Address is being controlled
Command is being processed
• Volume Change Timing by the VOL Command
VOL command
CS
SCK
DI
tNCR1
VOH
NCR
VOL
tBSY
VOH
BUSY
VOL
Awaiting command
Command is being processed
Awaiting command
Status
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FUNCTIONAL DESCRIPTION
Serial CPU Interface
Command data can be input through the DI pin by signals input through the CS and SCK pins.
Setting the CS pin to a “L” level enables the serial CPU interface.
After the CS pin is set to a “L” level, the command data, which is synchronized with the SCK clock signal, is
input through the DI pin from the MSB. The command data input through the DI pin is shifted into the LSI on
the rising or falling edges of the SCK clock pulses and the command is executed by the rising or falling edge of
the eighth pulse of the SCK clock.
Choosing between rising edges and falling edges of the clock pulses input through the SCK pin is determined by
the signal input through the DIPH pin:
- When the DIPH pin is at a “L” level, the data input through the DI pin is shifted into the LSI on the rising
edges of the SCK clock pulses.
- When the DIPH pin is at a “H” level, the data input through the DI pin is shifted into the LSI on the falling
edges of the SCK clock pulses.
It is possible to input command data in the LSI even by holding the CS pin continuously at a “L” level.
However, if unexpected pulses caused by noise are induced through the SCK pin, SCK clock pulses are
incorrectly counted. As a result, command data cannot be input correctly. Setting the CS pin to a “H” level
returns the count of the SCK clock pulses to the initial state.
Command and Data Input Timings
• SCK rising edge operation (when DIPH pin = “L” level)
CS
SCK
D7 D6 D5 D4 D3 D2 D1 D0
(MSB) (LSB)
DI
CS
SCK
DI
D7 D6 D5 D4 D3 D2 D1 D0
(MSB) (LSB)
• SCK falling edge operation (when DIPH pin = “H” level)
CS
SCK
D7 D6 D5 D4 D3 D2 D1 D0
(MSB) (LSB)
DI
CS
SCK
DI
D7 D6 D5 D4 D3 D2 D1 D0
(MSB) (LSB)
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Command List
Each command is configured in 1-byte (8-bit) units. Each of the PLAY and MUON command forms one
command by two bytes each.
Command D7 D6 D5 D4 D3 D2 D1 D0
Description
Instantly shifts the device currently powered
down to a command wait state.
PUP1
0
0
0
0
0
0
0
0
1
0
1
0
⎯
⎯
⎯
⎯
⎯
⎯
S1
S1
⎯
S0
Suppresses pop noise and shifts the device
S0 currently powered down to a command wait
state.
PUP2
Instantly shifts the device from a command wait
state to a power down state.
PDWN1
PDWN2
⎯
Suppresses pop noise and shifts the device
from a command wait state to a power down
state.
0
0
0
1
1
0
1
0
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Phrase-specified playback start command.
Use the data of the 2nd byte to specify a
phrase number.
PLAY
STOP
MUON
F7
0
F6
1
F5
1
F4
0
F3
⎯
⎯
F2
⎯
⎯
F1
⎯
⎯
F0
⎯
⎯
Playback stop command.
Inserts silence.
Use the data of the 2nd byte to specify the
length of silence.
0
1
1
1
M7 M6 M5 M4 M3 M2 M1 M0
Command for setting the repeat playback
mode.
Enabled during playback.
SLOOP
1
0
0
0
⎯
⎯
⎯
⎯
⎯
Command for releasing the repeat playback
mode.
If the STOP command is input, repeat playback
mode is released automatically.
CLOOP
VOL
1
1
0
0
0
1
1
0
⎯
⎯
⎯
V3
V2
V1
V0 Volume setting command.
S1, S0
F7–F0
: Number of memory banks (*)
: Phrase address
M7–M0
V3–V0
: Length of silence period
: Sound volume
* S0 is fixed to “0” for ML22802/ML22P802.
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Power Down Function
This LSI has the power down function. When in a power down state, all the circuits including the oscillator
circuit stop operating, thus minimizing the supply current. When supplying an external clock to the XT pin, tie
the pin at a “L” level during power down.
The figure below shows a equivalent circuit to an oscillator circuit.
Power down signal
(During power down = “L”)
Master clock inside the
LSI
approx. 1 MΩ
XT
XT
The Initial Status at Reset Input and the Status at Power Down of Output Pins
The status of relative output pins at reset input and power down is shown below.
Digital
output pin
Analog
output pin
State
State
NCR
“H” level
“H” level
AOUT
GND level
BUSY
Voice Synthesis Algorithm
The ML22804/ML22808-xxx contain four algorithm types to match the characteristic of playback voice: 4-bit
ADPCM2 algorithm, 8-bit straight ADPCM2 algorithm, 8-bit non-linear PCM algorithm, and 16-bit straight
PCM algorithm.
Key feature of each algorithm is described in the table below.
Voice synthesis
Applied waveform
Feature
algorithm
LAPIS Semiconductor ’s specific speech synthesis algorithm
of improved waveform follow-up with improved 4-bit ADPCM.
Algorithm, which plays back mid-range of waveform as 10-bit
equivalent voice quality.
4-bit ADPCM2
Normal voice waveform
8-bit Nonlinear PCM
High-frequency
components inclusive
sound effect etc.
8-bit PCM
Normal 8-bit PCM algorithm
16-bit PCM
Normal 16-bit PCM algorithm
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Memory Allocation and Creating Voice Data
The ROM is partitioned into four data areas: voice (i.e., phrase) control area, test area, voice area, and edit ROM
area.
The voice control area manages the ROM’s voice data. It contains data for controlling the start/stop addresses
of voice data for 256 phrases, use/non-use of the edit ROM function and so on.
The test area contains data for testing.
The voice area contains actual waveform data.
The edit ROM area contains data for effective use of voice data. For the details, refer to the section of “Edit
ROM Function.”
No edit ROM area is available unless the edit ROM is used.
The ROM data is created using a dedicated tool.
ROM address (ML22808/ML22804/ML22802-XXX, ML22P808/ML22P804/ML22P802)
0x00000
Voice control area
(Fixed16 Kbits)
0x007FF
0x00800
Test area
0x00807
0x00808
Voice area
Max: 0xFFFFF
Edit ROM area
Depends on creation
of ROM data.
Max: 0xFFFFF
Playback Time and Memory Capacity
The playback time depends upon the memory capacity, sampling frequency, and playback method.
The equation showing the relationship is given below.
The equation below gives the playback time when the edit ROM function is not used.
(Bit length is 2 bits for 2-bit ADPCM2; 4 bits for 4-bit ADPCM2; 8 bits for PCM.)
Example
: Let the sampling frequency be 16 kHz and 4-bit ADPCM2 algorithm. Then the playback time is
approx. 65 seconds, as shown below.
1.024 × (4096 – 16) (Kbit)
16 (kHz) × 4 (bit)
Playback time =
≅ 65 (sec)
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Edit ROM Function
The edit ROM function makes it possible to play back multiple phrases in succession. The following functions
are set using the edit ROM function:
• Continuous playback:
There is no limit to the number of times a continuous playback can be
specified. It depends on the memory capacity only.
20 to 1024 ms
• Silence insertion function:
Using the edit ROM function enables an effective use of the memory capacity of voice ROM.
Below is an example of the ROM configuration in the case of using the edit ROM function.
Example 1: Phrases Using the Edit ROM Function
Phrase 1
Phrase 2
Phrase 3
Phrase 4
Phrase 5
A
A
E
E
A
B
D
C
D
B
C
D
D
B
D
Silence
E
C
D
Example 2: Example of ROM Data Where Contents of Example 1 Are Stored in ROM
Address control area
A
B
C
D
E
F
Editing area
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Memory Bank Selecting Function
Using the memory bank selecting function, the internal ROM area in the ML22808/ML22804/ML22P808/
ML22P804 can be divided into up to four areas. If four banks are used, up to 1024 phrases can be played
back since each bank is capable of up to 256 phrases. Using the memory bank selecting function, the internal
ROM area in the MLl22802/ML22P802 can be divided into up to two areas. If two banks are used, up to 512
phrases can be played back because each bank is capable of up to 256 phrases. Using this function, it is
possible to put together multiple ROM codes into one code.
In the case of the ML22808/ML22804/ML22P808/ML22P804, the memory is used by setting the SEL1 and
SEL0 pins and in the case of the ML22802/ML22P802, the memory is used by setting the SEL pin, as shown in
the tables below. In addition, when playing phrases, it is necessary to specify the number of memory banks by
PUP1 or PUP2.
“⎯“ in the tables below means Don’t Care, whether 0 or 1.
Note that, if the memory bank selecting fnction is used, it is necessary to divide data when ROM data is created
and store the divided data in the specified area in advance.
For one memory banks:
SEL1 SEL0 ML22P808/ML22808-XXX ML22P804/ML22804-XXX
00000h -FFFFFh 00000h – 7FFFFh
SEL ML22P802/ML22802-XXX
00000h – 3FFFFh
⎯
⎯
⎯
For two memory banks:
SEL1 SEL0 ML22P808/ML22808-XXX ML22P804/ML22804-XXX
SEL ML22P802/ML22802-XXX
⎯
⎯
0
1
00000h – 7FFFFh
80000h – FFFFFh
00000h – 3FFFFh
40000h – 7FFFFh
0
1
00000h – 1FFFFh
20000h – 3FFFFh
For four memory banks:
SEL1 SEL0 ML22P808/ML22808-XXX ML22P804/ML22804-XXX
0
0
1
1
0
1
0
1
00000h–3FFFFh
40000h–7FFFFh
80000h–BFFFFh
C0000h–FFFFFh
00000h–1FFFFh
20000h–3FFFFh
40000h–5FFFFh
60000h–7FFFFh
Shown below is an example of memory division for the M22808 (8 Mbits).
Bank 1
Bank 1
Bank 1
Capacity: 8 Mbits
Max. number of
phrases: 256
Capacity: 4 Mbits
Max. number of
phrases: 256
Capacity: 2 Mbits
Max. number of
phrases: 256
0–3FFFFh
40000–7FFFFh
80000–BFFFFh
C0000–FFFFFh
Bank 2
Capacity: 2 Mbits
Max. number of
phrases: 256
Bank 2
Bank 3
Capacity: 4 Mbits
Max. number of
phrases: 256
Capacity: 2 Mbits
Max. number of
phrases: 256
Bank 4
Capacity: 2 Mbits
Max. number of
phrases: 256
Number of memory
divisions: 1
Number of memory
divisions: 2
Number of memory
divisions: 4
4-Mbit × 2 areas
2-Mbit × 4 areas
8-Mbit × 1 area
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Command Function Descriptions
1.
PUP1 command
• command
0
0
0
0
⎯
⎯
S1
S0
PUP1 command is used to shift the ML22804/ML22808-xxx from power down state to the command standby
state.
In the power down state, any command input other than PUP1 and PUP2 will be ignored.
The ML22804/ML22808-xxx enters the power down state in any of the following conditions:
1) When power is turned on
2) At RESET input
3) When both NCR and BUSY go to a “H” level after inputting the power down command.
The relationship between S1/S0 and the memory bank is as follows.
S1
S0
ML22808/ML22804/ML22P808/ML22P804
ML22802/ML22P802
Uses the entire space of the internal memory Uses the entire space of the internal memory.
as one area.
0
0
Divides the internal memory into two areas to Setting prohibited (fix S0 to “0”)
select the memory areas with the SEL0 pin.
0
1
Divides the internal memory into four areas to Divides the internal memory into two areas to
select the memory areas with the SEL0 and select the memory areas with the SEL pin.
SEL1 pins.
1
1
0
1
Setting prohibited
Setting prohibited (Fix S0 to “0”.)
CS
SCK
DI
NCR
BUSY
Oscillation stopped
Oscillating
XT•XT
1V
AOUT
GND
Oscillation stabilized
Awaiting command
Status
Power down
The oscillation starts when the PUP1 command is input and, after an elapse of about 2 ms oscillation
stabilization time, the AOUT output abruptly changes from GND level to approx. 1 V level. Therefore, this
abrupt change in AOUT output will cause generation of pop noise if the AOUT output is not processed outside.
To suppress pop noise, input the PUP2 command.
Any command that is input during oscillation stabilization will be ignored. However, if a “L” level is input to
the RESET pin, the device enters the power down state immediately.
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2.
PUP2 command
• command
0
0
0
1
⎯
⎯
S1
S0
PUP2 command is used to shift the ML22804/ML22808-xxx from the power down state to the command
standby state.
In the power down state, any command input other than PUP1 and PUP2 will be ignored.
The ML22804/ML22808-xxx enters the power down state in any of the following conditions:
1) When power is turned on
2) At RESET input
3) When both NCR and BUSY go to a “H” level after inputting the power down command.
The relationship between S1/S0 and the memory bank is as follows.
S1
0
S0
0
ML22808/ML22804/ML22P808/ML22P804
Uses the entire space of the internal memory.
ML22802/ML22P802
Uses the entire space of the internal memory.
Divides the internal memory into two areas to Setting prohibited (fix S0 to “0”)
switch the memory areas with the SEL0 pin.
0
1
1
1
0
1
Divides the internal memory into four areas to Divides the internal memory into two areas to
switch the memory areas with the SEL0 and select the memory areas with the SEL pin.
SEL1 pins.
Setting prohibited (Operation is the same as Setting prohibited (Fix S0 to “0”.)
above.)
CS
SCK
DI
NCR
BUSY
Oscillation stopped
Oscillating
XT•XT
1V
AOUT
GND
Pop noise is being
suppressed
Awaiting command
Status
Power down
Oscillation stabilized
The oscillation starts when the PUP2 command is input and, after an elapse of about 2 ms oscillation
stabilization time, the AOUT output gradually changes from GND level to approx. 1 V level in about 64 ms.
Any command that is input during oscillation stabilization will be ignored. However, if a “L” level is input to
the RESET pin, the device enters the power down state immediately.
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3.
PDWN1 command
• command
0
0
1
0
⎯
⎯
⎯
⎯
The PDWN1 command is used to shift the ML22804/ML22808-xxx from a command wait state (both NCR and
BUSY are “H”) to a power down state. However, this command is disabled during playback.
To resume playback after the ML22804/ML22808-xxx has shifted to the power down state, first input the PUP1
or PUP2 command and then input the PLAY command.
CS
SCK
DI
NCR
BUSY
Oscillation
stopped
Oscillating
XT•XT
1V
AOUT
GND
Command is being
processed
Awaiting command
Status
Power down
After the PDWN1 command is input and after an elapse of command processing time, the oscillation stops and
the AOUT output abruptly changes from approx. 1 V level to GND level. This abrupt change in the AOUT
output will cause generation of pop noise if the AOUT output is not processed outside. To suppress pop noise,
input the PDWN2 command.
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4.
PDWN2 command
• command
0
0
1
1
⎯
⎯
⎯
⎯
The PDWN2 command is used to shift the ML22804/ML22808-xxx from a command wait state (both NCR and
BUSY are “H”) to a power down state. However, this command is disabled during playback.
To resume playback after the ML22804/ML22808-xxx has shifted to the power down state, first input the PUP1
or PUP2 command and then input the PLAY command.
CS
SCK
DI
NCR
BUSY
Oscillation
stopped
Oscillating
XT•XT
1V
AOUT
GND
Pop noise is being
suppressed
Awaiting command
Power down
Status
Command is being processed
After the PDWN1 command is input and after an elapse of command processing time, the oscillation stops and
the AOUT output gradually changes from approx. 1 V level to GND level in about 64 ms.
Any command that is input while pop noise is being suppressed will be ignored. However, if a “L” level is
input to the RESET pin, the device enters the power down state immediately.
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5.
PLAY command
0
1
0
0
⎯
F3
⎯
F2
⎯
F1
⎯
F0
1st byte
2nd byte
• command
F7
F6
F5
F4
The PLAY command is a 2-byte command. Set the playback phrase using the second byte of this command.
The PLAY command can be input when the NCR signal is at a “H” level.
Since it is possible to specify the playback phrase (F7 to F0) at the time of creating the ROM that stores voice
data, set the phrase that was set when the ROM was created.
Figure below shows the timing of phrase (F7 to F0 = 01H) playback.
PLAY command
st byte
PLAY command
2nd byte
1
CS
SCK
DI
NCR
BUSY
1V
AOUT
Status
Address is being
controlled
Awaiting command
Awaiting command
Awaiting command
Playing
Command is being processed
When the 1st byte of the PLAY command is input, the device enters a state in which it waits for the 2nd byte to be
input after the elapse of the command processing time. When the 2nd byte of PLAY command is input, after an
elapse of the command processing time, the device starts reading from the ROM the address information of the
phrase to be played. Thereafter, playback operation starts, the playback is performed up to the specified ROM
address, and then the playback ends automatically.
The NCR1 signal is at a “L” level during address control, and goes “H” when the address control is finished and
playback is started. When this NCR signal goes “H”, then it is possible to input the PLAY command for the
next playback phrase.
During address control, the BUSY signal is at a “L” level during playback and goes “H” when playback is
finished. Whether the playback is going on can be known by the BUSY signal.
Time Required for Address Control
The time required for controlling the address of the playback phrase after input of the PLAY command is the
time of 16 to 17 periods of the sampling frequency of the the phrase that was played last. After power is turned
on or after RESET is input, it is the time of 16 to 17 periods of 4 kHz sampling frequency.
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PLAY Command Input Timing for Continuous Playback
The diagram below shows the PLAY command input timing in cases where one phrase is played and then the
next phrase is played in succession.
PLAY command
2nd byte
PLAY command PLAY command
1st byte 2nd byte
CS
SCK
DI
tcm
NCR
BUSY
1V
AOUT
Status
Awaiting command
Playing phrase 2
Playing phrase 1
Address is being controlled
Address is being controlled
Waiting for address control
As shown in the diagram above, if continuous playback is carried out, input the PLAY command for the second
phrase within 10 ms (tcm) after NCR goes “H”. This will make it possible to start playing the second phrase
immediately after the playback of the first phrase finishes. Phrases can thus be played back continuously
without inserting silence between phrases.
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6.
STOP command
• command
0
1
1
0
⎯
⎯
⎯
⎯
The STOP command is used to stop playback. When speech synthesis processing stops, the AOUT output
becomes 1/4VDD and the NCR and BUSY signals go “H”.
Although it is possible to input the STOP command regardless of the status of NCR during playback, a
prescribed command interval time needs taking.
Note that STOP command input during power down, shifting to power up, and shifting to power down will be
ignored.
STOP command
CS
SCK
DI
NCR
BUSY
1V
AOUT
Awaiting command
Status
Playing
Command is being processed
Because the AOUT output abruptly changes to approx. 1 V level after the STOP command is input, pop noise
may be generated. To prevent pop noise, input the STOP command after gradually decreasing the volume by
the VOL command.
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7.
MUON command
0
1
1
1
⎯
M3
⎯
M2
⎯
M1
⎯
M0
1st byte
2nd byte
• command
M7
M6
M5
M4
The MUON command is a 2-byte command. This command is used to insert silence between the two playback
phrases. The MUON command is enabled when the NCR signal is at a “H” level. Set the silence time length
using the second byte of this command.
As the silence length (M7 to M0), a value between 4 ms and 1024 ms can be set in 4 ms intervals (252 steps in
total).
The equation to set the silence time length is shown below.
The silence length (M7-M0) must be set to 04h or higher.
tmu = (27×(M7) + 26×(M6) + 25×(M5) + 24×(M4) + 23×(M3) + 22×(M2) + 21×(M1) + 20×(M0) + 1) × 4ms
The timing diagram shown below is a case of inserting a silence of 20 ms between the repetitions of a phrase of
(F7–F0) = 01h.
PLAY command
nd byte
MUON command
st byte
MUON command
nd byte
PLAY command PLAY command
st byte nd byte
2
1
2
1
2
CS
SCK
DI
tcm
tcm
NCR
BUSY
1V
AOUT
Status
Awaiting command
Playing
Silence is being inserted
Playing
Address is being controlled
Waiting for silence insertion
to be finished
Waiting for playback to be finished
When the PLAY command is input, the address control of phrase 1 ends, the phrase playback starts, and the
NCR signal goes “H” level. Input the MUON command after this NCR signal changes to the “H” level. After
the MUON command input, the NCR signal remains “L” up to the end of phrase 1 playback, and the device
enters a state waiting for the phrase 1 playback to end.
When the phrase 1 playback finishes, the silence playback starts, and NCR1 signal goes “H” level. After this
NCR signal has changed to the “H” level, re-input the PLAY command in order to play phrase 1.
After the PLAY command input, the NCR signal once again returns to “L” level and the device enters the state
waiting for the end of silence playback.
When the silence playback finishes and then the phrase 1 playback starts, the NCR signal goes “H”, and the
device enters a state in which it is possible to input the next PLAY or MUON command.
The BUSY signal remains “L” until the end of a series of playback.
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8.
SLOOP command
• command
1
0
0
0
⎯
⎯
⎯
⎯
The SLOOP command is used to set repeat playback mode. The CLOOP command is used to release repeat
playback mode.
Since the SLOOP command is valid only during playback, be sure to input the SLOOP command while the NCR
signal is at a “H” level after the PLAY command is input. The NCR signal remains “L” during repeat playback
mode.
Once repeat playback mode is set, the current phrase is repeatedly played back until the repeat playback setting
is released by SLOOP command or until playback is stopped by the STOP command. In the case of a phrase
using the edit function, the edited phrase is repeatedly played back.
Since repeat playback mode is released when playback is stopped by the STOP command, input the SLOOP
command once again if desired to repeat the playback.
Following shows the SLOOP command input timing.
PLAY command
2nd byte
SLOOP command
CLOOP command
CS
SCK
DI
NCR
tcm
BUSY
1V
AOUT
Status
Awaiting command
Awaiting command
Playing
Playing
Address is being controlled
Address is being controlled
Command is being processed
Effective Range of SLOOP Command Input
After the PLAY command is input, input the SLOOP command within 10 ms (tcm) after NCR goes “H”. This
will enable the SLOOP command, so that repeat playback will be carried out.
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9.
CLOOP command
• command
1
0
0
1
⎯
⎯
⎯
⎯
The CLOOP command releases repeat playback mode.
When repeat playback mode is released, NCR goes “H”. It is possible to input the CLOOP command
regardless of the NCR status during playback, but a prescribed command interval needs taking.
CLOOP Command Input Timing
Depending on the timing of the CLOOP command input during repeat playback, the repeat playback will end
either at the end of the currently playing phrase or after one more repetition of the phrase.
The repeat playback will end at the currently playing phrase at the CLOOP command input timing shown in the
table below.
CLOOP input timing
Amount of remaining voice data in the phrase being played
Playback method
4-bit ADPCM2
35 samples or more
18 samples or more
18 samples or more
8-bit nonlinear/straight PCM
16-bit straight PCM
In 4-bit ADPCM2, if the CLOOP command is input 35 or more samples earlier than the time when playback of 1
phrase ends, repeat playback will end with that phrase. If the command is input after the amount of remaining
voice data becomes less than 35 samples, playback of the phrase will be repeated once more.
1 phrase
1 phrase
35 samples
If the command is input at this timing, playback
of the phrase will be repeated once more.
In 8-bit nonlinear/straight PCM or 16-bit straight PCM, if the CLOOP command is input 18 or more samples
earlier than the time when playback of 1 phrase ends, repeat playback will end with that phrase. If the
command is input after the amount of remaining voice data becomes less than 18 samples, playback of the
phrase will be repeated once more.
1 phrase
18 samples
If the command is input at this timing, playback
will end with this phrase.
35/41
FEDL2280XFULL-04
ML22808/ML22804/Ml22802-XXX
10.
VOL command
• command
1
0
1
0
V3
V2
V1
V0
The VOL command is used to adjust the playback volume. Although it is possible to input the VOL command
regardless of the status of the NCR signal, a prescribed command interval time needs taking. Note that VOL
command input during power down, shifting to power up, and shifting to power down will be ignored.
The volume can be set in 16 steps, as shown in the table below. The initial value after reset release is set to 0
dB. During power down or at the time of input of the STOP command, the value set by the VOL command
will be retained.
V3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
V2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
V1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
V0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Volume
0 dB
−0.63 dB
−1.31 dB
−2.05 dB
−2.85 dB
−3.74 dB
−4.73 dB
−5.85 dB
−7.13 dB
−8.64 dB
−10.45 dB
−12.76 dB
−15.92 dB
−20.90 dB
−33.98 dB
OFF
36/41
FEDL2280XFULL-04
ML22808/ML22804/Ml22802-XXX
Power Supply Wiring
The power supplies of this LSI are divided into the following three:
• Digital power supply (DVDD
• ROM power supply (PVDD
• Analog power supply (AVDD
)
)
)
As shown in the figure below, supply DVDD, PVDD, and AVDD from the same power supply, and separate them
into analog and digital power supplies in the wiring.
When power supply voltage = 3 V
ML22808/ML22804/ML22802-XXX/
ML22P808/ML22P804/ML22P802-XXX
DVDD
DGND
PVDD
AVDD
PGND
AGND
3 V
37/41
FEDL2280XFULL-04
ML22808/ML22804/Ml22802-XXX
APPLICATION CIRCUITS
• ML22808/ML22804/ML22P808/ML22P804
RESET
CS
MCU
SCK
DI
NCR
BUSY
AOUT
Speaker amplifier
DIPH
SEL1
SEL0
TEST0,1
VPP
DVDD
PVDD
AVDD
33pF
XT
3.3V
4.096MHz
DGND
PGND
AGND
XT
33pF
• ML22802/ML22P802
RESET
CS
MCU
SCK
DI
NCR
BUSY
AOUT
SEL
Speaker amplifier
DIPH
TEST0,1, 2
VPP
DVDD
PVDD
AVDD
33pF
XT
3.3V
4.096MHz
DGND
PGND
AGND
XT
33pF
38/41
FEDL2280XFULL-04
ML22808/ML22804/Ml22802-XXX
PACKAGE DIMENSIONS
(Unit: mm)
SSOP30-P-56-0.65-K
Mirror finish
Package material
Lead frame material
Pin treatment
Epoxy resin
42 alloy
Solder plating (≥5μm)
0.19 TYP.
5/Dec. 5, 1996
Package weight (g)
Rev. No./Last Revised
5
Notes for Mounting the Surface Mount Type Package
The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in
storage. Therefore, before you perform reflow mounting, contact ROHM’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions (reflow method,
temperature and times).
39/41
FEDL2280XFULL-04
ML22808/ML22804/Ml22802-XXX
REVISION HISTORY
Page
Previous
Edition
Document No.
Date
Description
Current
Edition
FEDL2280XFULL-01 Sep. 29, 2006
FEDL2280XFULL-02 Apr. 09, 2007
–
–
Final edition 1
Final edition 2
–
–
–
1 to 8, 11,
20, 22, 24 The product names (ML22802 and ML22P808/
to 26, and ML22P804/ML22P802) have been added.
36
Volume Change Timing by the VOL Channel in
–
–
18
the “TIMING DIAGRAMS” Section has been
modified.
The explanation for POWER down was
modified.
22
FEDL2280XFULL-03
Dec.25.2007
–
1,9 to 11, Operating temperature was expanded.
41 Change the item of “NOTICE”
FEDL2280XFULL-04 Nov. 11, 2009
41
40/41
FEDL2280XFULL-04
ML22808/ML22804/Ml22802-XXX
NOTICE
No copying or reproduction of this document, in part or in whole, is permitted without the consent of LAPIS
Semiconductor Co., Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing LAPIS Semiconductor's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be
obtained from LAPIS Semiconductor upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account when
designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, LAPIS Semiconductor
shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples of
application circuits for the Products. LAPIS Semiconductor does not grant you, explicitly or implicitly, any
license to use or exercise intellectual property or other rights held by LAPIS Semiconductor and other parties.
LAPIS Semiconductor shall bear no responsibility whatsoever for any dispute arising from the use of such
technical information.
The Products specified in this document are intended to be used with general-use electronic equipment or
devices (such as audio visual equipment, office-automation equipment, communication devices, electronic
appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While LAPIS Semiconductor always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such
as derating, redundancy, fire control and fail-safe designs. LAPIS Semiconductor shall bear no responsibility
whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the
instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system which
requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat
to human life or create a risk of human injury (such as a medical instrument, transportation equipment,
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). LAPIS
Semiconductor shall bear no responsibility in any way for use of any of the Products for the above special
purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales
representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may be controlled
under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit
under the Law.
Copyright 2009 - 2011 LAPIS Semiconductor Co., Ltd.
41/41
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