PI74ALVCH16600A [ETC]
18-Bit Bus Transceiver ; 18位总线收发器\n型号: | PI74ALVCH16600A |
厂家: | ETC |
描述: | 18-Bit Bus Transceiver
|
文件: | 总5页 (文件大小:305K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PI74ALVCH16600
18-Bit Universal Bus Transceiver
with 3-State Outputs
Product Description
Product Features
Pericom Semiconductors PI74ALVCH series of logic circuits are
produced in the Companys advanced 0.5 micron CMOS
technology, achieving industry leading speed.
• PI74ALVCH16600 is designed for low voltage operation
• V = 2.3V to 3.6V
CC
• Hysteresis on all inputs
The PI74ALVCH16600 uses D-type latches and D-type flip-flops
with 3-state outputs to allow data flow in transparent, latched, and
clocked modes.
• Typical V
(Output Ground Bounce)
OLP
< 0.8V at V = 3.3V, T = 25°C
CC
A
• Typical V
(Output V Undershoot)
OH
OHV
Data flow in each direction is controlled by Output Enable (OEAB
and OEBA), Latched Enable (LEAB and LEBA), and Clock
(CLKAB and CLKBA) inputs. The clock can be controlled by the
Clock Enable (CLKENAB and CLKENBA) inputs. For A-to-B
data flow, the device operates in the transparent mode when LEAB
is HIGH. When LEAB is LOW, the A data is latched if CLKAB is
heldatahighorlowlogiclevel. IfLEABislow, theAdataisstored
in the latch/flip-flop on the high-to-low transition of CLKAB.
Output enable OEAB is active low. When OEAB is low, the
outputs are active. When OEAB is HIGH, the outputs are in the
high-impedance state.
< 2.0V at V = 3.3V, T = 25°C
CC
A
• Bus Hold retains last active bus state during 3-State
eliminating the need for external pullup resistors
• Industrial operation at 40°C to +85°C
• Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
Data flow for B to A is similar to that of A to B but uses OEBA,
LEBA, CLKBA, and CLKENBA.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the
minimumvalue of the resistor is determined by the current-sinking
capability of the driver.
The PI74ALVCH16600 has Bus Hold which retains the data
inputs last state whenever the data input goes to high-impedance
preventing floating inputs and eliminating the need for pullup/
down resistors.
Logic Block Diagram
1
OEAB
56
CLKENAB
55
CLKAB
2
LEAB
28
LEBA
30
CLKBA
29
CLKENBA
27
OEBA
CE
1D
C1
3
A1
54
B1
CLK
CE
1D
C1
CLK
To 17 Other Channels
PS8157A 11/06/00
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PI74ALVCH16600
18-Bit Universal Bus Transceiver
Truth Table(1)
Product Pin Description
Pin Name
CLKEN
OE
Description
Inputs
Outputs
Clock Enable Input (Active LOW)
Output Enable Input (Active LOW)
Latch Enable (Active HIGH)
Clock Input (Active LOW)
Data I/O
B
CLKENAB OEAB LEAB CLKAB
A
X
L
LE
X
X
X
H
H
L
H
L
L
L
L
L
L
L
X
H
H
L
L
L
L
L
X
X
Z
L
CLKAB
Ax
Bx
Data I/O
X
H
X
X
L
H
GND
VCC
Ground
Power
X
B
O
X
B
O
¯
L
Product Pin Configuration
L
¯
H
H
H
L
L or H
B
O
OEAB
LEAB
A1
CLKENAB
CLKAB
B1
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
Notes:
2
1. H = High Signal Level
L = Low Signal Level
3
GND
A2
GND
B2
4
Z = High Impedance
↓ = HIGH-to-LOW Transition
A-to-B data flow is shown: B-to-A flow is similar but
uses OEBA, LEBA, CLKBA, and CLKENBA.
Output level before the indicated steady-state input
conditions were established.
5
A3
B3
6
V
CC
A4
V
CC
B4
7
8
A5
A6
B5
9
B6
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
GND
A7
GND
B7
A8
B8
B9
A9
A10
A11
A12
GND
A13
A14
A15
B10
B11
B12
GND
B13
B14
B15
VCC
B16
B17
GND
B18
CLKBA
CLKENBA
V
CC
A16
A17
GND
A18
OEBA
LEBA
PS8157A 11/06/00
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PI74ALVCH16600
18-Bit Universal Bus Transceiver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Storage Temperature ......................................... 65°C to +150°C
Ambient Temperature with Power Applied ........ 40°C to +85°C
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operationalsectionsofthisspecificationisnotimplied. Expo-
sure to absolute maximum rating conditions for extended
periods may affect reliability.
Input Voltage Range, V ................................ 0.5V to V +0.5V
IN CC
Output Voltage Range, V
......................... 0.5V to V +0.5V
CC
OUT
DC Input Voltage ................................................. 0.5V to +5.0V
DC Output Current ............................................................ 100mA
Power Dissipation ................................................................ 1.0W
Recommended Operating Conditions(1)
Parameters
Description
Supply Voltage
Test Conditions
Min.
2.3
Typ.
Max. Units
V
CC
3.6
V
= 2.3V to 2.7V
= 2.7V to 3.6V
= 2.3V to 2.7V
= 2.7V to 3.6V
1.7
CC
V
Input HIGH Voltage
Input LOW Voltage
IH
V
CC
2.0
V
CC
0.7
0.8
V
V
IL
V
CC
V
Input Voltage
0
0
V
CC
IN
V
OUT
Output Voltage
V
CC
V
= 2.3V
= 2.7V
= 3.0V
= 2.3V
= 2.7V
= 3.0V
-12
CC
I
OH
High-level Output Current
V
CC
-12
-24
12
V
CC
mA
°C
V
CC
I
Low-level Output Current
V
CC
12
OL
V
CC
24
T
Operating Free-Air Temperature
-40
85
A
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
PS8157A 11/06/00
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PI74ALVCH16600
18-Bit Universal Bus Transceiver
DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 3.3V ±10%)
(1)
(2)
Parameters
Test Conditions
V
CC
Min.
-0.2
Typ.
Max. Units
I
= 100µA
Min. to Max.
2.3V
V
CC
OH
I
OH
= 6mA
V
= 1.7V
= 1.7V
= 2.0V
= 2.0V
= 2.0V
2.0
IH
V
2.3V
1.7
2.2
2.4
2.0
IH
V
OH
I
OH
= 12mA
V
2.7V
IH
V
3.0V
IH
I
OH
= 24mA
= 100µA
= 6mA
V
3.0V
V
IH
I
OL
Min. to Max.
2.3V
0.2
I
OL
V
= 0.7V
= 0.7V
= 0.8V
= 0.8V
0.4
IL
V
OL
V
2.3V
0.7
IL
I
OL
= 12mA
= 24mA
V
2.7V
0.4
IL
I
OL
V
3.0V
0.55
±5
IL
I
I
V = V or GND
3.6V
I
CC
V = 0.7V
45
-45
75
I
2.3V
3.0V
V = 1.7V
I
(3)
I (Hold)
I
V = 0.8V
I
V = 2.0V
I
-75
µA
V = 0 to 3.6V
3.6V
3.6V
±500
±10
40
I
(4)
I
OZ
V = V or GND
O CC
I
CC
V = V or GND
I = 0
O
3.6V
I
CC
One input at V - 0.6V, Other inputs at V or GND
3V to 3.6V
3.3V
750
pF
∆I
CC
CC
CC
C Control Inputs V = V or GND
4
8
I
I
CC
C
A or B ports V = V or GND
3.3V
pF
IO
O
CC
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device typ e.
2. Typical values are at V = 3.3V, +25°C ambient and maximum loading.
CC
3. Bus Hold maximum dynamic current required to switch the input from one state to another.
4. For I/O ports, the I includes the input leakage current.
OZ
PS8157A 11/06/00
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PI74ALVCH16600
18-Bit Universal Bus Transceiver
Timing Requirements over Operating Range
V
CC
= 2.5V ± 0.2V
V
= 2.7V
V
= 3.3V ± 0.3V
CC
CC
Parameters
Description
Units
Min.
0
Max.
Min. Max.
Min.
0
Max.
f
Clock frequency
150
0
150
150
MHz
CLOCK
LE high
3.3
3.3
1.3
1.2
1.8
0.7
1.5
1.6
1.2
1.4
0
3.3
3.3
1.3
1.1
1.5
0.7
1.8
1.9
1.6
1.7
0
3.3
3.3
1.2
1.1
1.5
0.8
1.5
1.6
1.3
1.4
0
t
Pulse
W
Duration
CLK high or low
Data before CLK
Data before LE¯ CLK high
Data before LE¯ CLK low
CLKEN before CLK
Data after CLK
t
SU
Setup
time
ns
Data after LE¯ CLK high
Data after LE¯ CLK low
CLKEN after CLK
Input Transition Rise or Fall
t Hold time
H
(1)
Dt/Dv
10
10
10
ns/V
Notes:
1. See test circuit and waveforms
Switching Characteristics Over Operating Range(1)
V
= 2.5V ± 0.2V
V
= 2.7V
V = 3.3V ± 0.V
CC
CC
CC
From
(Input)
To
(Output)
Parameters
Units
MHz
(2)
(2)
(2)
Min.
Max. Min.
150
Max. Min.
Max.
f
150
150
1
MAX
t
PD
A or B
B or A
A or B
5.1
5.9
4.7
5.5
4.0
4.8
LEAB or
LEBA
t
PD
1
CLKAB or
CLKBA
t
PD
7.3
6.5
5.1
6.8
6.3
4.7
1.3
1.1
1.2
5.7
5.2
4.4
1.0
ns
OEAB or
OEBA
t
EN
OEAB or
OEBA
t
DIS
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
Operating Characteristics, T = 25ºC
A
V
CC
= 2.5V ± 0.2V
V
= 3.3V ± 0.3V
CC
Parameter
Test Conditions
Units
Typical
Outputs Enabled
43
6
56
6
C
Power Dissipation
Capacitance
C = 50pF
L
f = 10 MHz
PD
pF
Outputs Disabled
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
PS8157A 11/06/00
5
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