UC2843Q [ETC]

Current-Mode SMPS Controller ; 电流模式开关电源控制器\n


型号：	UC2843Q
厂家：	ETC
描述：	Current-Mode SMPS Controller 电流模式开关电源控制器\n 开关控制器
文件：	总8页 (文件大小：463K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

Current Mode PWM Controller

FEATURES

DESCRIPTION

•

Optimized For Off-line And DC

To DC Converters

The UC1842/3/4/5 family of control ICs provides the necessary features to im-

plement off-line or DC to DC fixed frequency current mode control schemes

with a minimal external parts count. Internally implemented circuits include un-

der-voltage lockout featuring start up current less than 1mA, a precision refer-

ence trimmed for accuracy at the error amp input, logic to insure latched

operation, a PWM comparator which also provides current limit control, and a

totem pole output stage designed to source or sink high peak current. The out-

put stage, suitable for driving N Channel MOSFETs, is low in the off state.

•

Low Start Up Current (<1mA)

Automatic Feed Forward

Compensation

•

Pulse-by-pulse Current Limiting

Enhanced Load Response

Characteristics

Differences between members of this family are the under-voltage lockout

thresholds and maximum duty cycle ranges. The UC1842 and UC1844 have

UVLO thresholds of 16V (on) and 10V (off), ideally suited to off-line applica-

tions. The corresponding thresholds for the UC1843 and UC1845 are 8.4V

and 7.6V. The UC1842 and UC1843 can operate to duty cycles approaching

100%. A range of zero to 50% is obtained by the UC1844 and UC1845 by the

addition of an internal toggle flip flop which blanks the output off every other

clock cycle.

•

Under-voltage Lockout With

Hysteresis

•

Double Pulse Suppression

High Current Totem Pole

Output

•

Internally Trimmed Bandgap

Reference

•

500khz Operation

Low RO Error Amp

BLOCK DIAGRAM

Note 1: A/B A = DIL-8 Pin Number. B = SO-14 Pin Number.

Note 2: Toggle flip flop used only in 1844 and 1845.

4/97

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

ABSOLUTE MAXIMUM RATINGS (Note 1)

Supply Voltage (Low Impedance Source) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V

Supply Voltage (ICC <30mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Self Limiting

Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1A

Output Energy (Capacitive Load). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5µJ

Analog Inputs (Pins 2, 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.3V

Error Amp Output Sink Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA

Power Dissipation at TA ≤ 25°C (DIL-8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W

Power Dissipation at TA ≤ 25°C (SOIC-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 725mW

Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C

Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C

Note 1: All voltages are with respect to Pin 5.

All currents are positive into the specified terminal.

Consult Packaging Section of Databook for thermal limitations and considerations

of packages.

CONNECTION DIAGRAMS

DIL-8, SOIC-8 (TOP VIEW)

N or J Package, D8 Package

PLCC-20 (TOP VIEW)

Q Package

PACKAGE PIN FUNCTION

FUNCTION

N/C

COMP

N/C

VFB

N/C

ISENSE

N/C

SOIC-14 (TOP VIEW)

D Package

RT/CT

N/C

PWR GND

GROUND

N/C

OUTPUT

N/C

VCC

N/C

VREF

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

Unless otherwise stated, these specifications apply for -55°C ≤ TA ≤ 125°C for the

UC184X; -40°C ≤ TA ≤ 85°C for the UC284X; 0°C ≤ TA ≤ 70°C for the 384X; VCC =

15V (Note 5); RT = 10k; CT =3.3nF, TA=TJ.

ELECTRICAL CHARACTERISTICS:

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

UNITS

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

Reference Section

Output Voltage

Line Regulation

Load Regulation

Temp. Stability

Total Output Variation

Output Noise Voltage

Long Term Stability

Output Short Circuit

Oscillator Section

Initial Accuracy

Voltage Stability

Temp. Stability

Amplitude

TJ = 25°C, IO = 1mA

12 ≤ VIN ≤ 25V

4.95

4.9

5.00

5.05

4.90

4.82

5.00

5.10

1 ≤ I0 ≤ 20mA

(Note 2) (Note 7)

0.2

0.4

5.1

0.2

0.4 mV/°C

Line, Load, Temp. (Note 2)

10Hz ≤ f ≤ 10kHz, TJ = 25°C (Note2)

TA = 125°C, 1000Hrs. (Note 2)

5.18

µV

-30

-100

-180

-30

-100

-180

TJ = 25°C (Note 6)

0.2

kHz

12 ≤ VCC ≤ 25V

TMIN ≤ TA ≤ TMAX (Note 2)

VPIN 4 peak to peak (Note 2)

1.7

Error Amp Section

Input Voltage

VPIN 1 = 2.5V

2.45

2.50

-0.3

2.55

-1

2.42

2.50

-0.3

2.58

-2

µA

MHz

Input Bias Current

AVOL

2 ≤ VO ≤ 4V

0.7

Unity Gain Bandwidth

PSRR

(Note 2) TJ = 25°C

12 ≤ VCC ≤ 25V

Output Sink Current

Output Source Current

VOUT High

VPIN 2 = 2.7V, VPIN 1 = 1.1V

VPIN 2 = 2.3V, VPIN 1 = 5V

VPIN 2 = 2.3V, RL = 15k to ground

VPIN 2 = 2.7V, RL = 15k to Pin 8

-0.5

-0.8

-0.5

-0.8

VOUT Low

0.7

1.1

0.7

1.1

Current Sense Section

Gain

(Notes 3 and 4)

2.85

0.9

3.15

1.1

2.85

0.9

3.15

1.1

V/V

Maximum Input Signal

PSRR

VPIN 1 = 5V (Note 3)

12 ≤ V_CC≤ 25V (Note 3) (Note 2)

-2

µA

Input Bias Current

Delay to Output

-10

VPIN 3 = 0 to 2V (Note 2)

150

300

150

300

Note 2: These parameters, although guaranteed, are not 100% tested in production.

Note 3: Parameter measured at trip point of latch with VPIN 2 = 0.

Note 4: Gain defined as

∆ VPIN 1

A =

, 0 ≤ VPIN 3 ≤ 0.8V

∆ VPIN 3

Note 5: Adjust VCC above the start threshold before setting at 15V.

Note 6: Output frequency equals oscillator frequency for the UC1842 and UC1843.

Output frequency is one half oscillator frequency for the UC1844 and UC1845.

Note 7: Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation:

_REF(max) − VREF (min)

Temp Stability =

TJ (max) − TJ (min)

VREF (max) and VREF (min) are the maximum and minimum reference voltages measured over the appropriate

temperature range. Note that the extremes in voltage do not necessarily occur at the extremes in temperature.

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

Unless otherwise stated, these specifications apply for −55°C ≤ TA ≤ 125°C for the

UC184X; −40°C≤ TA ≤ 85°C for the UC284X; 0°C ≤ TA ≤ 70°C for the 384X; VCC =

15V (Note 5); RT = 10k; CT =3.3nF, TA=TJ.

ELECTRICAL CHARACTERISTICS:

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

UNITS

PARAMETER

TEST CONDITION

MIN

TYP

MAX

MIN

TYP

MAX

Output Section

Output Low Level

ISINK = 20mA

ISINK = 200mA

0.1

1.5

0.4

2.2

0.1

1.5

0.4

2.2

Output High Level

ISOURCE = 20mA

13.5

ISOURCE = 200mA

Rise Time

TJ = 25°C, CL = 1nF (Note 2)

150

Fall Time

Under-voltage Lockout Section

Start Threshold

X842/4

X843/5

X842/4

X843/5

7.8

8.4

9.0

14.5

7.8

8.4

17.5

9.0

Min. Operating Voltage

After Turn On

8.5

11.5

8.2

7.0

7.6

8.2

7.0

7.6

PWM Section

Maximum Duty Cycle

X842/3

X844/5

100

Minimum Duty Cycle

Total Standby Current

Start-Up Current

0.5

Operating Supply Current

VCC Zener Voltage

VPIN 2 = VPIN 3 = 0V

ICC = 25mA

Note 2: These parameters, although guaranteed, are not 100% tested in production.

Note 3: Parameter measured at trip point of latch with VPIN 2 = 0.

Note 4: Gain defined as:

∆ VPIN 1

A =

; 0 ≤ VPIN 3 ≤ 0.8V.

∆ VPIN 3

Note 5: Adjust VCC above the start threshold before setting at 15V.

Note 6: Output frequency equals oscillator frequency for the UC1842 and UC1843.

Output frequency is one half oscillator frequency for the UC1844 and UC1845.

ERROR AMP CONFIGURATION

Error Amp can Source or Sink up to 0.5mA

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

UNDER-VOLTAGE LOCKOUT

During under-voltage lock-out, the output driver is biased to ground with a bleeder resistor to prevent activating the power

sink minor amounts of current. Pin 6 should be shunted to switch with extraneous leakage currents.

CURRENT SENSE CIRCUIT

Peak Current (IS) is Determined By The Formula

1.0V

ISMAX ≈

R^S

A small RC filter may be required to suppress switch transients.

OSCILLATOR SECTION

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

ERROR AMPLIFIER OPEN-LOOP

FREQUENCY RESPONSE

OUTPUT SATURATION CHARACTERISTICS

OPEN-LOOP LABORATORY FIXTURE

High peak currents associated with capacitive loads necessi- ground. The transistor and 5k potentiometer are used to sam-

tate careful grounding techniques. Timing and bypass capaci- ple the oscillator waveform and apply an adjustable ramp to

tors should be connected close to pin 5 in a single point pin 3.

SHUT DOWN TECHNIQUES

Shutdown of the UC1842 can be accomplished by two meth- pin 1 and/or 3 is removed. In one example, an externally

ods; either raise pin 3 above 1V or pull pin 1 below a voltage latched shutdown may be accomplished by adding an SCR

two diode drops above ground. Either method causes the out- which will be reset by cycling VCC below the lower UVLO

put of the PWM comparator to be high (refer to block diagram). threshold. At this point the reference turns off, allowing the

The PWM latch is reset dominant so that the output will remain SCR to reset.

low until the next clock cycle after the shutdown condition at

UC1842/3/4/5

UC2842/3/4/5

UC3842/3/4/5

OFFLINE FLYBACK REGULATOR

5. Output Voltage:

Power Supply Specifications

A. +5V, ±5%; 1A to 4A load

Ripple voltage: 50mV P-P Max

1. Input Voltage

95VAC to 130VA

(50 Hz/60Hz)

3750V

B. +12V, ±3%; 0.1A to 0.3A load

2. Line Isolation

Ripple voltage: 100mV P-P Max

3. Switching Frequency

40kHz

C. -12V ,±3%; 0.1A to 0.3A load

4. Efficiency @ Full Load 70%

Ripple voltage: 100mV P-P Max

SLOPE COMPENSATION

A fraction of the oscillator ramp can be resistively

summed with the current sense signal to provide slope

compensation for converters requiring duty cycles over

50%.

Note that capacitor, C forms a filter with R2 to suppress

the leading edge switch spikes.

UNITRODE CORPORATION

7 CONTINENTAL BLVD. • MERRIMACK, NH 03054

TEL. (603) 424-2410 • FAX (603) 424-3460

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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

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UC2843Q [ETC]

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