UT62L25616(E) [ETC]
ASYNCHRONOUS STATIC RAM- High Speed ; 异步静态RAM-高速\n
| 型号： | UT62L25616(E) |
| 厂家： | 
ETC |
| 描述： | ASYNCHRONOUS STATIC RAM- High Speed
|
| 文件： | 总14页 (文件大小：122K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
REVISION HISTORY
REVISION
DESCRIPTION
Draft Date
Preliminary Rev. 0.5 Original.
Mar, 2001
1. The symbols CE#,OE#,WE# are revised as.CE, OE , WE .
2. Separate Industrial and Consumer SPEC.
3. Add access time 55ns range.
4. The power supply is revised: 3.3Vꢀ3.6V
1. Revised PIN CONFIGURATION
Rev 1.0 : No A17 pinꢁtyping error
Rev 1.1 : add A17 pin.
Rev. 1.0
Jul 4,2001
a、 TFBGA package :
ball D3 : NCꢁA17
b、 TSOP-Ⅱ package :
Rev. 1.1
Rev. 1.2
Oct 18,2001
Mar 19,2002
pin18 : A16ꢁA17
pin19 : A15ꢁA16
pin20 : A14ꢁA15
pin21 : A13ꢁA14
pin22 : A12ꢁA13
pin23 : NCꢁA12
1. Revised AC ELECTRICAL CHARACTERISTICS
t
t
OH : 5nsꢁ10ns (Min.)
BLZ : 0nsꢁ10ns (Min.)
2. Revised FUNCTIONAL BLOCK DIAGRAM
1. Revised DC ELECTRICAL CHARACTERISTICS：
Revised VIH as 2.2V
Rev. 1.3
Rev. 1.4
Apr 17,2002
Nov 13,2002
2. Revised 48-pin TFBGA package outline dimension：
a、 Rev. 1.2 : ball diameter=0.3mm
b、 Rev. 1.3 : ball diameter=0.35mm
1. Add under/overshoot range of VIL & VIH
1. Revised Standby current (LL-Version) : 3uA(typ)ꢁ2uA(typ)
2. Revised operating current (Iccmax) : 45/35/25mAꢁ40/30/25mA
3. Revised DC CHARACTERISTICS :
a. Operating Power Supply Current (Icc)
55ns (max) : 45ꢁ40mA
70ns (typ) : 25ꢁ20mA, 70ns (max) : 35ꢁ30mA
100ns (Typ) : 20ꢁ16mA
b. Standby current(CMOS) :
Rev. 1.5
Rev. 1.6
Dec 03,2002
May 06,2003
LL-version (typ) : 3ꢁ2uA, 25ꢁ20uA
1. Revised VOH(Typ) : NAꢁ2.7V
2. Add VIH(max)=VCC+2.0V for pulse width less than 10ns.
VIL(min)=VSS-2.0V for pulse width less than 10ns.
3. Add order information for lead free product
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
FEATURES
GENERAL DESCRIPTION
The UT62L25616 is a 4,194,304-bit low power CMOS
static random access memory organized as 262,144
words by 16 bits.
ꢂ Fast access time : 55/70/100ns
ꢂ CMOS Low power operating
Operating current : 40/30/25mA (Icc max.)
Standby current : 20uA (typ.) L-version
2uA (typ.) LL-version
The UT62L25616 operates from a single 2.7V ~ 3.6V
power supply and all inputs and outputs are fully TTL
compatible.
ꢂ Single 2.7V~3.6V power supply
ꢂ Operating temperature:
℃
℃
Commercial : 0 ~70
The UT62L25616 is designed for low power system
applications. It is particularly suited for use in
high-density high-speed system applications.
℃
℃
Extended : -20 ~80
ꢂ All TTL compatible inputs and outputs
ꢂ Fully static operation
ꢂ Three state outputs
ꢂ Data retention voltage : 1.5V (min)
ꢂ Data byte control :
(I/O1~I/O8)
LB
(I/O9~I/O16)
UB
Ⅱ
ꢂ Package : 44-pin 400mil TSOP
48-pin 6mm × 8mm TFBGA
FUNCTIONAL BLOCK DIAGRAM
×
256K 16
A0-A17
DECODER
MEMORY
ARRAY
Vcc
Vss
I/O1-I/O8
Lower Byte
I/O DATA
CIRCUIT
COLUMN I/O
I/O9-I/O16
Upper Byte
CE
OE
WE
UB
CONTROL
CIRCUIT
LB
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
PIN CONFIGURATION
A4
A3
A5
A6
A7
OE
UB
LB
1
44
A
OE
UB
LB
A0
A3
A1
A4
A2
NC
I/O1
I/O3
Vcc
Vss
I/O7
I/O8
NC
2
3
43
42
A2
A1
B
C
D
E
F
I/O9
CE
4
41
40
39
A0
5
6
I/O10 I/O11
A5
A6
I/O2
I/O4
I/O5
I/O6
WE
A11
CE
7
8
9
I/O16
I/O15
I/O14
I/O13
Vss
I/O1
I/O2
I/O3
I/O4
Vcc
38
37
Vss
Vcc
I/O12
I/O13
A17
NC
A14
A12
A9
A7
36
35
34
A16
A15
A13
A10
10
11
I/O15 I/O14
12
13
Vss
Vcc
33
32
I/O5
I/O12
G
H
I/O16
NC
NC
A8
I/O6
I/O11
14
15
31
I/O7
I/O8
I/O10
I/O9
NC
30
29
16
17
WE
A17
28
27
18
A8
A9
A16
A15
19
20
26
25
1
2
3
4
5
6
A10
A14
A13
21
22
A11
A12
TFBGA
24
23
PIN DESCRIPTION
TSOP II
SYMBOL
DESCRIPTION
A0 - A17
Address Inputs
I/O1 - I/O16
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Lower Byte Control
CE
WE
OE
LB
Upper Byte Control
Power Supply
Ground
UB
VCC
VSS
NC
No Connection
TRUTH TABLE
I/O OPERATION
MODE
Standby
SUPPLY CURRENT
ISB, ISB1
OE
UB
CE
WE
LB
I/O1-I/O8
I/O9-I/O16
High – Z
High – Z
High – Z
High – Z
High – Z
DOUT
H
X
X
X
X
X
X
H
X
H
High – Z
High – Z
High – Z
High – Z
DOUT
L
L
L
L
L
L
L
L
H
H
L
L
L
X
X
X
H
H
H
H
H
L
L
X
L
H
L
L
H
L
X
L
H
L
L
H
L
Output Disable
ICC,ICC1,ICC2
Read
Write
High – Z
DOUT
ICC,ICC1,ICC2
DOUT
DIN
High – Z
DIN
DIN
L
L
High – Z
DIN
ICC,ICC1,ICC2
L
Note: H = VIH, L=VIL, X = Don't care.
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
SYMBOL
VTERM
TA
RATING
-0.5 to 4.6
0 to 70
-20 to 80
-65 to 150
1
UNIT
V
℃
Terminal Voltage with Respect to VSS
Commercial
Operating Temperature
Extended
TA
℃
℃
Storage Temperature
TSTG
PD
Power Dissipation
W
mA
℃
DC Output Current
IOUT
50
Soldering Temperature (under 10 secs)
Tsolder
260
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
℃
℃
℃
℃
DC ELECTRICAL CHARACTERISTICS
(VCC = 2.7V~3.6V, TA = 0 to 70 / -20 to 80 (E))
PARAMETER
Power Voltage
Input High Voltage
SYMBOL TEST CONDITION
VCC
MIN. TYP. MAX. UNIT
2.7 3.0
3.6
VCC+0.3
V
V
V
*1
VIH
2.2
-0.2
- 1
-
-
-
-
*2
Input Low Voltage
VIL
ILI
0.6
1
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
≦
≦
A
µ
VSS VIN VCC
ILO
≦
≦
- 1
1
A
µ
VSS VI/O VCC; Output Disable
VOH
VOL
IOH= -1mA
IOL= 2.1mA
2.2 2.7
-
V
-
-
-
-
-
0.4
40
30
25
V
Cycle time=min, 100%duty
55
70
30
20
16
mA
mA
mA
Operating Power
Supply Current
ICC
I/O=0mA,
=V
IL
CE
100
Tcycle=
1 s
µ
Tcycle=
500ns
≦
100%duty,I =0mA,
0.2V,
CE
I/O
ICC1
-
-
4
8
5
mA
Average Operation
Current
other pins at 0.2V or Vcc-0.2V
ICC2
ISB
10
mA
mA
Standby Current (TTL)
-
-
-
0.3
20
2
0.5
80
20
=VIH, other pins =VIL or VIH
CE
CE
-L
-LL
A
A
µ
=V -0.2V
CC
Standby Current (CMOS) ISB1
Notes:
other pins at 0.2V or Vcc-0.2V
µ
1. Overshoot : Vcc+2.0v for pulse width less than 10ns.
2. Undershoot : Vss-2.0v for pulse width less than 10ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
4
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
℃
(TA=25 , f=1.0MHz)
CAPACITANCE
PARAMETER
Input Capacitance
SYMBOL
CIN
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Input/Output Capacitance
Note : These parameters are guaranteed by device characterization, but not production tested.
CI/O
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
5ns
1.5V
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
CL = 30pF, IOH/IOL = -1mA / 2.1mA
℃
℃
℃
℃
AC ELECTRICAL CHARACTERISTICS
(VCC =2.7V~3.6V, TA =0 to 70 / -20 to 80 (E))
(1) READ CYCLE
UT62L25616-55 UT62L25616-70 UT62L25616-100
PARAMETER
SYMBOL
UNIT
MIN.
55
-
-
-
10
5
-
-
10
-
MAX.
-
55
55
30
-
MIN.
70
-
-
-
10
5
-
-
10
-
MAX.
-
70
70
35
-
MIN.
100
-
-
-
10
5
-
-
10
-
MAX.
-
100
100
50
-
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
20
20
-
25
25
-
30
30
-
tBA
55
70
100
,
Access Time
LB UB
tBHZ
tBLZ
-
25
-
-
30
-
-
40
-
ns
ns
,
to High-Z Output
to Low-Z Output
LB UB
10
10
10
,
LB UB
(2) WRITE CYCLE
PARAMETER
UT62L25616-55 UT62L25616-70 UT62L25616-100
SYMBOL
UNIT
MIN.
55
50
50
0
MAX.
MIN.
70
60
60
0
MAX.
MIN.
100
80
80
0
MAX.
Write Cycle Time
tWC
tAW
tCW
tAS
tWP
tWR
tDW
tDH
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High Z
-
-
-
45
0
-
-
55
0
-
-
70
0
-
-
25
0
-
-
30
0
-
-
40
0
-
-
tOW*
tWHZ*
tBW
5
-
5
-
5
-
-
45
30
-
-
60
30
-
-
80
40
-
,
Valid to End of Write
LB UB
*These parameters are guaranteed by device characterization, but not production tested.
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
5
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled)
(1,2)
tRC
Address
tAA
tOH
tOH
Previous data valid
Dout
Data Valid
READ CYCLE 2 (
and
Controlled)
OE
(1,3,4,5)
CE
tRC
Address
CE
tAA
tACE
tBA
LB , UB
OE
tBHZ
tBLZ
tCHZ
tOHZ
tOH
tOE
tCLZ
tOLZ
Dout
High-Z
High-Z
Data Valid
Notes :
1.
is high for read cycle.
WE
2.Device is continuously selected
=low,
=low,
CE
or
LB UB
=low.
or
OE
3.Address must be valid prior to or coincident with
=low,
=low transition; otherwise tAA is the limiting parameter.
±
CE
LB UB
4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL=5pF. Transition is measured 500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ, tBHZ is less than tBLZ, tOHZ is less than tOLZ
.
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
6
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
WRITE CYCLE 1 (
Controlled)
(1,2,3,5,6)
WE
tWC
Address
CE
tAW
tCW
tAS
tWP
tWR
WE
tBW
LB , UB
tWHZ
(4)
tOW
tDH
High-Z
Dout
Din
(4)
tDW
Data Valid
WRITE CYCLE 2 (
Controlled)
(1,2,5,6)
CE
tWC
Address
tAW
CE
tWR
tAS
tCW
tWP
WE
tBW
LB , UB
tWHZ
High-Z
(4)
Dout
Din
tDW
tDH
Data Valid
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80055
7
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
WRITE CYCLE 3 (
,
Controlled)
(1,2,5,6)
LB UB
tWC
Address
tAW
CE
tAS
tCW
tWR
tWP
WE
LB , UB
Dout
tBW
tWHZ
High-Z
tDW
tDH
Din
Data Valid
Notes :
1.
,
,
,
must be high during all address transitions.
WE CE LB UB
2.A write occurs during the overlap of a low
, low
,
or
=low.
CE
OE
WE LB UB
3.During a
controlled write cycle with
low, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be placed
WE
on the bus.
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5.If the low transition occurs simultaneously with or after low transition, the outputs remain in a high impedance state.
,
,
CE LB UB
WE
±
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured 500mV from steady state.
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
8
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
℃
℃
℃
℃
DATA RETENTION CHARACTERISTICS
)
(TA = 0 to 70 / -20 to 80 (E)
PARAMETER
SYMBOL TEST CONDITION
MIN.
TYP.
MAX. UNIT
Vcc for Data Retention
VDR
1.5
-
3.6
V
≧
V
CC-0.2V
CE
Vcc=1.5V
- L
- LL
-
-
1
0.5
50
20
A
µ
µ
Data Retention Current
IDR
≧
VCC-0.2V
A
CE
Chip Disable to Data
Retention Time
Recovery Time
See Data Retention
Waveforms (below)
tCDR
tR
0
5
-
-
-
-
ms
ms
DATA RETENTION WAVEFORM
Low Vcc Data Retention Waveform (1) (
controlled)
CE
≧
VDR
1.5V
VCC
Vcc(min.)
Vcc(min.)
tCDR
tR
≧
CE
VCC-0.2V
VIH
VIH
CE
Low Vcc Data Retention Waveform (2) (
,
controlled)
LB UB
VDR ≧ 1.5V
VCC
Vcc(min.)
Vcc(min.)
t
CDR
t
R
LB,UB ≧ VCC-0.2V
VIH
VIH
LB,UB
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
P80055
9
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
PACKAGE OUTLINE DIMENSION
Ⅱ
44-pin 400mil TSOP-
Package Outline Dimension
DIMENSIONS IN MILLMETERS
DIMENSIONS IN INCHS
SYMBOLS
MIN.
1.00
0.05
0.95
0.30
0.12
18.313
11.854
10.058
-
NOM.
-
MAX.
1.20
0.15
1.05
0.45
0.21
18.517
11.838
10.282
-
MIN.
0.039
0.002
0.037
0.012
0.0047
0.721
0.460
0.398
-
NOM.
-
MAX.
0.047
0.006
0.041
0.018
0.083
0.728
0.470
0.404
-
A
A1
A2
b
-
-
1.00
0.35
-
0.039
0.014
-
c
D
18.415
11.836
10.180
0.800
0.50
0.805
-
0.725
0.466
0.400
0.0315
0.020
0.0317
-
E
E1
e
L
0.40
-
0.60
-
0.0157
-
0.0236
-
2D
y
0.00
0o
0.076
5o
0.000
0o
0.003
5o
Θ
-
-
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
10
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
48-pin 6mm × 8mm TFBGA Package Outline Dimension
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
11
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
ORDERING INFORMATION
COMMERCIAL TEMPERATURE
PART NO.
ACCESS TIME
STANDBY CURRENT
PACKAGE
(ns)
(µA) typ.
UT62L25616MC-55L
UT62L25616MC-55LL
UT62L25616MC-70L
UT62L25616MC-70LL
UT62L25616MC-100L
UT62L25616MC-100LL
UT62L25616BS-55L
UT62L25616BS-55LL
UT62L25616BS-70L
UT62L25616BS-70LL
UT62L25616BS-100L
UT62L25616BS-100LL
55
20
2
Ⅱ
Ⅱ
Ⅱ
Ⅱ
Ⅱ
Ⅱ
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
55
70
20
2
70
100
100
55
55
70
70
100
100
20
2
20
2
20
2
20
2
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
EXTENDED TEMPERATURE
PART NO.
ACCESS TIME
STANDBY CURRENT
PACKAGE
(ns)
(µA) typ.
UT62L25616MC-55LE
UT62L25616MC-55LLE
UT62L25616MC-70LE
UT62L25616MC-70LLE
UT62L25616MC-100LE
UT62L25616MC-100LLE
UT62L25616BS-55LE
UT62L25616BS-55LLE
UT62L25616BS-70LE
UT62L25616BS-70LLE
UT62L25616BS-100LE
UT62L25616BS-100LLE
55
20
Ⅱ
Ⅱ
Ⅱ
Ⅱ
Ⅱ
Ⅱ
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
55
70
2
20
2
70
100
100
55
55
70
70
100
100
20
2
20
2
20
2
20
2
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
12
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
ORDERING INFORMATION (for lead free product)
COMMERCIAL TEMPERATURE
ACCESS TIME
STANDBY CURRENT
PART NO.
PACKAGE
(ns)
(µA) typ.
UT62L25616MCL-55L
UT62L25616MCL-55LL
UT62L25616MCL-70L
UT62L25616MCL-70LL
UT62L25616MCL-100L
UT62L25616MCL-100LL
UT62L25616BSL-55L
UT62L25616BSL-55LL
UT62L25616BSL-70L
UT62L25616BSL-70LL
UT62L25616BSL-100L
UT62L25616BSL-100LL
55
20
2
Ⅱ
Ⅱ
Ⅱ
Ⅱ
Ⅱ
Ⅱ
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
55
70
20
2
70
100
100
55
55
70
70
100
100
20
2
20
2
20
2
20
2
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
EXTENDED TEMPERATURE
PART NO.
ACCESS TIME
STANDBY CURRENT
PACKAGE
(ns)
(µA) typ.
UT62L25616MCL-55LE
UT62L25616MCL-55LLE
UT62L25616MCL-70LE
UT62L25616MCL-70LLE
UT62L25616MCL-100LE
UT62L25616MCL-100LLE
UT62L25616BSL-55LE
UT62L25616BSL-55LLE
UT62L25616BSL-70LE
UT62L25616BSL-70LLE
UT62L25616BSL-100LE
UT62L25616BSL-100LLE
55
20
Ⅱ
Ⅱ
Ⅱ
Ⅱ
Ⅱ
Ⅱ
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
44 PIN TSOP-
55
70
2
20
2
70
100
100
55
55
70
70
100
100
20
2
20
2
20
2
20
2
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
48 PIN TFBGA
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
13
UTRON
UT62L25616
256K X 16 BIT LOW POWER CMOS SRAM
Rev. 1.6
This page is left blank intentionally.
UTRON TECHNOLOGY INC.
P80055
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
14
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